TW200410301A - Arrangement comprising a capacitor - Google Patents

Arrangement comprising a capacitor Download PDF

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Publication number
TW200410301A
TW200410301A TW091135156A TW91135156A TW200410301A TW 200410301 A TW200410301 A TW 200410301A TW 091135156 A TW091135156 A TW 091135156A TW 91135156 A TW91135156 A TW 91135156A TW 200410301 A TW200410301 A TW 200410301A
Authority
TW
Taiwan
Prior art keywords
layer
capacitor
electrode
ubm
substrate
Prior art date
Application number
TW091135156A
Other languages
English (en)
Inventor
Jose Solo De Zaldivar
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Publication of TW200410301A publication Critical patent/TW200410301A/zh

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

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200410301 ⑴ 玖、發明說明 (發明說明應敘明：發明所屬之技術領域、先前技術、内容、實施方式及圖式簡單說明) 技術領域 本發明係關於一種裝置包括一基材，一電容器，一互連 層，與一接觸結構，其中電容器包括第一電極和第一電極 且亦含一***介質，而接觸結構包含一 UBM(凸出不足金 屬化）層與一凸出接觸點。本發明亦係關於一顯示裝置。 先前技術 一積體電路包括正常係在一單獨晶體之半導體晶圓内 產生之許多半導體元件。一薄介質層係被沉澱或漸形成在 半導體晶圓上表面上並在具有複晶的半導體材料之面區 上。一相當厚介質層係被沉積在半導體元件上。經由該厚 介質層可侵蝕接觸孔或提供近接半導體元件接頭終端之 通道。藉由位於厚介質層上狹條導體之複模型可電氣互連 不同半導體元件。狹條導體，亦稱互連層，可經過厚介質 層内通道而與半導體元件接頭終端接觸。在建立此等接觸 以後，一保護層係被沉澱在此連接狹條之導體模型上。保 護層内之接觸通道可提供近接連接模型之方形成分，即所 謂接觸墊片（接觸地面）。經由該接觸墊片可完成電氣連接 至積體電路。為完成電氣接觸，可使用所謂凸出接觸點， 它係由第一電氣傳導層與第二明顯較厚之電氣傳導層所 組成。將第一電氣傳導層亦闡述為一 UBM(凸出不足金屬 化）層且包括，例如，TiW/Au。第二電氣傳導層係實際凸 出接觸點且包括，例如，金，它係藉電鍵予以施加。 發明内容 200410301 (2) 例如，使用一積體電路以轉移資訊資料及功率至用以產· 生資訊目視顯示之一裝置。為此用途，一積體電路更包括 元件諸如，電容器。這種電容器一般係由兩個電極和一介 質層所形成。正常，電容器係直接被應用於半導體的材 料。然而缺點是：此等電容器含占去半導體基材一點面 積，因此會增加半導體元件之生產成本。 美國專利案號5,741，721揭示，例如，一電容器其係應用 於包含一積體電路之晶片。 本發明之目的在提供一裝置包括一電容器，一互連層， 及價廉而容易生產之接觸結構件。 由包括一基材，一電容器，一互連層，及一接觸結構之 一裝置就可達成該項目的，其中電容器包括第一電極和第 二電極且亦含一***介質，接觸結構物包括一 UBM (凸出 不足金屬化）層與一凸出接觸點，互連層可形成電容器之 第一電極，以及UBM層可形成電容器之第二電極。 此種裝置之結構具有優點：祇用一種額外材料沉澱之步 驟和兩種額外罩幕之步驟藉由製造積體電路和接觸結構 物之標準過程即能生產電容器。因此，能價廉而容易生產 本發明之裝置。 如附加之申請專利範圍第至4項所界定之更有利實例使 其可能容易而廉價製造包括複功能之裝置，例如驅動顯示 裝置之電路。而且，本發明係關於一種顯示裝置它包括内 含一基材，一電容器，一互連層，和一接觸結構物的一項 裝置，其中電容器包括第一電極和第二電極且亦包括一中 200410301
間***介質，接觸結構物包括一 UBM(凸出不足金屬化）層-和一凸接觸點，互連層可形成電容器的第一電極，而UBM 層可形成電容器的第二電極。 本發明之此等及其他層面可由以後所述可能實例即可 顯而易見且可參考該等實例加以闡明。 圖式簡單說明 圖1和圖2各顯示經由一可能之裝置之簡化切面圖，及 圖3顯示一可能裝置產製步驟之流程圖。 實施方式 一種顯示裝置，例如一液晶影像螢幕，為驅動此裝置包 括至少一個裝置i，例如一積體電路。該項裝置除主動元件 以外尚亦包括進一步元件諸如電容器。 圖1係經由包含兩個互連層，一電容器，與一接觸結構 之一裝置之一切面圖解。沉澱在一基材1係形成一電容器 C與兩互連層之不同材料層。互連層之用途係連接電容器 至裝置之其他元件且亦連接至該等元件。端視裝置之使用 與生產方法而定，基材1可包含一絕緣材料，一半導體材 料，一導體材料或兩層或多層之综合結構。 若基材1包括一絕緣材料，絕緣材料較佳是一瓷質材 料，諸如Al2〇3或A1N。 若基材1包括一半導體材料，半導體材料較佳包括矽， 坤化鎵，磷化銦，砷化鎵鋁，或鍺。對該等材料有利是摻 雜有硼，砷，銻，磷，或該摻雜劑之合併物。可將一個或 多個主動元件諸如二極體或電晶體置於基材内。此等主動 200410301
(4) 元件可有利地形成一積體電路。 若基材1包括一導體材料，較佳導體材料係一耐熱金 屬，例如嫣或鎖。 若基材1包括兩層或多層之混合結構，對該混合結構較 佳是使用LTCC (低溫聯合烘焙瓷質）科技予以產製。可在 LTCC混合結構内額外地整合一個或多個被動元件，諸如 電阻器，電容器，電感或狹條導體。此等，被動元件可有 利地形成一積體電路。 另一選擇，混合結構可包括半導體材料兩層或多層，各 層係有不同厚度或係摻雜有不同摻雜劑。按此實例，個別 層可再包括一個或多個主動元件，諸如二極體或電晶體。 此等主動元件可有利地形成一積體電路。對兩層或多層混 合結構包含一層絕緣材料與一層導體或半導體材料亦係 有益的。 較佳在基材1上可施加含例如Si〇2i絕緣層2。對絕緣層 2滲雜有如硼，砷，銻，磷，或該摻雜劑之合併物含有益 的。按定型方式施加第一互連層3至絕緣層2。第一介質層 4係位在第一互連層3與在並非由第一互連層3所覆蓋之絕 緣層2之該等面區上。第一介質層4包括如Si〇2，Si;N4，或 Six〇yNz(0$ xSl，0$y$l，OSzSl)。第二互連層 6按定 模型方式被沉澱在第一介質層4上。第一互連層3經由少數 區之電氣導體接觸通道5係電氣連接至第二互連層6。第一 互連層3，第二互連層6，和接觸通道5包括如Ti/TiN/ A 1 ( C u )。一保護層7係沉澱在第二互連層6與在並非由第二 200410301
互連層6所涵蓋第一介質層4之該等面區上。保護層7係與-一無機材料諸如 Si02, Si3N4,或 SixOyNz(OS 1，0$ yS 1， 0 $ z $ 1 )，有機材料諸如，聚SS胺或聚環苯丁晞，或無機 及有機材料之组合物。保護層7係在少數區被中斷按此種 方式：第二互連層6之面區並未被保護層7予以涵蓋。較佳 包括一氧化物，一氮化物或一氮氧化物之第二介質層8係 被沉澱在第二互連層6之該區上其中一電容器爾後係被放 置和沉澱在保護層7上。較佳地，第二介質層8包括Si02， Si3N4，或 SixOyNz(0$ x$l，0$y$l，OSz^l)。由第二 介質層8所涵蓋之第二互連層6之該等面區可作用為此區 内電容器之第一電極。直接沉澱在第二互連層6上之第二 介質層8之該等面區可作用為此區内該電容器之介質。較 佳含Au/TiW之UBM(凸出不足金屬化）層係被沉澱在第二 介質層8上與亦在並未由第二介質層8所涵蓋之第二互連 層6之該等面區上。在一電容器係被放置之區域内，UBM 層9可作用為該電容器之第二電極。較佳含Au且藉由在 UBM層9上電鍍所沉澱之一凸出接觸點1 0可與此區内UBM 層9共同形成一接觸結構用於便與電容器及/或元件或位 在基材1内積體電路行電氣接觸。連接結構係與第二互連 層6電氣接觸。 另一選擇，UBM層9係可按這種方式加以定模型：包含 額外地作用為一連接導體且可互連為電容器與第二互連 層6或諸多接觸結構。 另一選擇，不同材料層，例如第一互連層3與第二互連 200410301 ⑹ 層6係可按這種方式加以定模型：諸層可形成此裝置之一-個或多個進一步元件。在驅動一顯示裝置之裝置内，這種 元件可為一陣列非揮發半導體記憶體之一縱列與行列解 碼器，一輸入/輸出單位（I/O單位），一 SRAM(靜態隨機存 取記憶體）單元，一 ROM (唯讀記憶體）單元，或一邏輯元 件。經由UBM層9可有利地完成該等元件之相互電氣連 接，或連接至電容器或至一連接結構。 經過位在絕緣層2内之電氣導體通道（圖未示）可連接元 件諸如積體電路，主動元件，或位在基材1内之之被動元 件至第一互連層3。 此電容器可作用為一 ’’充電泵’’電容器或為一解耦電容 圖3係經由包括兩互連層，一電容器，與位在電晶體上 面一接觸結構的一裝置簡化橫剖面圖。按此實例，基材1 包括一半導體材料。位在基材1内係兩半導體區，源極區 S，與電晶體之汲極區D。絕緣層2較佳是一 Si〇2_場氧化 層。電晶體閘極G係位在較佳包括Si02之第一介質層4内。 閘極G包括例如η -式或ρ -式聚石夕。第一互連層3係經由電氣 導體通道13被連接至基材1内半導體區S，D。 圖3顯示製造本發明一裝置之方法。為製造本發明一裝 置，例如，如圖3 Α所示，一晶圓包括一基材1，一絕緣層 2，一藉由接觸通道5所連接至第二互連層6之第一互連層 3，一位在第一互連層3與第二互連層6間之第一介質層4， 與一保護層7藉由已知製程係首先產生。位在含一半導體 -10· 200410301
(7) I 材料之基材1内係一積體電路形式之主動元件。由絕緣層2 内之電氣導體通道（圖未示）連接積體電路至第一互連層 3。 在該晶圓上，如圖3 B所示，首先沉澱一光阻侵刻劑1 1， 且係按此種方式定型：未由光阻侵刻劑1 1涵蓋第二互連層 6之該等面區，其上爾後係安置一電容器。為此一用途， 經由光阻侵刻劑1 1層與在此點處之保護層7藉侵蝕而產生 一小孔1 2。然後如圖3 C所示拆除光阻侵刻劑1 1。 第二介質層8係沉澱在保護層7與第二互連層6 (圖3 D)之 露出區上。 一光阻侵刻劑1 1係沉澱在第二介質層8上，且係按這種 方式定型：凡爾後係完成一電氣接觸至接觸結構或電容器 處，可露出第二互連層6之該等面區。為此用途，經由光 阻侵刻劑1 1層，第二介質層8，與保護層7 (圖3 E)，藉侵蝕 即可在此等面區每區内產生一小孔1 2。如圖3 F所示，然 後消除光阻侵刻劑。 一 UBM層9係沉澱在第二介質層8與第二互連層6 (圖3 G) 之露出區上。 一光阻侵刻劑1 1係沉澱在UBM層9上且按此種方式定 型：凡爾後有係一接觸結構（圖3 Η)處可露出UBM層9之該 等面區。然後藉電鍍（圖3 I)即可完成凸出接觸點1 0。 為進一步使UBM層9定型，凡無UBM層係被定置在一精 製裝置内處藉在該等面區.每區内產生一小孔12可再定型 光阻侵刻劑11。藉侵蝕（圖3 J)可消除並非由光阻侵刻劑1 1 -11 - 200410301 ⑻ 所涵蓋UBM層9之該等面區。然後如圖3K所示消除光阻侵-刻劑1 1。 可使用這種裝置以驅動一顯示裝置。 圖式代表符號說明 1 基 材 2 絕 緣 層 3 第 — 互 連 層 4 第 — 介 質 層 5 氣 導 體 接觸通道 6 第 二 互 連 層 7 保 護 層 8 第 -— 介 質 層 9 UBM層 10 凸 出 接 點 11 光 阻 侵 刻 劑 12 小 孔
•12-

Claims (1)

  1. 200410301 拾、申請專利範圍 1. 一種包括一基材，一電容器，一互連層與一接觸結構 之裝置，其中 -電容器包括第一電極及第二電極與一***介質， - 接觸結構包括一 UBM (凸出不足金屬化）層與一凸出 接觸點，及 - 互連層形成電容器之第一電極及UBM層形成電容器 之第二電極。 2 .如申請專利範圍第1項之裝置，其特徵在於：基材至少 包括一個元件。 3 .如申請專利範圍第2項之裝置，其特徵在於：該電容器 係電氣耦合至元件。 4. 如申請專利範圍第2項之裝置，其特徵在於：元件係選 自包含主動元件，被動元件，和積體電路之群組。 5. —種顯示裝置，包括具有一基材，一電容器，一互連 層，與一接觸結構之一裝置，其中 -電容器包括一第一電極和第二電極與一***介質， - 接觸結構包括一 UBM (凸出不足金屬化）層與一凸出 接觸點，及 - 互連層形成電容器之一第一電極與UBM層形成電容 器之第二電極。
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US20050006688A1 (en) 2005-01-13
KR20040071158A (ko) 2004-08-11
AU2002365727A1 (en) 2003-06-17
JP2005512320A (ja) 2005-04-28

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