SG141309A1 - Silicon wafer for semiconductor and manufacturing method thereof - Google Patents

Silicon wafer for semiconductor and manufacturing method thereof

Info

Publication number
SG141309A1
SG141309A1 SG200705539-5A SG2007055395A SG141309A1 SG 141309 A1 SG141309 A1 SG 141309A1 SG 2007055395 A SG2007055395 A SG 2007055395A SG 141309 A1 SG141309 A1 SG 141309A1
Authority
SG
Singapore
Prior art keywords
silicon wafer
manufacturing
semiconductor
bmds
sizes
Prior art date
Application number
SG200705539-5A
Other languages
English (en)
Inventor
Katsuhiko Nakai
Wilfried Von Ammon
Sei Fukushima
Herbert Schmidt
Martin Weber
Original Assignee
Siltronic Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siltronic Ag filed Critical Siltronic Ag
Publication of SG141309A1 publication Critical patent/SG141309A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/20Controlling or regulating
    • C30B15/206Controlling or regulating the thermal history of growing the ingot
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24942Structurally defined web or sheet [e.g., overall dimension, etc.] including components having same physical characteristic in differing degree
    • Y10T428/24992Density or compression of components

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
SG200705539-5A 2006-09-20 2007-07-27 Silicon wafer for semiconductor and manufacturing method thereof SG141309A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2006254946 2006-09-20
JP2007178920A JP5072460B2 (ja) 2006-09-20 2007-07-06 半導体用シリコンウエハ、およびその製造方法

Publications (1)

Publication Number Publication Date
SG141309A1 true SG141309A1 (en) 2008-04-28

Family

ID=38663072

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200705539-5A SG141309A1 (en) 2006-09-20 2007-07-27 Silicon wafer for semiconductor and manufacturing method thereof

Country Status (8)

Country Link
US (1) US8197594B2 (zh)
EP (1) EP1914795B1 (zh)
JP (1) JP5072460B2 (zh)
KR (1) KR100875228B1 (zh)
CN (1) CN101187058B (zh)
DE (1) DE602007003296D1 (zh)
SG (1) SG141309A1 (zh)
TW (1) TWI399464B (zh)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4894863B2 (ja) 2008-02-08 2012-03-14 Jfeスチール株式会社 加工性に優れた高強度溶融亜鉛めっき鋼板およびその製造方法
JP5276863B2 (ja) * 2008-03-21 2013-08-28 グローバルウェーハズ・ジャパン株式会社 シリコンウェーハ
JP5537802B2 (ja) * 2008-12-26 2014-07-02 ジルトロニック アクチエンゲゼルシャフト シリコンウエハの製造方法
KR101231412B1 (ko) * 2009-12-29 2013-02-07 실트로닉 아게 실리콘 웨이퍼 및 그 제조 방법
JP5533210B2 (ja) * 2010-05-06 2014-06-25 株式会社Sumco シリコンウェーハの熱処理方法
JP5764937B2 (ja) * 2011-01-24 2015-08-19 信越半導体株式会社 シリコン単結晶ウェーハの製造方法
DE102012214085B4 (de) * 2012-08-08 2016-07-07 Siltronic Ag Halbleiterscheibe aus einkristallinem Silizium und Verfahren zu deren Herstellung
JP2016504759A (ja) * 2012-11-19 2016-02-12 サンエディソン・セミコンダクター・リミテッドSunEdison Semiconductor Limited 熱処理により不活性な酸素析出核を活性化する高析出密度ウエハの製造
JP6136346B2 (ja) * 2013-02-21 2017-05-31 株式会社Sumco エピタキシャルシリコンウェーハの製造方法
US9064823B2 (en) * 2013-03-13 2015-06-23 Taiwan Semiconductor Manufacturing Co., Ltd. Method for qualifying a semiconductor wafer for subsequent processing
US10141413B2 (en) 2013-03-13 2018-11-27 Taiwan Semiconductor Manufacturing Co., Ltd. Wafer strength by control of uniformity of edge bulk micro defects
KR101472349B1 (ko) * 2013-05-21 2014-12-12 주식회사 엘지실트론 반도체용 실리콘 단결정 잉곳 및 웨이퍼
JP5885305B2 (ja) * 2013-08-07 2016-03-15 グローバルウェーハズ・ジャパン株式会社 シリコンウェーハ及びその製造方法
JP6191534B2 (ja) * 2014-05-01 2017-09-06 信越半導体株式会社 ウエハのそりの評価方法及びウエハの選別方法
JP6100226B2 (ja) * 2014-11-26 2017-03-22 信越半導体株式会社 シリコン単結晶ウェーハの熱処理方法
JP6458551B2 (ja) 2015-02-25 2019-01-30 株式会社Sumco シリコンウェーハの良否判定方法、該方法を用いたシリコンウェーハの製造方法およびシリコンウェーハ
JP6413952B2 (ja) 2015-06-26 2018-10-31 株式会社Sumco シリコンウェーハの良否判定方法、該方法を用いたシリコンウェーハの製造方法およびシリコンウェーハ
CN105070647B (zh) * 2015-07-27 2018-09-25 上海晶盟硅材料有限公司 外延片、外延片制备方法以及半导体器件
US10026843B2 (en) 2015-11-30 2018-07-17 Taiwan Semiconductor Manufacturing Co., Ltd. Fin structure of semiconductor device, manufacturing method thereof, and manufacturing method of active region of semiconductor device
DE102015224983B4 (de) * 2015-12-11 2019-01-24 Siltronic Ag Halbleiterscheibe aus einkristallinem Silizium und Verfahren zu deren Herstellung
CN106884203A (zh) * 2015-12-15 2017-06-23 上海新昇半导体科技有限公司 单晶硅锭及晶圆的形成方法
DE102015226399A1 (de) * 2015-12-22 2017-06-22 Siltronic Ag Siliciumscheibe mit homogener radialer Sauerstoffvariation
JP6299835B1 (ja) 2016-10-07 2018-03-28 株式会社Sumco エピタキシャルシリコンウェーハおよびエピタキシャルシリコンウェーハの製造方法
DE102016225138A1 (de) * 2016-12-15 2018-06-21 Siltronic Ag Halbleiterscheibe aus einkristallinem Silizium und Verfahren zur Herstellung einer Halbleiterscheibe aus einkristallinem Silizium
EP3428325B1 (en) * 2017-07-10 2019-09-11 Siltronic AG Semiconductor wafer made of single-crystal silicon and process for the production thereof
JP6881292B2 (ja) * 2017-12-28 2021-06-02 信越半導体株式会社 再結合ライフタイムの制御方法
US11482607B2 (en) * 2018-12-05 2022-10-25 Mitsubishi Electric Corporation Semiconductor device and method for manufacturing semiconductor device

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KR0139730B1 (ko) * 1993-02-23 1998-06-01 사또오 후미오 반도체 기판 및 그 제조방법
JPH06310517A (ja) * 1993-02-23 1994-11-04 Toshiba Corp 半導体基板及びその製造方法
DE4407272C2 (de) 1994-03-04 1996-01-11 Cassella Ag Verfahren zur Herstellung cyclischer Vinylphosphonsäureester
JPH08213403A (ja) 1995-02-07 1996-08-20 Sumitomo Metal Ind Ltd 半導体基板及びその製造方法
DE19637182A1 (de) 1996-09-12 1998-03-19 Wacker Siltronic Halbleitermat Verfahren zur Herstellung von Halbleiterscheiben aus Silicium mit geringer Defektdichte
JPH10303208A (ja) * 1997-04-30 1998-11-13 Toshiba Corp 半導体基板およびその製造方法
JP3989122B2 (ja) * 1998-08-07 2007-10-10 シルトロニック・ジャパン株式会社 シリコン半導体基板の製造方法
US6436846B1 (en) * 1998-09-03 2002-08-20 Siemens Aktiengesellscharft Combined preanneal/oxidation step using rapid thermal processing
JP4460671B2 (ja) * 1999-03-26 2010-05-12 シルトロニック・ジャパン株式会社 シリコン半導体基板及びその製造方法
JP4646440B2 (ja) * 2001-05-28 2011-03-09 信越半導体株式会社 窒素ドープアニールウエーハの製造方法
JP2003059932A (ja) * 2001-08-08 2003-02-28 Toshiba Ceramics Co Ltd シリコン単結晶ウエハの製造方法およびシリコン単結晶ウエハ
JP4615161B2 (ja) * 2001-08-23 2011-01-19 信越半導体株式会社 エピタキシャルウエーハの製造方法
JP2006040980A (ja) * 2004-07-22 2006-02-09 Sumco Corp シリコンウェーハおよびその製造方法
JP2006054350A (ja) * 2004-08-12 2006-02-23 Komatsu Electronic Metals Co Ltd 窒素ドープシリコンウェーハとその製造方法

Also Published As

Publication number Publication date
CN101187058B (zh) 2011-01-19
JP5072460B2 (ja) 2012-11-14
EP1914795A1 (en) 2008-04-23
EP1914795B1 (en) 2009-11-18
US20080113171A1 (en) 2008-05-15
JP2008103673A (ja) 2008-05-01
KR100875228B1 (ko) 2008-12-19
US8197594B2 (en) 2012-06-12
TWI399464B (zh) 2013-06-21
DE602007003296D1 (de) 2009-12-31
CN101187058A (zh) 2008-05-28
TW200822231A (en) 2008-05-16
KR20080026516A (ko) 2008-03-25

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