SE9502180L - Interference-free connection to a time-multiplex bus - Google Patents
Interference-free connection to a time-multiplex busInfo
- Publication number
- SE9502180L SE9502180L SE9502180A SE9502180A SE9502180L SE 9502180 L SE9502180 L SE 9502180L SE 9502180 A SE9502180 A SE 9502180A SE 9502180 A SE9502180 A SE 9502180A SE 9502180 L SE9502180 L SE 9502180L
- Authority
- SE
- Sweden
- Prior art keywords
- interface circuit
- state
- bus
- electrical
- buffer
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/028—Arrangements specific to the transmitter end
- H04L25/029—Provision of high-impedance states
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
- G06F13/4072—Drivers or receivers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Logic Circuits (AREA)
- Bus Control (AREA)
- Information Transfer Systems (AREA)
Abstract
The present invention relates to an interface circuit for connecting an electrical unit disturbance-free to an electrical bus in which time-divided synchronous bus signals pass between several electrical units. At the ouput thereof, the interface circuit comprises a three state buffer (1) connectable to the bus with each signal conductor, said buffer being provided with a control input (10) for bringing it to high-impedance state in order to connect the electrical unit to the bus and disconnect therefrom. It also comprises a control block (2) to control the state of each three state buffers (1), and in which the output states (10) provided thereby have been programmed in advance, and which automatically sets the states of the three state buffers (1), and which is furthermore provided with a input (18) for programming it externally. In addition, means (5, 6) have been arranged in the interface circuit to disconnect the clock signal (15, 16) of the logical circuit, such as a controllable switch, this being also controlled with the logic (3) controlling the three state buffer (1). The clock signal (15, 16) is disconnected for minimizing the power consumption, whereby the auxiliary voltage required by the interface circuit will be small. The interface circuit has been integrated to the same microcircuit as the actual operating logic (7, 8) of the electrical unit. <IMAGE>
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FI925921A FI92449C (en) | 1992-12-29 | 1992-12-29 | Uninterrupted connection to the time division bus |
PCT/FI1993/000557 WO1994015298A1 (en) | 1992-12-29 | 1993-12-28 | Disturbance-free connection to time-divided bus |
Publications (3)
Publication Number | Publication Date |
---|---|
SE9502180L true SE9502180L (en) | 1995-06-15 |
SE9502180D0 SE9502180D0 (en) | 1995-06-15 |
SE515782C2 SE515782C2 (en) | 2001-10-08 |
Family
ID=8536476
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE9502180A SE515782C2 (en) | 1992-12-29 | 1995-06-15 | Interference-free connection to a time-multiplex bus |
Country Status (6)
Country | Link |
---|---|
AU (1) | AU5816394A (en) |
DE (1) | DE4396777T1 (en) |
FI (1) | FI92449C (en) |
GB (1) | GB2288894B (en) |
SE (1) | SE515782C2 (en) |
WO (1) | WO1994015298A1 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6081733A (en) * | 1997-04-16 | 2000-06-27 | Motorola, Inc. | Communication control apparatus and method |
FI103451B (en) * | 1997-08-26 | 1999-06-30 | Nokia Telecommunications Oy | Three-state output of the crossover component |
FI103452B (en) * | 1997-08-26 | 1999-06-30 | Nokia Telecommunications Oy | Bus architecture of the crossover device |
FI103449B1 (en) * | 1997-08-26 | 1999-06-30 | Nokia Telecommunications Oy | Cross-Link Processor Command Architecture |
FI103621B (en) * | 1997-08-26 | 1999-07-30 | Nokia Telecommunications Oy | Method and apparatus for inserting control channels into a data stream m |
FI103453B (en) * | 1997-08-26 | 1999-06-30 | Nokia Telecommunications Oy | Automatic conditional crossover |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
IT1217801B (en) * | 1988-06-08 | 1990-03-30 | Honeywell Rull Italia S P A | APPARATUS FOR REMOVAL / HOT INSERTION ON A UNIT CONNECTION BUS, WITH NON-REMOVABLE MAGNETIC RECORDING SUPPORT |
US4949334A (en) * | 1989-04-21 | 1990-08-14 | Alcatel Na, Inc. | Protected information transfer system |
-
1992
- 1992-12-29 FI FI925921A patent/FI92449C/en active
-
1993
- 1993-12-28 GB GB9511800A patent/GB2288894B/en not_active Expired - Lifetime
- 1993-12-28 WO PCT/FI1993/000557 patent/WO1994015298A1/en active Application Filing
- 1993-12-28 DE DE4396777T patent/DE4396777T1/en not_active Withdrawn
- 1993-12-28 AU AU58163/94A patent/AU5816394A/en not_active Abandoned
-
1995
- 1995-06-15 SE SE9502180A patent/SE515782C2/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
GB2288894B (en) | 1996-10-09 |
SE9502180D0 (en) | 1995-06-15 |
FI92449C (en) | 1994-11-10 |
FI92449B (en) | 1994-07-29 |
FI925921A0 (en) | 1992-12-29 |
WO1994015298A1 (en) | 1994-07-07 |
DE4396777T1 (en) | 1995-12-07 |
GB2288894A (en) | 1995-11-01 |
AU5816394A (en) | 1994-07-19 |
SE515782C2 (en) | 2001-10-08 |
GB9511800D0 (en) | 1995-08-23 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
NUG | Patent has lapsed |