RU2005126975A - Способ для создания электронного компонента или модуля и компонент или модуль - Google Patents
Способ для создания электронного компонента или модуля и компонент или модуль Download PDFInfo
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- RU2005126975A RU2005126975A RU2005126975/28A RU2005126975A RU2005126975A RU 2005126975 A RU2005126975 A RU 2005126975A RU 2005126975/28 A RU2005126975/28 A RU 2005126975/28A RU 2005126975 A RU2005126975 A RU 2005126975A RU 2005126975 A RU2005126975 A RU 2005126975A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H05K1/00—Printed circuits
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- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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- H05K1/00—Printed circuits
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- H05K1/0213—Electrical arrangements not otherwise provided for
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- H05K2201/09436—Pads or lands on permanent coating which covers the other conductors
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Claims (34)
1. Способ изготовления компонента или модуля, устанавливаемого в корпусе, который монтируется на печатной схеме, причем вся сборка устанавливается на подложке, включающий, по меньшей мере, одну стадию покрытия изоляционного материала, по меньшей мере, части указанного модуля и, по меньшей мере, одну стадию создания на части указанного изоляционного материала, по меньшей мере, одной токопроводящей зоны, чтобы определить зоны формирования и/или приема, по меньшей мере, части компонента и/или, по меньшей мере, одного соединительного элемента.
2. Способ по п.1, отличающийся тем, что по меньшей мере, одна из указанных токопроводящих зон определяет структуру межсоединений, обеспечивая установку указанного модуля на печатной схеме.
3. Способ по п.2, отличающийся тем, что указанная структура межсоединений имеет, по меньшей мере, одну точку соединения, и, по меньшей мере, одно соответствующее звено, проходящее, по меньшей мере, по боковому краю указанного корпуса по всей длине указанной подложки.
4. Способ по п.2, отличающийся тем, что указанная структура межсоединений обеспечивает сборку на печатной схеме с помощью высокотемпературной пайки.
5. Способ по п.4, отличающийся тем, что указанная структура межсоединений обеспечивает сборку на печатной схеме по методике CMS.
6. Способ по п.1, отличающийся тем, что, по меньшей мере, одна из указанных токопроводящих зон определяет пассивный элемент.
7. Способ по п.6, отличающийся тем, что указанные пассивные элементы входят в группу, содержащую конденсаторы, индуктивные сопротивления и резисторы, и их комбинации.
8. Способ по п.1, отличающийся тем, что, по меньшей мере, одна из указанных токопроводящих зон представляет собой электрод конденсатора, диэлектрик которого сформирован из указанного изоляционного материала.
9. Способ по п.1, отличающийся тем, что он включает, по меньшей мере, две токопроводящих зоны, предназначенные для приема, по меньшей мере, одного компонента.
10. Способ по п.9, отличающийся тем, что указанные компоненты монтируются с помощью высокотемпературной пайки или клея.
11. Способ по п.1, отличающийся тем, что он включает предварительную стадию покрытия, по меньшей мере, части указанных компонентов, и стадию металлизации покрытой части, чтобы обеспечить электромагнитное экранирование, затем осуществляется конечная стадия покрытия.
12. Способ по п.11, отличающийся тем, что указанная конечная стадия включает двойное формование.
13. Способ по п.11, отличающийся тем, что независимое экранирование выполняется, используя, по меньшей мере, две сборки компонентов.
14. Способ по п.13, отличающийся тем, что, по меньшей мере, одна из указанных сборок соединена с внешним радиатором.
15. Способ по п.1, отличающийся тем, что указанные стадии покрытия и создания, по меньшей мере, одной токопроводящей зоны повторяются, по меньшей мере, однократно.
16. Способ по п.1, отличающийся тем, что он включает стадию металлизации слоя, формирующего блок-план.
17. Способ по п.1, отличающийся тем, что делается, по меньшей мере, одно отверстие, заполняемое токопроводящим материалом, проходящее, по меньшей мере, через один слой покрытия.
18. Способ по п.17, отличающийся тем, что указанные отверстия конические или сужающиеся.
19. Способ по п.17, отличающийся тем, что указанные отверстия выполнены механическим инструментом, лазерным лучом, химическим травлением или проплавлением покрытия.
20. Способ по п.17, отличающийся тем, что указанные отверстия заполнены токопроводящим материалом методом сеткографии или заполнением под давлением, химическими и/или электрохимическими ваннами.
21. Способ по п.1, отличающийся тем, что указанный изоляционный материал представляет собой пластмассу.
22. Способ по п.1, отличающийся тем, что указанный изоляционный материал имеет величину коэффициента теплового расширения, совместимую с материалом печатной схемы, на которой крепится указанный компонент или модуль.
23. Способ по п.1, отличающийся тем, что указанная стадия покрытия - выборочная, чтобы сэкономить, по меньшей мере, часть поверхности указанной подложки и обеспечить электрическую непрерывность, по меньшей мере, между одной из указанных токопроводящих зон и, по меньшей мере, одной из указанных частей поверхности.
24. Способ по п.1, отличающийся тем, что указанная стадия покрытия выполняется, литьем материала, вводом материала или переносом материала с последующей полимеризацией или спеканием.
25. Способ по п.1, отличающийся тем, что указанная стадии изготовления, по меньшей мере, одной токопроводящей зоны содержит стадию металлизации поверхности указанного изоляционного материала и стадию изготовления геометрических форм, удаляющих часть указанной металлизации.
26. Способ по п.25, отличающийся тем, что указанная стадия металлизации содержит поверхностную обработку, по меньшей мере, в химической и/или электрохимической ванне, нанесение токопроводящей краски, напыление токопроводящего материала и/или выпаривание под вакуумом.
27. Способ по п.25, отличающийся тем, что указанная стадия изготовления геометрических форм содержит трехмерное травление лазером или избирательное открытие, или химическое травление.
28. Способ по п.1, отличающийся тем, что он включает стадию наложения пленки, сделанной из органического фоточувствительного материала, на указанное покрытие и/или на указанные токопроводящие зоны.
29. Способ по п.1, отличающийся тем, что он включает стадию создания отвода тепла, генерируемого, по меньшей мере, одним из указанных компонентов.
30. Компонент или модуль, заключенный в корпус, который устанавливается на печатной схеме и представляет собой узел, установленный на подложке, отличающийся тем, что компонент или модуль содержит изоляционный материал, покрывающий, по меньшей мере, часть указанного модуля и, по меньшей мере, одну токопроводящую зону на части указанного изоляционного материала, чтобы определить зоны формирования и/или прием, по меньшей мере, части компонента и/или, по меньшей мере, элемента межсоединений.
31. Компонент или модуль по п.30, отличающийся тем, что, по меньшей мере, одна из указанных токопроводящих зон определяют структуру межмежсоединений, позволяющую укрепить указанный модуль на печатной схеме.
32. Компонент или модуль по п.30, отличающийся тем, что содержит, по меньшей мере, пассивный компонент, определенный, по меньшей мере, одной из указанных токопроводящих зон.
33. Компонент или модуль по п.30, отличающийся тем, что он содержит, по меньшей мере, один конденсатор, диэлектрик которого сформирован указанным изоляционным материалом, и, по меньшей мере, один электрод одной из указанных токопроводящих зон.
34. Компонент или модуль по п.30, отличающийся тем, что несет, по меньшей мере, один компонент, соединенный, по меньшей мере, с двумя из указанных токопроводящих зон.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0302588A FR2852190B1 (fr) | 2003-03-03 | 2003-03-03 | Procede de fabrication d'un composant ou d'un module electronique et composant ou module correspondant |
FR03/02588 | 2003-03-03 |
Publications (1)
Publication Number | Publication Date |
---|---|
RU2005126975A true RU2005126975A (ru) | 2006-05-27 |
Family
ID=32865201
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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RU2005126975/28A RU2005126975A (ru) | 2003-03-03 | 2004-03-03 | Способ для создания электронного компонента или модуля и компонент или модуль |
Country Status (8)
Country | Link |
---|---|
US (1) | US20070041163A1 (ru) |
EP (1) | EP1599903A2 (ru) |
JP (1) | JP2006519502A (ru) |
KR (1) | KR20050105507A (ru) |
CN (1) | CN1846306A (ru) |
FR (1) | FR2852190B1 (ru) |
RU (1) | RU2005126975A (ru) |
WO (1) | WO2004082022A2 (ru) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
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TWI452960B (zh) * | 2010-11-25 | 2014-09-11 | Kuang Hong Prec Co Ltd | 具有熱傳導性質的模塑互連組件及其製造方法 |
Family Cites Families (24)
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US4551746A (en) * | 1982-10-05 | 1985-11-05 | Mayo Foundation | Leadless chip carrier apparatus providing an improved transmission line environment and improved heat dissipation |
GB8412674D0 (en) * | 1984-05-18 | 1984-06-27 | British Telecomm | Integrated circuit chip carrier |
US4996411A (en) * | 1986-07-24 | 1991-02-26 | Schlumberger Industries | Method of manufacturing a card having electronic memory and a card obtained by performing said method |
US5180976A (en) * | 1987-04-17 | 1993-01-19 | Everett/Charles Contact Products, Inc. | Integrated circuit carrier having built-in circuit verification |
US5069626A (en) * | 1987-07-01 | 1991-12-03 | Western Digital Corporation | Plated plastic castellated interconnect for electrical components |
US5016138A (en) * | 1987-10-27 | 1991-05-14 | Woodman John K | Three dimensional integrated circuit package |
US5257049A (en) * | 1990-07-03 | 1993-10-26 | Agfa-Gevaert N.V. | LED exposure head with overlapping electric circuits |
US5241450A (en) * | 1992-03-13 | 1993-08-31 | The United States Of America As Represented By The United States Department Of Energy | Three dimensional, multi-chip module |
US5369552A (en) * | 1992-07-14 | 1994-11-29 | Ncr Corporation | Multi-chip module with multiple compartments |
JP3461204B2 (ja) * | 1993-09-14 | 2003-10-27 | 株式会社東芝 | マルチチップモジュール |
US6261508B1 (en) * | 1994-04-01 | 2001-07-17 | Maxwell Electronic Components Group, Inc. | Method for making a shielding composition |
US6347037B2 (en) * | 1994-04-28 | 2002-02-12 | Fujitsu Limited | Semiconductor device and method of forming the same |
US5694300A (en) * | 1996-04-01 | 1997-12-02 | Northrop Grumman Corporation | Electromagnetically channelized microwave integrated circuit |
GB2324649A (en) * | 1997-04-16 | 1998-10-28 | Ibm | Shielded semiconductor package |
US6323060B1 (en) * | 1999-05-05 | 2001-11-27 | Dense-Pac Microsystems, Inc. | Stackable flex circuit IC package and method of making same |
FR2799883B1 (fr) * | 1999-10-15 | 2003-05-30 | Thomson Csf | Procede d'encapsulation de composants electroniques |
JP4398056B2 (ja) * | 2000-04-04 | 2010-01-13 | Necトーキン株式会社 | 樹脂モールド体 |
FR2808164B1 (fr) * | 2000-04-21 | 2002-06-07 | Wavecom Sa | Procede de blindage d'au moins la partie superieure d'un module de radiocommunication, et module de radiocommunication correspondant |
JP3582460B2 (ja) * | 2000-06-20 | 2004-10-27 | 株式会社村田製作所 | 高周波モジュール |
US6509640B1 (en) * | 2000-09-29 | 2003-01-21 | Intel Corporation | Integral capacitor using embedded enclosure for effective electromagnetic radiation reduction |
EP1356718A4 (en) * | 2000-12-21 | 2009-12-02 | Tessera Tech Hungary Kft | PACKAGED INTEGRATED CIRCUITS AND METHOD FOR THE PRODUCTION THEREOF |
JP4564186B2 (ja) * | 2001-02-16 | 2010-10-20 | 株式会社東芝 | パターン形成方法 |
US6747341B2 (en) * | 2002-06-27 | 2004-06-08 | Semiconductor Components Industries, L.L.C. | Integrated circuit and laminated leadframe package |
US7274094B2 (en) * | 2002-08-28 | 2007-09-25 | Micron Technology, Inc. | Leadless packaging for image sensor devices |
-
2003
- 2003-03-03 FR FR0302588A patent/FR2852190B1/fr not_active Expired - Fee Related
-
2004
- 2004-03-03 JP JP2006505691A patent/JP2006519502A/ja active Pending
- 2004-03-03 US US10/547,809 patent/US20070041163A1/en not_active Abandoned
- 2004-03-03 EP EP04716631A patent/EP1599903A2/fr not_active Withdrawn
- 2004-03-03 WO PCT/FR2004/000505 patent/WO2004082022A2/fr active Application Filing
- 2004-03-03 KR KR1020057016371A patent/KR20050105507A/ko not_active Application Discontinuation
- 2004-03-03 RU RU2005126975/28A patent/RU2005126975A/ru not_active Application Discontinuation
- 2004-03-03 CN CNA2004800044502A patent/CN1846306A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
FR2852190B1 (fr) | 2005-09-23 |
EP1599903A2 (fr) | 2005-11-30 |
US20070041163A1 (en) | 2007-02-22 |
KR20050105507A (ko) | 2005-11-04 |
WO2004082022A2 (fr) | 2004-09-23 |
FR2852190A1 (fr) | 2004-09-10 |
WO2004082022A3 (fr) | 2005-09-15 |
CN1846306A (zh) | 2006-10-11 |
JP2006519502A (ja) | 2006-08-24 |
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