PT95435A - Processo de producao de uma pelicula depositada e de um dispositivo semicondutor - Google Patents

Processo de producao de uma pelicula depositada e de um dispositivo semicondutor

Info

Publication number
PT95435A
PT95435A PT95435A PT9543590A PT95435A PT 95435 A PT95435 A PT 95435A PT 95435 A PT95435 A PT 95435A PT 9543590 A PT9543590 A PT 9543590A PT 95435 A PT95435 A PT 95435A
Authority
PT
Portugal
Prior art keywords
deposited
forming
movie
production process
semiconductive device
Prior art date
Application number
PT95435A
Other languages
English (en)
Other versions
PT95435B (pt
Inventor
Osamu Ikeda
Kazuaki Ohmi
Shigeyuki Matsumoto
Original Assignee
Canon Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP25001689A external-priority patent/JP2834788B2/ja
Priority claimed from JP1250015A external-priority patent/JP2781223B2/ja
Application filed by Canon Kk filed Critical Canon Kk
Publication of PT95435A publication Critical patent/PT95435A/pt
Publication of PT95435B publication Critical patent/PT95435B/pt

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H01L21/28562Selective deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76879Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemical Vapour Deposition (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Physical Vapour Deposition (AREA)
PT95435A 1989-09-26 1990-09-26 Processo de producao de uma pelicula depositada e de um dispositivo semicondutor PT95435B (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP25001689A JP2834788B2 (ja) 1989-09-26 1989-09-26 堆積膜形成法
JP1250015A JP2781223B2 (ja) 1989-09-26 1989-09-26 堆積膜形成法

Publications (2)

Publication Number Publication Date
PT95435A true PT95435A (pt) 1991-05-22
PT95435B PT95435B (pt) 1997-07-31

Family

ID=26539602

Family Applications (1)

Application Number Title Priority Date Filing Date
PT95435A PT95435B (pt) 1989-09-26 1990-09-26 Processo de producao de uma pelicula depositada e de um dispositivo semicondutor

Country Status (8)

Country Link
US (1) US5134092A (pt)
EP (1) EP0420590B1 (pt)
KR (1) KR940004443B1 (pt)
AT (1) ATE136159T1 (pt)
DE (1) DE69026178T2 (pt)
MY (1) MY107409A (pt)
PT (1) PT95435B (pt)
SG (1) SG43276A1 (pt)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2721023B2 (ja) * 1989-09-26 1998-03-04 キヤノン株式会社 堆積膜形成法
ATE139866T1 (de) 1990-02-19 1996-07-15 Canon Kk Verfahren zum herstellen von abgeschiedener metallschicht, die aluminium als hauptkomponente enthält, mit anwendung von alkylaluminiumhydrid
JPH06196419A (ja) * 1992-12-24 1994-07-15 Canon Inc 化学気相堆積装置及びそれによる半導体装置の製造方法
US5552339A (en) * 1994-08-29 1996-09-03 Taiwan Semiconductor Manufacturing Company Furnace amorphous-SI cap layer to prevent tungsten volcano effect
JPH08186081A (ja) * 1994-12-29 1996-07-16 F T L:Kk 半導体装置の製造方法及び半導体装置の製造装置
US6348419B1 (en) * 1999-08-18 2002-02-19 Infineon Technologies Ag Modification of the wet characteristics of deposited layers and in-line control
KR100451515B1 (ko) * 2002-06-28 2004-10-06 주식회사 하이닉스반도체 반도체소자의 캐패시터 제조방법
JP2012177191A (ja) 2011-02-03 2012-09-13 Canon Inc 成膜装置及び成膜方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3816491A (en) * 1973-02-02 1974-06-11 Du Pont Hexamethyltungsten
US4349408A (en) * 1981-03-26 1982-09-14 Rca Corporation Method of depositing a refractory metal on a semiconductor substrate
US4617087A (en) * 1985-09-27 1986-10-14 International Business Machines Corporation Method for differential selective deposition of metal for fabricating metal contacts in integrated semiconductor circuits
DE3772659D1 (de) * 1986-06-28 1991-10-10 Ulvac Corp Verfahren und vorrichtung zum beschichten unter anwendung einer cvd-beschichtungstechnik.

Also Published As

Publication number Publication date
US5134092A (en) 1992-07-28
DE69026178T2 (de) 1996-08-14
MY107409A (en) 1995-12-30
PT95435B (pt) 1997-07-31
SG43276A1 (en) 1997-10-17
KR940004443B1 (ko) 1994-05-25
DE69026178D1 (de) 1996-05-02
EP0420590A3 (en) 1991-08-21
EP0420590A2 (en) 1991-04-03
ATE136159T1 (de) 1996-04-15
EP0420590B1 (en) 1996-03-27
KR910007111A (ko) 1991-04-30

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Effective date: 19910123

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Effective date: 19970424

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MM4A Annulment/lapse due to non-payment of fees, searched and examined patent

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