NO20015197D0 - Fremgangsmåte og apparat for å teste en skjermbrikke - Google Patents

Fremgangsmåte og apparat for å teste en skjermbrikke

Info

Publication number
NO20015197D0
NO20015197D0 NO20015197A NO20015197A NO20015197D0 NO 20015197 D0 NO20015197 D0 NO 20015197D0 NO 20015197 A NO20015197 A NO 20015197A NO 20015197 A NO20015197 A NO 20015197A NO 20015197 D0 NO20015197 D0 NO 20015197D0
Authority
NO
Norway
Prior art keywords
testing
screen chip
chip
screen
Prior art date
Application number
NO20015197A
Other languages
English (en)
Other versions
NO20015197L (no
Inventor
Saroj Pathak
James E Payne
Glen A Rosendale
Nianglamching Hangzo
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Publication of NO20015197L publication Critical patent/NO20015197L/no
Publication of NO20015197D0 publication Critical patent/NO20015197D0/no

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318544—Scanning methods, algorithms and patterns
    • G01R31/31855—Interconnection testing, e.g. crosstalk, shortcircuits
NO20015197A 1999-06-15 2001-10-24 Fremgangsmåte og apparat for å teste en skjermbrikke NO20015197D0 (no)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/333,805 US6115305A (en) 1999-06-15 1999-06-15 Method and apparatus for testing a video display chip
PCT/US2000/014189 WO2000077529A2 (en) 1999-06-15 2000-05-23 Method and apparatus for testing a video display chip

Publications (2)

Publication Number Publication Date
NO20015197L NO20015197L (no) 2001-10-24
NO20015197D0 true NO20015197D0 (no) 2001-10-24

Family

ID=23304333

Family Applications (1)

Application Number Title Priority Date Filing Date
NO20015197A NO20015197D0 (no) 1999-06-15 2001-10-24 Fremgangsmåte og apparat for å teste en skjermbrikke

Country Status (11)

Country Link
US (1) US6115305A (no)
EP (1) EP1192475A2 (no)
JP (1) JP2003502787A (no)
KR (1) KR20020013525A (no)
CN (1) CN1171095C (no)
CA (1) CA2365956A1 (no)
HK (1) HK1044820A1 (no)
MY (1) MY136005A (no)
NO (1) NO20015197D0 (no)
TW (1) TW490676B (no)
WO (1) WO2000077529A2 (no)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100390353B1 (ko) * 2000-12-14 2003-07-12 주식회사 아이오복스 레이저를 이용한 지하철 광고 시스템
US7075285B2 (en) * 2004-05-12 2006-07-11 Richard Chin Delay locked loop circuit and method for testing the operability of the circuit
TWI436080B (zh) * 2011-09-20 2014-05-01 Au Optronics Corp 檢測電路、顯示面板的驅動晶片、顯示模組以及傳輸介面的檢測方法
JP6162679B2 (ja) * 2014-12-19 2017-07-12 ファナック株式会社 コモン信号の故障箇所を検出するマトリクス回路
US9947712B2 (en) * 2016-01-27 2018-04-17 Varex Imaging Corporation Matrix type integrated circuit with fault isolation capability
JP6653593B2 (ja) * 2016-02-29 2020-02-26 パナソニック液晶ディスプレイ株式会社 表示装置及び表示装置の検査方法
JP7280874B2 (ja) 2018-06-01 2023-05-24 ソニーセミコンダクタソリューションズ株式会社 固体撮像素子、撮像装置、および、固体撮像素子の制御方法
CN111897155B (zh) * 2020-09-03 2023-04-11 业成科技（成都）有限公司 阵列基板及显示面板

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4654827A (en) * 1984-08-14 1987-03-31 Texas Instruments Incorporated High speed testing of semiconductor memory devices
JP2653550B2 (ja) * 1990-11-14 1997-09-17 三菱電機株式会社 固体撮像素子
JP2792634B2 (ja) * 1991-06-28 1998-09-03 シャープ株式会社 アクティブマトリクス基板の検査方法
JPH05274895A (ja) * 1992-03-26 1993-10-22 Nec Ic Microcomput Syst Ltd 半導体記憶装置
JP3086936B2 (ja) * 1993-05-12 2000-09-11 セイコーインスツルメンツ株式会社 光弁装置
US5392248A (en) * 1993-10-26 1995-02-21 Texas Instruments Incorporated Circuit and method for detecting column-line shorts in integrated-circuit memories
JP3530574B2 (ja) * 1994-05-20 2004-05-24 株式会社ルネサステクノロジ 半導体記憶装置
TW331599B (en) * 1995-09-26 1998-05-11 Toshiba Co Ltd Array substrate for LCD and method of making same
US5684809A (en) * 1996-05-02 1997-11-04 Micron Technology, Inc. Semiconductor memory with test circuit
US5748545A (en) * 1997-04-03 1998-05-05 Aplus Integrated Circuits, Inc. Memory device with on-chip manufacturing and memory cell defect detection capability
JPH1139898A (ja) * 1997-07-14 1999-02-12 Mitsubishi Electric Corp 半導体装置

Also Published As

Publication number Publication date
US6115305A (en) 2000-09-05
EP1192475A2 (en) 2002-04-03
TW490676B (en) 2002-06-11
JP2003502787A (ja) 2003-01-21
MY136005A (en) 2008-07-31
NO20015197L (no) 2001-10-24
WO2000077529A3 (en) 2001-06-28
KR20020013525A (ko) 2002-02-20
WO2000077529B1 (en) 2001-08-16
WO2000077529A2 (en) 2000-12-21
CA2365956A1 (en) 2000-12-21
CN1355889A (zh) 2002-06-26
CN1171095C (zh) 2004-10-13
HK1044820A1 (en) 2002-11-01

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Legal Events

Date Code Title Description
FC2A Withdrawal, rejection or dismissal of laid open patent application