KR940022907A - 비대칭 엘디디(ldd) 접합 박막트랜지스터 - Google Patents

비대칭 엘디디(ldd) 접합 박막트랜지스터 Download PDF

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Publication number
KR940022907A
KR940022907A KR1019930005434A KR930005434A KR940022907A KR 940022907 A KR940022907 A KR 940022907A KR 1019930005434 A KR1019930005434 A KR 1019930005434A KR 930005434 A KR930005434 A KR 930005434A KR 940022907 A KR940022907 A KR 940022907A
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KR
South Korea
Prior art keywords
thin film
film transistor
junction
drain
asymmetric
Prior art date
Application number
KR1019930005434A
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English (en)
Inventor
채기성
Original Assignee
이헌조
주식회사 금성사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이헌조, 주식회사 금성사 filed Critical 이헌조
Priority to KR1019930005434A priority Critical patent/KR940022907A/ko
Priority to JP6063572A priority patent/JPH07142718A/ja
Priority to US08/220,665 priority patent/US5442215A/en
Publication of KR940022907A publication Critical patent/KR940022907A/ko

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • H01L29/78624Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile the source and the drain regions being asymmetrical
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78612Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device for preventing the kink- or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thin Film Transistor (AREA)

Abstract

본 발명은 비대칭 엘디디 접합 박막트랜지스터에 관한 것으로, 종래 박막트랜지스터는 소오스, 드레인전극과 활성층 사이에서 접합이 형성되므로 전하농도차이 때문에 계단모양의 에너지 밴드가 생기된다.
이때 드레인 전압을 인가하여 호울은 소오스쪽 접합에 형성된 에너지단차에 축적되고, 접합에 형성된 에너지 단차을 능가하는 드레인전압이 되며 갑작스런 전류의 흐름이 발생하는 킹크현상이 발생되므로 구동소자의 동작특성이 불안정한 문제점이 있었다.
본 발명은 이러한 문제점을 해결하기 위하여 소오스쪽에는 이온을 주입하지 않고 드레인쪽에만 이온을 주입하고, 드레인전압이 증가하더라도 킹크현상이 발생하지 않도록 함으로써 구동소자의 동작특성을 안정하게 하는 장치를 창안한 것이다.

Description

비대칭 엘디디(LDD) 접합 박막트랜지스터
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제6도는 본 발명 비대칭 엘디디 접합 박막트랜지스터의 수직 단면도, 제7도는 제6도에 대한 반도체층의 에너지밴드 상태도.

Claims (3)

  1. 박막트랜지스터에 있어서 접합형성을 위한 이온주입을 드레인쪽에만 이중도핑하여 비대칭 엘디디 접합 구조를 갖도록 함을 특징으로 하는 비대칭 엘디디(LDD) 접합 박막트랜지스터.
  2. 제1항에 있어서, 금속과의 양호한 접촉을 위해 드레인, 소오스, 게이트가 형성될 부분에 실리사이드를 형성하는 것을 특징으로 하는 비대칭 엘디디(LDD) 접합 박막트랜지스터.
  3. 제1항에 있어서, 접합형성시 불순물 n형 또는 P형을 주입하여 P-채널 이나 n-채널 트랜지스터를 제조하여 사용하는 것을 특징으로 하는 비대칭 엘디디(LDD) 접합 박막트랜지스터.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930005434A 1993-03-31 1993-03-31 비대칭 엘디디(ldd) 접합 박막트랜지스터 KR940022907A (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019930005434A KR940022907A (ko) 1993-03-31 1993-03-31 비대칭 엘디디(ldd) 접합 박막트랜지스터
JP6063572A JPH07142718A (ja) 1993-03-31 1994-03-31 非対称ldd接合薄膜トランジスタ
US08/220,665 US5442215A (en) 1993-03-31 1994-03-31 Thin film transistor having an asymmetrical lightly doped drain structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930005434A KR940022907A (ko) 1993-03-31 1993-03-31 비대칭 엘디디(ldd) 접합 박막트랜지스터

Publications (1)

Publication Number Publication Date
KR940022907A true KR940022907A (ko) 1994-10-21

Family

ID=19353329

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930005434A KR940022907A (ko) 1993-03-31 1993-03-31 비대칭 엘디디(ldd) 접합 박막트랜지스터

Country Status (3)

Country Link
US (1) US5442215A (ko)
JP (1) JPH07142718A (ko)
KR (1) KR940022907A (ko)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3030368B2 (ja) * 1993-10-01 2000-04-10 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
US6777763B1 (en) 1993-10-01 2004-08-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for fabricating the same
KR100189964B1 (ko) * 1994-05-16 1999-06-01 윤종용 고전압 트랜지스터 및 그 제조방법
US20020197393A1 (en) * 2001-06-08 2002-12-26 Hideaki Kuwabara Process of manufacturing luminescent device
US8923048B2 (en) 2012-04-13 2014-12-30 Sandisk Technologies Inc. 3D non-volatile storage with transistor decoding structure
US9202694B2 (en) 2013-03-04 2015-12-01 Sandisk 3D Llc Vertical bit line non-volatile memory systems and methods of fabrication
US9165933B2 (en) 2013-03-07 2015-10-20 Sandisk 3D Llc Vertical bit line TFT decoder for high voltage operation
US9240420B2 (en) 2013-09-06 2016-01-19 Sandisk Technologies Inc. 3D non-volatile storage with wide band gap transistor decoder
US9362338B2 (en) 2014-03-03 2016-06-07 Sandisk Technologies Inc. Vertical thin film transistors in non-volatile storage systems
US9379246B2 (en) 2014-03-05 2016-06-28 Sandisk Technologies Inc. Vertical thin film transistor selection devices and methods of fabrication
US9450023B1 (en) 2015-04-08 2016-09-20 Sandisk Technologies Llc Vertical bit line non-volatile memory with recessed word lines

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4050965A (en) * 1975-10-21 1977-09-27 The United States Of America As Represented By The Secretary Of The Air Force Simultaneous fabrication of CMOS transistors and bipolar devices
JPS58127379A (ja) * 1982-01-25 1983-07-29 Nippon Telegr & Teleph Corp <Ntt> 絶縁ゲ−ト形トランジスタ
DE3544187A1 (de) * 1985-12-13 1987-06-19 Flowtec Ag Kapazitaetsmessschaltung
JPS63204769A (ja) * 1987-02-20 1988-08-24 Nippon Telegr & Teleph Corp <Ntt> 薄膜トランジスタの製造方法
SE461490B (sv) * 1987-08-24 1990-02-19 Asea Ab Mos-transistor utbildad paa ett isolerande underlag
US4899202A (en) * 1988-07-08 1990-02-06 Texas Instruments Incorporated High performance silicon-on-insulator transistor with body node to source node connection
JPH02239669A (ja) * 1989-03-14 1990-09-21 Fujitsu Ltd Soi構造電界効果トランジスタ
JP2839375B2 (ja) * 1991-01-14 1998-12-16 三菱電機株式会社 半導体集積回路装置
JPH04306843A (ja) * 1991-04-03 1992-10-29 Mitsubishi Electric Corp 半導体装置およびその製造方法

Also Published As

Publication number Publication date
US5442215A (en) 1995-08-15
JPH07142718A (ja) 1995-06-02

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