KR930022528A - 수지 봉지형 반도체 장치 - Google Patents

수지 봉지형 반도체 장치 Download PDF

Info

Publication number
KR930022528A
KR930022528A KR1019930006966A KR930006966A KR930022528A KR 930022528 A KR930022528 A KR 930022528A KR 1019930006966 A KR1019930006966 A KR 1019930006966A KR 930006966 A KR930006966 A KR 930006966A KR 930022528 A KR930022528 A KR 930022528A
Authority
KR
South Korea
Prior art keywords
substrate
resin
semiconductor device
semiconductor element
metal
Prior art date
Application number
KR1019930006966A
Other languages
English (en)
Other versions
KR960012648B1 (en
Inventor
노리아끼 도우센
노부유끼 사또
고우지 아라끼
Original Assignee
사토 후미오
가부시끼가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 사토 후미오, 가부시끼가이샤 도시바 filed Critical 사토 후미오
Publication of KR930022528A publication Critical patent/KR930022528A/ko
Application granted granted Critical
Publication of KR960012648B1 publication Critical patent/KR960012648B1/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/16Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334Auxiliary members in encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49517Additional leads
    • H01L23/49531Additional leads the additional leads being a wiring board
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147Copper (Cu) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01074Tungsten [W]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015Shape
    • H01L2924/1016Shape being a cuboid
    • H01L2924/10162Shape being a cuboid with a square active surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

본 발명은 반도체 소자의 실장 밀도를 향상하고, 포화열 저항값을 작게해서 허용가능한 파워 손실을 크게하는 것을 목적으로 한다. 단면이 그자형 형성된 금속판(21)은 그 상면 부재(21a)의 내면상에 제2절연회로기판(23)을 설치하고, 그 하면 부재(21b)의 내면상에 제1절연회로 기판(22)을 설치한다. 이들 제1 및 제2절연회로기판(22 및 23)상에 각각 복수의 금속 배선 패턴(24) 및 아우터리드(25)의 일단을 설치하고, 이들 금속 배선 패턴(24)상에 반도체 소자(26a 내지26e)를 도시하지 않은 땜납으로 고정한다. 반도체 소자(26a 내지26e) 및 금속 본딩 와이어(28)의 표면상에 표면 보호재(27)가 도포되고, 상기 제1, 제2절연회로 기판(22 및 23) 및 상기 금속판(21)이 수지 (30)으로 봉지되며, 수지(30)에서 아우터리드(25)의 타단이 돌출해 있다. 따라서 반도체 소자의 실장 밀도를 향상할 수 있어서 포화열 저항값을 작게할 수 있다.

Description

수지 봉지형 반도체 장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도(a)는 본 발명의 제1실시예에 의한 수지 봉지형 반도체 장치의 제조방법을 도시하는 것으로, 금속판 상에 제1 및 제2절연 회로 기판을 설치하고, 이들 절연 회로 기판상에 금속 배선 패턴 및 반도체 소자를 설치하는 공정을 도시하는 단면도.
제1도(b)는 제1도(a)에 도시하는 반도체 장치의 평면도.
제2도는 본 발명의 제1실시예에 의한 수지 봉지형 반도체 장치의 제조방법을 도시하는 것으로, 금속판을 그 자형 단면이 되도록 굴고하고, 이 금소판 및 제1, 제2정연회로 기판을 수지 봉지한 단면도.

Claims (4)

  1. 서로 대향하는 제1, 제2면을 가지고, 단면이 그 자형으로 형성된 기판(21), 상기 기판의 제1면상에 설치된 제1절연기판(22), 상기 기판의 제2면상에 설치된 제2절연기판(23), 상기 제1 및 제2절연기판상에 각각 설치된 제1, 제2반도체 회로(26a 내지 26e), 상기 제1 및 제2절연기판에 각각 일단이 설치되고, 상기 반도체 회로와 전기적으로 접속된 제1 및 제2아우터 리드(25a 내지 25f) 및 상기 제1 및 제2아우터 리드의 타단이 노출하여 상기 제1, 제2절연 기판 및 상기 기판을 봉지하기 위한 수지(30)을 포함하는 것을 특징으로 하는 수지 봉지형 반도체장치.
  2. 서로 대향하는 제1, 제2면을 가지고, 단면이 그 자형으로 형성된 기판(21), 상기 기판의 제1면상에 설치된 제1절연기판(22), 상기 기판의 제2면상에 설치된 제2절연기판(23), 상기 제1 및 제2절연기판상에 각각 설치된 제1, 제2면의 상호간 및 상기 제1, 제2절연기판을 봉지하기 위한 수지(30)을 포함하는 것을 특징으로 하는 수지 봉지형 반도체 장치.
  3. 제1항에 있어서,상기 기판은 금속으로 이루어지는 것을 특징으로 하는 수지 봉지형 반도체 장치.
  4. 제2항에 있어서, 상기 기판은 금속으로 이루어지는 것을 특징으로 하는 수지 봉지형 반도체 장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR93006966A 1992-04-27 1993-04-26 Resin-seal type semiconductor device KR960012648B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP4107786A JP2829188B2 (ja) 1992-04-27 1992-04-27 樹脂封止型半導体装置
JP92-107786 1992-04-27

Publications (2)

Publication Number Publication Date
KR930022528A true KR930022528A (ko) 1993-11-24
KR960012648B1 KR960012648B1 (en) 1996-09-23

Family

ID=14467994

Family Applications (1)

Application Number Title Priority Date Filing Date
KR93006966A KR960012648B1 (en) 1992-04-27 1993-04-26 Resin-seal type semiconductor device

Country Status (3)

Country Link
US (1) US5332921A (ko)
JP (1) JP2829188B2 (ko)
KR (1) KR960012648B1 (ko)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07115151A (ja) * 1993-10-14 1995-05-02 Toshiba Corp 半導体装置及びその製造方法
US5600181A (en) * 1995-05-24 1997-02-04 Lockheed Martin Corporation Hermetically sealed high density multi-chip package
KR100192180B1 (ko) * 1996-03-06 1999-06-15 김영환 멀티-레이어 버텀 리드 패키지
US5814884C1 (en) 1996-10-24 2002-01-29 Int Rectifier Corp Commonly housed diverse semiconductor die
US6144093A (en) * 1998-04-27 2000-11-07 International Rectifier Corp. Commonly housed diverse semiconductor die with reduced inductance
US6300679B1 (en) * 1998-06-01 2001-10-09 Semiconductor Components Industries, Llc Flexible substrate for packaging a semiconductor component
US6265771B1 (en) * 1999-01-27 2001-07-24 International Business Machines Corporation Dual chip with heat sink
WO2003071601A2 (de) * 2002-02-18 2003-08-28 Infineon Technologies Ag Schaltungsmodul und verfahren zu seiner herstellung
DE10214953A1 (de) 2002-04-04 2003-10-30 Infineon Technologies Ag Leistungsmodul mit mindestens zwei Substraten und Verfahren zu seiner Herstellung
KR100699823B1 (ko) * 2003-08-05 2007-03-27 삼성전자주식회사 저가형 플랙서블 필름 패키지 모듈 및 그 제조방법
US7767543B2 (en) * 2005-09-06 2010-08-03 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a micro-electro-mechanical device with a folded substrate
JP4687430B2 (ja) * 2005-12-06 2011-05-25 株式会社デンソー 電子装置およびその製造方法
JP5018483B2 (ja) * 2006-01-25 2012-09-05 日本電気株式会社 電子デバイスパッケージ、モジュール、および電子機器
JP4697118B2 (ja) * 2006-10-23 2011-06-08 株式会社デンソー 電子装置
DE102006056363B4 (de) * 2006-11-29 2010-12-09 Infineon Technologies Ag Halbleitermodul mit mindestens zwei Substraten und Verfahren zur Herstellung eines Halbleitermoduls mit zwei Substraten
US7851908B2 (en) * 2007-06-27 2010-12-14 Infineon Technologies Ag Semiconductor device
JP5257096B2 (ja) * 2009-01-23 2013-08-07 サンケン電気株式会社 半導体装置
DE102010042168A1 (de) * 2010-10-07 2012-04-12 Robert Bosch Gmbh Elektronische Baugruppe sowie Verfahren zu deren Herstellung
DE102012209034A1 (de) * 2012-05-30 2013-12-05 Robert Bosch Gmbh Elektronikmodul sowie Verfahren zur Herstellung eines solchen Elektronikmoduls, sowie elektronisches Steuergerät mit einem solchen Elektronikmodul
JP6258635B2 (ja) * 2013-07-31 2018-01-10 京セラ株式会社 回路基板および電子装置
JP5791670B2 (ja) * 2013-08-02 2015-10-07 株式会社日立製作所 電力変換装置
US20150075849A1 (en) * 2013-09-17 2015-03-19 Jia Lin Yap Semiconductor device and lead frame with interposer
WO2019037867A1 (en) * 2017-08-25 2019-02-28 Huawei Technologies Co., Ltd. SEMICONDUCTOR MODULE AND METHOD FOR MANUFACTURING THE SAME
JP2020004784A (ja) * 2018-06-26 2020-01-09 三菱電機株式会社 パワーモジュールおよび電力変換装置
US11469163B2 (en) 2019-08-02 2022-10-11 Semiconductor Components Industries, Llc Low stress asymmetric dual side module

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR910001419B1 (ko) * 1987-03-31 1991-03-05 가부시키가이샤 도시바 수지봉합형 집적회로장치
US4862322A (en) * 1988-05-02 1989-08-29 Bickford Harry R Double electronic device structure having beam leads solderlessly bonded between contact locations on each device and projecting outwardly from therebetween
JPH0671062B2 (ja) * 1989-08-30 1994-09-07 株式会社東芝 樹脂封止型半導体装置

Also Published As

Publication number Publication date
JP2829188B2 (ja) 1998-11-25
JPH05304247A (ja) 1993-11-16
KR960012648B1 (en) 1996-09-23
US5332921A (en) 1994-07-26

Similar Documents

Publication Publication Date Title
KR930022528A (ko) 수지 봉지형 반도체 장치
KR950007070A (ko) 반도체 디바이스 패키지 제조 방법
US5663593A (en) Ball grid array package with lead frame
US7239029B2 (en) Packages for semiconductor die
KR970058407A (ko) 표면 실장형 반도체 패키지와 그 제조방법
KR930006816A (ko) 반도체 장치 및 그 제조방법
KR870011691A (ko) 반도체 장치 및 그 제조방법
KR940022808A (ko) 반도체 디바이스 및 그 제조방법과 리이드 프레임 및 탑재기판
KR940012549A (ko) 반도체 펙케지
KR900007301B1 (ko) 반도체패키지
US5406119A (en) Lead frame
KR960035997A (ko) 반도체 패키지 및 그 제조방법
KR100244708B1 (ko) 반도체 패키지
US20230395478A1 (en) Chip scale qfn plastic packaging system for high frequency integrated circuits
JPS62229860A (ja) Icの封止構造
KR930009025A (ko) 반도체장치
JPS6215840A (ja) 電子素子用チツプキヤリア
KR100221917B1 (ko) 이층 리드 구조를 갖는 고방열 반도체 패키지 및 그의 제조 방법
JPS6225444A (ja) 連続配線基板
KR200156148Y1 (ko) 반도체 패키지
JPH03255655A (ja) 半導体装置
KR200248776Y1 (ko) 기판실장형반도체패키지
KR100306230B1 (ko) 반도체 패키지 구조
KR19980019661A (ko) 홈이 형성된 인쇄회로기판을 이용한 COB(Chip On Board)패키지
KR100427541B1 (ko) 패턴 필름 제조 방법 및 이를 이용한 칩 모듈

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20060907

Year of fee payment: 11

LAPS Lapse due to unpaid annual fee