KR920015464A - 반도체 장치의 전극배선층 및 그 제조방법 - Google Patents
반도체 장치의 전극배선층 및 그 제조방법 Download PDFInfo
- Publication number
- KR920015464A KR920015464A KR1019910023199A KR910023199A KR920015464A KR 920015464 A KR920015464 A KR 920015464A KR 1019910023199 A KR1019910023199 A KR 1019910023199A KR 910023199 A KR910023199 A KR 910023199A KR 920015464 A KR920015464 A KR 920015464A
- Authority
- KR
- South Korea
- Prior art keywords
- conductive layer
- layer
- insulating layer
- semiconductor device
- electrode wiring
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims 2
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000005530 etching Methods 0.000 claims 1
- 238000000059 patterning Methods 0.000 claims 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
- H01L21/76889—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by forming silicides of refractory metals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53271—Conductive materials containing semiconductor material, e.g. polysilicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4983—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET with a lateral structure, e.g. a Polysilicon gate with a lateral doping variation or with a lateral composition variation or characterised by the sidewalls being composed of conductive, resistive or dielectric material
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/05—Making the transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Memories (AREA)
- Electrodes Of Semiconductors (AREA)
- Local Oxidation Of Silicon (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 이 발명의 한 실시예의 DRAM의 메모리셀의 평면구조도. 제2도는 제1도중의 절단선 A-A에 따른 방향으로부터의 단면구조도. 제3도는 제1도중의 절단선 B-B에 따른 방향으로부터의 단면구조도.
Claims (2)
- 소정의 방향으로 뻗는 제1도전층과, 상기 제1도전층의 측면에 형성된 제2도전층과, 상기 제1도전층과 상기 제2도전층의상부표면을 덮는 상부절연층과, 상기 제2도전층의 측부표면을 덮는 측부절연층을 구비한, 반도체장치의 전극배선층.
- 절연층상에 제1도전층 및 제1절연층을 순차형성하는 공정과, 상기 제1도전층 및 상기 제1절연층을 소정의 형상으로 패터닝하는 공정과, 상기 제1도전층의 측벽에 제2의 도전층을 형성하는 공정과, 상기 제1절연층 및 상기 제2도전층의 표면상에 제2절연층을 형성하는 공정과, 상기 제2도전층을 에칭하여 상기 제2도전층의 측부표면상에 상기 제2절연층을 잔여시키는 공정과를 구비한, 반도체장치의 전극용 배선층의 제조방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP91-719 | 1991-01-08 | ||
JP3000719A JPH04242938A (ja) | 1991-01-08 | 1991-01-08 | 半導体装置およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920015464A true KR920015464A (ko) | 1992-08-26 |
KR950001838B1 KR950001838B1 (ko) | 1995-03-03 |
Family
ID=11481560
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910023199A KR950001838B1 (ko) | 1991-01-08 | 1991-12-17 | 반도체장치의 전극배선층 및 그 제조방법 |
Country Status (4)
Country | Link |
---|---|
US (2) | US5502324A (ko) |
JP (1) | JPH04242938A (ko) |
KR (1) | KR950001838B1 (ko) |
DE (1) | DE4200284C2 (ko) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5640038A (en) * | 1995-11-22 | 1997-06-17 | Vlsi Technology, Inc. | Integrated circuit structure with self-planarized layers |
JP2765544B2 (ja) * | 1995-12-26 | 1998-06-18 | 日本電気株式会社 | 半導体装置の製造方法 |
US5846873A (en) * | 1996-02-02 | 1998-12-08 | Micron Technology, Inc. | Method of creating ultra-small nibble structures during mosfet fabrication |
US5869391A (en) | 1996-08-20 | 1999-02-09 | Micron Technology, Inc. | Semiconductor method of making electrical connection between an electrically conductive line and a node location, and integrated circuitry |
US6486060B2 (en) * | 1998-09-03 | 2002-11-26 | Micron Technology, Inc. | Low resistance semiconductor process and structures |
US7119024B2 (en) * | 2003-07-10 | 2006-10-10 | Micron Technology, Inc. | Method and structure for a self-aligned silicided word line and polysilicon plug during the formation of a semiconductor device |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2139418A (en) * | 1983-05-05 | 1984-11-07 | Standard Telephones Cables Ltd | Semiconductor devices and conductors therefor |
JPH0616554B2 (ja) * | 1984-05-09 | 1994-03-02 | 株式会社日立製作所 | 半導体装置の製造方法 |
FR2582446B1 (fr) * | 1985-05-24 | 1987-07-17 | Thomson Csf | Dispositif semi-conducteur photosensible et procede de fabrication d'un tel procede |
JPS62169472A (ja) * | 1986-01-22 | 1987-07-25 | Hitachi Ltd | 半導体集積回路装置 |
US4847674A (en) * | 1987-03-10 | 1989-07-11 | Advanced Micro Devices, Inc. | High speed interconnect system with refractory non-dogbone contacts and an active electromigration suppression mechanism |
JPS63284857A (ja) * | 1987-05-18 | 1988-11-22 | Toshiba Corp | 半導体装置及びその製造方法 |
KR910010167B1 (ko) * | 1988-06-07 | 1991-12-17 | 삼성전자 주식회사 | 스택 캐패시터 dram셀 및 그의 제조방법 |
JPH0232544A (ja) * | 1988-07-22 | 1990-02-02 | Hitachi Ltd | 半導体集積回路 |
JP2738542B2 (ja) * | 1988-09-07 | 1998-04-08 | 富士通株式会社 | コヒーレント光通信方式 |
US5113238A (en) * | 1989-01-06 | 1992-05-12 | Wang Chen Chin | Contactless non-volatile memory array cells |
JPH0734475B2 (ja) * | 1989-03-10 | 1995-04-12 | 株式会社東芝 | 半導体装置 |
JPH02271628A (ja) * | 1989-04-13 | 1990-11-06 | Fujitsu Ltd | 半導体装置 |
US5124280A (en) * | 1991-01-31 | 1992-06-23 | Sgs-Thomson Microelectronics, Inc. | Local interconnect for integrated circuits |
US5262343A (en) * | 1991-04-12 | 1993-11-16 | Micron Technology, Inc. | DRAM stacked capacitor fabrication process |
-
1991
- 1991-01-08 JP JP3000719A patent/JPH04242938A/ja active Pending
- 1991-12-17 KR KR1019910023199A patent/KR950001838B1/ko not_active IP Right Cessation
-
1992
- 1992-01-08 DE DE4200284A patent/DE4200284C2/de not_active Expired - Fee Related
-
1994
- 1994-12-23 US US08/363,548 patent/US5502324A/en not_active Expired - Fee Related
-
1995
- 1995-06-05 US US08/463,809 patent/US5627093A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US5627093A (en) | 1997-05-06 |
US5502324A (en) | 1996-03-26 |
KR950001838B1 (ko) | 1995-03-03 |
DE4200284C2 (de) | 1994-03-17 |
JPH04242938A (ja) | 1992-08-31 |
DE4200284A1 (de) | 1992-07-09 |
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FPAY | Annual fee payment |
Payment date: 20010222 Year of fee payment: 7 |
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