KR910003798A - 반도체 집적 회로 - Google Patents

반도체 집적 회로

Info

Publication number
KR910003798A
KR910003798A KR1019900009110A KR900009110A KR910003798A KR 910003798 A KR910003798 A KR 910003798A KR 1019900009110 A KR1019900009110 A KR 1019900009110A KR 900009110 A KR900009110 A KR 900009110A KR 910003798 A KR910003798 A KR 910003798A
Authority
KR
South Korea
Prior art keywords
integrated circuit
semiconductor integrated
semiconductor
circuit
integrated
Prior art date
Application number
KR1019900009110A
Other languages
English (en)
Other versions
KR940005203B1 (ko
Inventor
데쓰 다시로
미루 다게우찌
요시유끼 이시마루
신이찌 히로세
가스오 하야시
Original Assignee
미쓰비시 뎅끼 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 미쓰비시 뎅끼 가부시끼가이샤 filed Critical 미쓰비시 뎅끼 가부시끼가이샤
Publication of KR910003798A publication Critical patent/KR910003798A/ko
Application granted granted Critical
Publication of KR940005203B1 publication Critical patent/KR940005203B1/ko

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31701Arrangements for setting the Unit Under Test [UUT] in a test mode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Quality & Reliability (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Microcomputers (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Dram (AREA)
KR1019900009110A 1989-07-11 1990-06-21 반도체 집적 회로 KR940005203B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1178417A JP2650124B2 (ja) 1989-07-11 1989-07-11 半導体集積回路
JP89-178417 1989-07-11

Publications (2)

Publication Number Publication Date
KR910003798A true KR910003798A (ko) 1991-02-28
KR940005203B1 KR940005203B1 (ko) 1994-06-13

Family

ID=16048134

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900009110A KR940005203B1 (ko) 1989-07-11 1990-06-21 반도체 집적 회로

Country Status (5)

Country Link
US (1) US5113093A (ko)
EP (1) EP0408353B1 (ko)
JP (1) JP2650124B2 (ko)
KR (1) KR940005203B1 (ko)
DE (1) DE69031671T2 (ko)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5412260A (en) * 1991-05-03 1995-05-02 Lattice Semiconductor Corporation Multiplexed control pins for in-system programming and boundary scan state machines in a high density programmable logic device
US5396639A (en) * 1991-09-16 1995-03-07 Rohm Co., Ltd. One chip microcomputer having programmable I/O terminals programmed according to data stored in nonvolatile memory
EP0545581B1 (en) * 1991-12-06 1999-04-21 National Semiconductor Corporation Integrated data processing system including CPU core and parallel, independently operating DSP module
JPH07110803A (ja) * 1993-10-13 1995-04-25 Nec Corp シングルチップマイクロコンピュータ
US5608341A (en) * 1995-05-09 1997-03-04 Level One Communications, Inc. Electrical circuit for setting internal chip functions without dedicated configuration pins
US5926504A (en) * 1995-06-05 1999-07-20 Level One Communications, Inc. Electrical circuit for selectively connecting a repeater to a DTE port
SE505556C2 (sv) * 1995-12-21 1997-09-15 Ericsson Telefon Ab L M Förfarande för inställning av en integrerad krets i ett förutbestämt av minst två skilda driftlägen samt integrerad krets
JP3484296B2 (ja) * 1996-06-28 2004-01-06 ブラザー工業株式会社 半導体集積回路
JP2885213B2 (ja) * 1997-01-23 1999-04-19 日本電気株式会社 半導体集積回路
US6603331B1 (en) * 2001-12-18 2003-08-05 Xilinx, Inc. Low-voltage non-degenerative transmitter circuit
US7557604B2 (en) * 2005-05-03 2009-07-07 Oki Semiconductor Co., Ltd. Input circuit for mode setting
JP2007171060A (ja) * 2005-12-23 2007-07-05 Toshiba Corp 動作モード設定回路、動作モード設定回路を有するlsi、及び動作モード設定方法
KR100656455B1 (ko) * 2005-12-27 2006-12-11 주식회사 하이닉스반도체 반도체 메모리의 액티브 싸이클 제어장치 및 방법

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4350906A (en) * 1978-06-23 1982-09-21 Rca Corporation Circuit with dual-purpose terminal
JPS57174756A (en) * 1981-04-21 1982-10-27 Toshiba Corp Controlling system for mode setting
JPS58115547A (ja) * 1981-12-29 1983-07-09 Fujitsu Ltd マイクロプロセツサの動作モ−ド設定方式
JPS6031641A (ja) * 1983-08-02 1985-02-18 Nippon Denso Co Ltd ワンチツプマイクロコンピユ−タ
JPS61292755A (ja) * 1985-06-20 1986-12-23 Fujitsu Ltd 半導体集積回路
JPS62118557A (ja) * 1985-11-19 1987-05-29 Ricoh Co Ltd 半導体集積回路装置のモ−ド切換え回路
JPH0760859B2 (ja) * 1985-11-19 1995-06-28 沖電気工業株式会社 半導体装置及びその製造方法
JPH0682405B2 (ja) * 1986-01-14 1994-10-19 カシオ計算機株式会社 テストプログラム起動方式
JPS63298173A (ja) * 1987-05-29 1988-12-05 Matsushita Electric Ind Co Ltd 集積回路
US4816665A (en) * 1987-08-06 1989-03-28 Maxtor Corporation Sensor array for focus detection
JPH081760B2 (ja) * 1987-11-17 1996-01-10 三菱電機株式会社 半導体記憶装置
JPH0697560B2 (ja) * 1987-11-19 1994-11-30 三菱電機株式会社 半導体記憶装置
EP0317939B1 (en) * 1987-11-25 1994-03-09 Nec Corporation Input circuit incorporated in a semiconductor device
KR910003593B1 (ko) * 1987-12-30 1991-06-07 삼성전자 주식회사 고집적도 메모리용 모드 선택회로
US4987325A (en) * 1988-07-13 1991-01-22 Samsung Electronics Co., Ltd. Mode selecting circuit for semiconductor memory device
JP2569777B2 (ja) * 1988-12-16 1997-01-08 日本電気株式会社 入力信号切り換え回路
US4940909A (en) * 1989-05-12 1990-07-10 Plus Logic, Inc. Configuration control circuit for programmable logic devices

Also Published As

Publication number Publication date
US5113093A (en) 1992-05-12
DE69031671D1 (de) 1997-12-11
JP2650124B2 (ja) 1997-09-03
KR940005203B1 (ko) 1994-06-13
DE69031671T2 (de) 1998-06-04
EP0408353A3 (en) 1992-01-02
EP0408353A2 (en) 1991-01-16
JPH0342732A (ja) 1991-02-22
EP0408353B1 (en) 1997-11-05

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Legal Events

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A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20060612

Year of fee payment: 13

LAPS Lapse due to unpaid annual fee