KR900002320A - 반도체메모리셀 및 반도체메모리 - Google Patents
반도체메모리셀 및 반도체메모리 Download PDFInfo
- Publication number
- KR900002320A KR900002320A KR1019890009714A KR890009714A KR900002320A KR 900002320 A KR900002320 A KR 900002320A KR 1019890009714 A KR1019890009714 A KR 1019890009714A KR 890009714 A KR890009714 A KR 890009714A KR 900002320 A KR900002320 A KR 900002320A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor memory
- mos transistor
- memory cell
- vbb
- substrate potential
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
내용 없음.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 반도체메모리셀의 1실시예를 나타낸 등가회로도.
제2도는 제1도의 메모리셀 구조의 일예를 나타낸 단면도.
제3도는 제1도중의 MOS트랜지스터의 기판바이어효과를 나타낸 특성도.
Claims (6)
1개의 MOS트랜지스터(T)의 전류통로의 일단에 1개의 용량소자(C)가 접속되고, 다른단에는 비트선(BL)이 접속되며, 그 게이트전극(G)에는 워드선(WL)이 접속된 구조의 MOS다이나믹형 반도체메모리셀에 있어서, 상기 MOS트랜지스터(T)가 시간적, 선택적으로 증가형 또는 임계치전압손실이 생기지 않는 공핍형이 되도록 그 기판전위(Vbb)가 절환제어되도록 된 것을 특징으로 하는 반도체메모리셀.
제1항에 있어서, 상기 반도체메모리셀이 절연기판(52)상의 실리콘기판영역 (53, 54, 55)상에 형성된 것을 특징으로 하는 반도체메모리셀.
제1항에 있어서, 상기 반도체메모셀의 어레이를 갖추고 있으면서, 상기 MOS트랜지스터(T)가 시간적, 선택적으로 증가형 또는 임계치전압손실이 생기지 않는 공핍형이 되도록 그 기판전위(Vbb)를 절환제어하기 위한 회로수단을 구비하여 구성된 것을 특징으로 하는 반도체메모리.
제3항에 있어서, 상기 MOS트랜지스터(T)의 게이트전극(G)에 접속되어 있는 워드선(WL)의 활성화 전압으로 상기 MOS트랜지스터(T)의 다른단에 접속되어 있는 비트선(BL)의 논리진폭한계레벨을 이용하도록 된 것을 특징으로 하는 반도체메모리.
제3항에 있어서, 상기 MOS트랜지스터(T)의 실리콘기판영역(53,54,55)이 부유상태로 되어 있고, 상기 실리콘기판영역(53,54,55)이 정전결합되도록 용량소자(61)가 형성되어 있으며, 이 용량소자(61)를 매개로 상기 기판전위(Vbb)가 절환제어되도록 된 것을 특징으로 하는 반도체메모리.
3항 내지 5항중 어느 한 항에 있어서, 상기 반도체메모리셀의 어레이중에서 워드선선택이 행해지는 열의 메모리셀군에 구비된 각각의 MOS트랜지스터(T)가 모두 공핍형이 되도록 각각의 기판전위(Vbb)를 공통으로 절환제어하기 위한 회로수단을 구비하여 구성된 것을 특징으로 하는 반도체메모리.
※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63-169930 | 1988-07-07 | ||
JP63169930A JPH0666443B2 (ja) | 1988-07-07 | 1988-07-07 | 半導体メモリセルおよび半導体メモリ |
Publications (2)
Publication Number | Publication Date |
---|---|
KR900002320A true KR900002320A (ko) | 1990-02-28 |
KR930000854B1 KR930000854B1 (ko) | 1993-02-06 |
Family
ID=15895568
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019890009714A KR930000854B1 (ko) | 1988-07-07 | 1989-07-07 | 반도체메모리셀 및 반도체메모리 |
Country Status (5)
Country | Link |
---|---|
US (1) | US5148393A (ko) |
EP (1) | EP0350057B1 (ko) |
JP (1) | JPH0666443B2 (ko) |
KR (1) | KR930000854B1 (ko) |
DE (1) | DE68911044T2 (ko) |
Cited By (1)
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---|---|---|---|---|
US5531125A (en) * | 1993-12-24 | 1996-07-02 | Korea Institute Of Science And Technology | Method and device for simultaneously measuring the flow speed and the depth of a river |
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-
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- 1988-07-07 JP JP63169930A patent/JPH0666443B2/ja not_active Expired - Fee Related
-
1989
- 1989-07-06 US US07/375,909 patent/US5148393A/en not_active Expired - Lifetime
- 1989-07-07 EP EP89112468A patent/EP0350057B1/en not_active Expired - Lifetime
- 1989-07-07 DE DE89112468T patent/DE68911044T2/de not_active Expired - Fee Related
- 1989-07-07 KR KR1019890009714A patent/KR930000854B1/ko not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5531125A (en) * | 1993-12-24 | 1996-07-02 | Korea Institute Of Science And Technology | Method and device for simultaneously measuring the flow speed and the depth of a river |
Also Published As
Publication number | Publication date |
---|---|
KR930000854B1 (ko) | 1993-02-06 |
JPH0220062A (ja) | 1990-01-23 |
US5148393A (en) | 1992-09-15 |
DE68911044T2 (de) | 1994-05-05 |
EP0350057B1 (en) | 1993-12-01 |
DE68911044D1 (de) | 1994-01-13 |
JPH0666443B2 (ja) | 1994-08-24 |
EP0350057A1 (en) | 1990-01-10 |
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