JPWO2020149023A1 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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Abstract
Description
[第1の実施の形態]
第1の実施の形態の半導体装置について、図1及び図2を用いて説明する。図1は、第1の実施の形態の半導体装置の断面図であり、図2は、第1の実施の形態の半導体装置に含まれるセラミック回路基板の平面図である。なお、図2は、図1の一点鎖線Y−Yにおける半導体装置1の断面図(セラミック回路基板3の裏面図)を表している。このため、導電パターン3bについてはその配置位置を破線で表している。また、第1の実施の形態において、おもて面とは、図1の半導体装置1が上側を向いた面であり、例えば、セラミック回路基板3において半導体素子2が搭載された面がおもて面である。裏面とは、図1の半導体装置1において、下側を向いた面を表す。例えば、セラミック回路基板3において放熱板4が接合された面が裏面である。図1以外でもおもて面及び裏面は同様の方向性を意味する。例えば、図2は、セラミック回路基板3の裏面を表している。
0<凹部形成距離≦0.9×T12/第1距離(d1)、及び、
(1.1×T12/第1距離(d1))≦凹部形成距離<第2距離(d2)、
の少なくとも一方の範囲 ・・・(1)
(1.1×T12/第1距離(d1))≦端面間距離(e)<第2距離(d2)
・・・(6)
(1.2×T12/第1距離(d1))≦端面間距離(e)<第2距離(d2)
・・・(7)
0<凹部形成距離≦0.8×T12/第1距離(d1)、及び、
(1.2×T12/第1距離(d1))≦凹部形成距離<第2距離(d2)、
の少なくとも一方の範囲 ・・・(8)
第2の実施の形態では、セラミック回路基板3の金属板3cの裏面に形成するディンプルが金属板3cを貫通して形成されている場合について、図7を用いて説明する。図7は、第2の実施の形態の半導体装置の断面図である。すなわち、図7に示す半導体装置1aは、第1の実施の形態の半導体装置1のディンプル3c2を絶縁板3aまで貫通させた時の断面図である。なお、図7の半導体装置1aは、第1の実施の形態の半導体装置1と同じ構成には同じ符号を付しており、それらの詳細な説明については省略する。
2 半導体素子
2a1 第3端面
3,30 セラミック回路基板
3a 絶縁板
3b 導電パターン
3b1 第1端面
3c,30c 金属板
3c1,30c1 第2端面
3c2,30c2 ディンプル
3c3 角部領域
3c4 交差位置
3c5 形成範囲
4 放熱板
5a,5b はんだ
0<凹部形成距離≦(0.9×T12/第1距離(d1))、及び、
(1.1×T12/第1距離(d1))≦凹部形成距離<第2距離(d2)、
の少なくとも一方の範囲 ・・・(1)
Claims (6)
- 半導体素子と、
前記半導体素子がおもて面に配置され、厚さがT2の導電パターンと、前記導電パターンの裏面に形成され、厚さがT1の絶縁板と、前記絶縁板の裏面に形成され、複数の凹部が裏面に形成され、厚さがT3の金属板とを有する基板と、
を備え、
側面視で、前記導電パターンの第1端面は、前記金属板の第2端面よりも、前記基板の主面の水平方向であって前記基板の内側に第1距離、位置ずれして形成され、
前記半導体素子の第3端面は、前記第2端面よりも、前記水平方向であって前記内側に第2距離、位置ずれして形成され、
前記複数の凹部は、前記第1端面から前記水平方向であって前記内側に以下で表される凹部形成距離の範囲、
0<凹部形成距離≦0.9×T12/第1距離、及び、
(1.1×T12/第1距離)≦凹部形成距離<第2距離、
の少なくとも一方の範囲に形成されている、
半導体装置。 - 前記複数の凹部は、前記第1端面から前記水平方向であって前記内側に以下で表される凹部形成距離の範囲、
0<凹部形成距離≦0.8×T12/第1距離、及び、
(1.2×T12/第1距離)≦凹部形成距離<第2距離、
の少なくとも一方の範囲に形成されている、
請求項1に記載の半導体装置。 - 前記第1距離は、
0<第1距離≦(T22+T32−T12+2×T2×T3)1/2、
である、
請求項1または2に記載の半導体装置。 - 前記複数の凹部は、平面視で、前記導電パターン及び前記金属板の角部近傍を空けて、前記金属板に形成されている、
請求項1乃至3のいずれかに記載の半導体装置。 - 前記複数の凹部は、球欠形状または球台形状で、前記金属板を非貫通で、前記金属板に形成されている、
請求項1乃至4のいずれかに記載の半導体装置。 - 前記複数の凹部は、球台形状または円筒形状で、前記金属板を貫通して、前記金属板に形成されている、
請求項1乃至4のいずれかに記載の半導体装置。
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JP2019005278 | 2019-01-16 | ||
JP2019005278 | 2019-01-16 | ||
PCT/JP2019/046531 WO2020149023A1 (ja) | 2019-01-16 | 2019-11-28 | 半導体装置 |
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JPWO2020149023A1 true JPWO2020149023A1 (ja) | 2021-09-09 |
JP7052887B2 JP7052887B2 (ja) | 2022-04-12 |
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US (1) | US11521941B2 (ja) |
JP (1) | JP7052887B2 (ja) |
CN (1) | CN112352310A (ja) |
DE (1) | DE112019002922T5 (ja) |
WO (1) | WO2020149023A1 (ja) |
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TWI768801B (zh) * | 2021-03-31 | 2022-06-21 | 世界先進積體電路股份有限公司 | 半導體結構及其製作方法 |
US12027413B2 (en) | 2021-08-22 | 2024-07-02 | Vanguard International Semiconductor Corporation | Semiconductor structure and method of fabricating the same |
Citations (5)
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JP2006140401A (ja) * | 2004-11-15 | 2006-06-01 | Toshiba Corp | 半導体集積回路装置 |
US20080164588A1 (en) * | 2007-01-05 | 2008-07-10 | Fairchild Korea Semiconductor, Ltd. | High power semiconductor package |
JP2012114203A (ja) * | 2010-11-24 | 2012-06-14 | Mitsubishi Electric Corp | 絶縁基板とその製造方法および電力半導体装置 |
JP2015225948A (ja) * | 2014-05-28 | 2015-12-14 | Ngkエレクトロデバイス株式会社 | パワーモジュール用基板 |
US20180005956A1 (en) * | 2016-06-29 | 2018-01-04 | C-Mac Electromag Bvba | Electronic Circuit and Substrate with Identification Pattern for Separate Electronic Circuits and Method for Producing Thereof |
Family Cites Families (10)
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DE4318241C2 (de) | 1993-06-02 | 1995-06-29 | Schulz Harder Juergen | Metallbeschichtetes Substrat mit verbesserter Widerstandsfähigkeit gegen Temperaturwechselbeanspruchung |
JPH10189803A (ja) * | 1996-12-27 | 1998-07-21 | Nippon Inter Electronics Corp | 放熱板への絶縁基板取付構造 |
JP4427154B2 (ja) * | 2000-03-14 | 2010-03-03 | 株式会社東芝 | セラミックス回路基板 |
JP2003100965A (ja) | 2001-09-20 | 2003-04-04 | Denki Kagaku Kogyo Kk | 回路基板の信頼性評価方法及び回路基板 |
JP4692708B2 (ja) | 2002-03-15 | 2011-06-01 | Dowaメタルテック株式会社 | セラミックス回路基板およびパワーモジュール |
JP2013161996A (ja) * | 2012-02-07 | 2013-08-19 | Toyota Motor Corp | 半導体装置 |
CN103855142B (zh) * | 2012-12-04 | 2017-12-29 | 东芝照明技术株式会社 | 发光装置及照明装置 |
JP2016143846A (ja) * | 2015-02-05 | 2016-08-08 | 三菱電機株式会社 | 半導体装置 |
JP6907671B2 (ja) * | 2017-04-17 | 2021-07-21 | 富士電機株式会社 | 半導体装置 |
JP7047895B2 (ja) | 2018-03-01 | 2022-04-05 | 富士電機株式会社 | 半導体装置 |
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- 2019-11-28 WO PCT/JP2019/046531 patent/WO2020149023A1/ja active Application Filing
- 2019-11-28 JP JP2020566133A patent/JP7052887B2/ja active Active
- 2019-11-28 CN CN201980043056.6A patent/CN112352310A/zh active Pending
- 2019-11-28 DE DE112019002922.3T patent/DE112019002922T5/de active Pending
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Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2006140401A (ja) * | 2004-11-15 | 2006-06-01 | Toshiba Corp | 半導体集積回路装置 |
US20080164588A1 (en) * | 2007-01-05 | 2008-07-10 | Fairchild Korea Semiconductor, Ltd. | High power semiconductor package |
JP2012114203A (ja) * | 2010-11-24 | 2012-06-14 | Mitsubishi Electric Corp | 絶縁基板とその製造方法および電力半導体装置 |
JP2015225948A (ja) * | 2014-05-28 | 2015-12-14 | Ngkエレクトロデバイス株式会社 | パワーモジュール用基板 |
US20180005956A1 (en) * | 2016-06-29 | 2018-01-04 | C-Mac Electromag Bvba | Electronic Circuit and Substrate with Identification Pattern for Separate Electronic Circuits and Method for Producing Thereof |
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US20210118822A1 (en) | 2021-04-22 |
JP7052887B2 (ja) | 2022-04-12 |
DE112019002922T5 (de) | 2021-03-04 |
US11521941B2 (en) | 2022-12-06 |
WO2020149023A1 (ja) | 2020-07-23 |
CN112352310A (zh) | 2021-02-09 |
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