JP2019047094A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP2019047094A JP2019047094A JP2017172223A JP2017172223A JP2019047094A JP 2019047094 A JP2019047094 A JP 2019047094A JP 2017172223 A JP2017172223 A JP 2017172223A JP 2017172223 A JP2017172223 A JP 2017172223A JP 2019047094 A JP2019047094 A JP 2019047094A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- solder layer
- semiconductor device
- conductor spacer
- conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 85
- 229910000679 solder Inorganic materials 0.000 claims abstract description 60
- 229910052751 metal Inorganic materials 0.000 claims description 35
- 239000002184 metal Substances 0.000 claims description 35
- 239000004020 conductor Substances 0.000 description 73
- 125000006850 spacer group Chemical group 0.000 description 50
- 238000004519 manufacturing process Methods 0.000 description 12
- 230000005855 radiation Effects 0.000 description 12
- 229920005989 resin Polymers 0.000 description 12
- 239000011347 resin Substances 0.000 description 12
- 230000008646 thermal stress Effects 0.000 description 11
- 239000000463 material Substances 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 230000000630 rising effect Effects 0.000 description 4
- 238000004364 calculation method Methods 0.000 description 3
- 238000001816 cooling Methods 0.000 description 3
- 230000035882 stress Effects 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 239000003507 refrigerant Substances 0.000 description 1
- 239000011265 semifinished product Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
- H01L2224/331—Disposition
- H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/33181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
下面が半導体素子の上面にはんだ層を介して接合された金属体とを備える。
σ = E・h・α・ΔT
ここで、Eはヤング率、αは線膨張係数、ΔTは温度変化、hはフィレット高さ(はんだ層54が導体スペーサ18の側面18cをせり上がった高さ)を示す。一例として、半導体装置10の温度が0℃から100℃まで上昇したとして、はんだの線膨張係数を28.9×10−6μm/℃、はんだのヤング率を17.2×10−3N/μm2とすると、はんだ層54に生じる熱応力σは次のように求められる。図4(A)に示すフィレット形状の場合、フィレット高さhAを200(μm)とすると、単位面積当たりに与える応力σAは、0.010(N/μm2)となる。その計算式は、下記の通りである。
σA = 17.2×10-3(N/μm2)×28.9×10−6(μm/℃)×200(μm/μm2)×(100−0)(℃) = 0.010(N/μm2)
また、同様に図4(B)のフィレット形状の場合、フィレット高さhBを300(μm)とすると、単位面積当たりに与える応力σBは、0.015(N/μm2)となる。その計算式は、下記の通りである。
σB = 17.2×10-3(N/μm2)×28.9×10−6(μm/℃)×300(μm/μm2)×(100−0)(℃) = 0.015(N/μm2)
上記したように、はんだ層54に生じる熱応力は、図4(A)に示すフィレット形状(実施例)の場合では0.010(N/μm2)となるのに対し、図4(B)のフィレット形状の場合では0.015(N/μm2)となり、本技術を採用することではんだ層54に生じる熱応力は33%低減することができる。即ち、製造時におけるはんだのせり上がり(即ち、フィレット角度の増大)を抑制することによって、半導体装置10の使用時においてはんだ層54に生じる熱応力を低減し、半導体素子12に損傷を与えることを防止し得る。
12:半導体素子
12a:半導体素子の上面
12b:半導体素子の下面
14:上面電極
16:下面電極
18、118:導体スペーサ
18a:導体スペーサの上面
18b、118b:導体スペーサの下面
18c、118c:導体スペーサの側面
18d:導体スペーサの凹部
20:下面側導体板
20a:下面側導体板の上面
20b:下面側導体板の下面
22:上面側導体板
22a:上面側導体板の上面
22b:上面側導体板の下面
24、26:放熱板
24a、26a:フィン
28、30:絶縁シート
32:モールド樹脂
52、54、56:はんだ層
Claims (1)
- 半導体素子と、
下面が前記半導体素子の上面にはんだ層を介して接合された金属体と、
を備えており、
前記半導体素子の前記上面において前記はんだ層に接触する第1接合領域は、前記金属体の前記下面において前記はんだ層に接触する第2接合領域よりも大きく、
前記金属体の側面には、前記金属体の前記下面から離れた位置に凹部が設けられている、半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017172223A JP7130928B2 (ja) | 2017-09-07 | 2017-09-07 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017172223A JP7130928B2 (ja) | 2017-09-07 | 2017-09-07 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2019047094A true JP2019047094A (ja) | 2019-03-22 |
JP7130928B2 JP7130928B2 (ja) | 2022-09-06 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2017172223A Active JP7130928B2 (ja) | 2017-09-07 | 2017-09-07 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP7130928B2 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2020188164A (ja) * | 2019-05-15 | 2020-11-19 | 株式会社デンソー | 半導体装置 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07221265A (ja) * | 1994-01-28 | 1995-08-18 | Hitachi Ltd | パワー半導体モジュール |
JP2002110893A (ja) * | 2000-10-04 | 2002-04-12 | Denso Corp | 半導体装置 |
US20050218482A1 (en) * | 2004-04-01 | 2005-10-06 | Peter Chou | Top finger having a groove and semiconductor device having the same |
JP2012186273A (ja) * | 2011-03-04 | 2012-09-27 | Denso Corp | 半導体装置、金属ブロック体及びその製造方法 |
JP2015126057A (ja) * | 2013-12-26 | 2015-07-06 | トヨタ自動車株式会社 | 半導体モジュールの製造方法 |
-
2017
- 2017-09-07 JP JP2017172223A patent/JP7130928B2/ja active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07221265A (ja) * | 1994-01-28 | 1995-08-18 | Hitachi Ltd | パワー半導体モジュール |
JP2002110893A (ja) * | 2000-10-04 | 2002-04-12 | Denso Corp | 半導体装置 |
US20050218482A1 (en) * | 2004-04-01 | 2005-10-06 | Peter Chou | Top finger having a groove and semiconductor device having the same |
JP2012186273A (ja) * | 2011-03-04 | 2012-09-27 | Denso Corp | 半導体装置、金属ブロック体及びその製造方法 |
JP2015126057A (ja) * | 2013-12-26 | 2015-07-06 | トヨタ自動車株式会社 | 半導体モジュールの製造方法 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2020188164A (ja) * | 2019-05-15 | 2020-11-19 | 株式会社デンソー | 半導体装置 |
JP7172847B2 (ja) | 2019-05-15 | 2022-11-16 | 株式会社デンソー | 半導体装置 |
Also Published As
Publication number | Publication date |
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JP7130928B2 (ja) | 2022-09-06 |
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