JPS63193851U - - Google Patents
Info
- Publication number
- JPS63193851U JPS63193851U JP8577187U JP8577187U JPS63193851U JP S63193851 U JPS63193851 U JP S63193851U JP 8577187 U JP8577187 U JP 8577187U JP 8577187 U JP8577187 U JP 8577187U JP S63193851 U JPS63193851 U JP S63193851U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- circuit device
- mold
- packaged
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011347 resin Substances 0.000 claims description 5
- 229920005989 resin Polymers 0.000 claims description 5
- 230000000452 restraining effect Effects 0.000 claims description 4
- 230000037431 insertion Effects 0.000 claims 1
- 238000003780 insertion Methods 0.000 claims 1
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図ａは本考案の第１の実施例のハイブリツ
ド集積回路装置の部分斜視図、第１図ｂはその側
面説明図、第２図ａは第２の実施例のハイブリツ
ド集積回路装置の部分斜視図、第２図ｂはその側
面説明図、第３図ａは従来のハイブリツド集積回
路装置の部分側面説明図、第３図ｂはその平面図
である。
４……ハイブリツド集積回路装置、５……基板
、６……端子ピン、６ａ……ストツパ、７……モ
ールド樹脂抑止段部、７ａ……取付孔、８……モ
ールド、９……端子ピン、１０……モールド樹脂
抑止段部。
1a is a partial perspective view of a hybrid integrated circuit device according to a first embodiment of the present invention, FIG. 1b is an explanatory side view thereof, and FIG. 2a is a partial perspective view of a hybrid integrated circuit device according to a second embodiment of the present invention. FIG. 2B is a perspective view, FIG. 3A is a partial side view of a conventional hybrid integrated circuit device, and FIG. 3B is a plan view thereof. 4... Hybrid integrated circuit device, 5... Board, 6... Terminal pin, 6a... Stopper, 7... Molded resin restraining step, 7a... Mounting hole, 8... Mold, 9... Terminal pin, 10... Mold resin restraint step.
Claims (1)
部を除く他の部分の表面をモールドでパツケージ
イングしたハイブリツド集積回路装置において、 上記端子ピンの基部にモールド樹脂抑止段部を
設けたことを特徴とするハイブリツド集積回路装
置。 (2) 上記モールド樹脂抑止段部を鍔状に形成す
るようにしたことを特徴とする実用新案登録請求
の範囲第１項記載のハイブリツド集積回路装置。 (3) 上記モールド樹脂抑止段部が、上記端子ピ
ンの一部を幅広に、かつ、ジグザグ状にすること
により形成されるようにしたことを特徴とする実
用新案登録請求の範囲第１項記載のハイブリツド
集積回路装置。[Claims for Utility Model Registration] (1) In a hybrid integrated circuit device in which the surface of a plurality of terminal pins arranged in parallel except for the insertion portion is packaged with a mold, the base of the terminal pin is packaged with a mold. A hybrid integrated circuit device characterized by being provided with a resin restraining step. (2) The hybrid integrated circuit device according to claim 1, wherein the mold resin restraining step portion is formed in the shape of a flange. (3) Claim 1 of the Utility Model Registration Claim characterized in that the molded resin restraining stepped portion is formed by making a part of the terminal pin wider and in a zigzag shape. hybrid integrated circuit devices.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8577187U JPS63193851U (en) | 1987-06-03 | 1987-06-03 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8577187U JPS63193851U (en) | 1987-06-03 | 1987-06-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63193851U true JPS63193851U (en) | 1988-12-14 |
Family
ID=30941478
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8577187U Pending JPS63193851U (en) | 1987-06-03 | 1987-06-03 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63193851U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS523358B2 (en) * | 1971-11-08 | 1977-01-27 | ||
| JPS52115179A (en) * | 1976-03-24 | 1977-09-27 | Hitachi Ltd | Lead frame |
-
1987
- 1987-06-03 JP JP8577187U patent/JPS63193851U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS523358B2 (en) * | 1971-11-08 | 1977-01-27 | ||
| JPS52115179A (en) * | 1976-03-24 | 1977-09-27 | Hitachi Ltd | Lead frame |