JPS62120355U - - Google Patents
Info
- Publication number
- JPS62120355U JPS62120355U JP811886U JP811886U JPS62120355U JP S62120355 U JPS62120355 U JP S62120355U JP 811886 U JP811886 U JP 811886U JP 811886 U JP811886 U JP 811886U JP S62120355 U JPS62120355 U JP S62120355U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- wiring
- radius
- utility
- scope
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
第１図は本考案にかかる配線のコーナー部を示
す図、第２図は半導体チツプの部分平面図、第３
図ａ，ｂは従来の配線のコーナー部を示す図であ
る。
図において、１は電源配線、２は信号配線、１
１は従来の配線、１２は絶縁膜、２１は本考案に
かかる配線、を示している。
FIG. 1 is a diagram showing a corner part of the wiring according to the present invention, FIG. 2 is a partial plan view of a semiconductor chip, and FIG.
Figures a and b are diagrams showing corner portions of conventional wiring. In the figure, 1 is a power supply wiring, 2 is a signal wiring, 1
1 is a conventional wiring, 12 is an insulating film, and 21 is a wiring according to the present invention.
Claims (1)
部で半径０．５μｍ以上の曲面を有していること
を特徴とする半導体装置。 A semiconductor device characterized in that internal wiring provided on an upper surface of the semiconductor device has a curved surface with a radius of 0.5 μm or more at a corner portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP811886U JPS62120355U (en) | 1986-01-22 | 1986-01-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP811886U JPS62120355U (en) | 1986-01-22 | 1986-01-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62120355U true JPS62120355U (en) | 1987-07-30 |
Family
ID=30792202
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP811886U Pending JPS62120355U (en) | 1986-01-22 | 1986-01-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62120355U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005533367A (en) * | 2001-11-21 | 2005-11-04 | ゼネラル セミコンダクター，インク． | Integrated circuit that prevents the generation of cracks in the passivation layer |
| JP2016174021A (en) * | 2015-03-16 | 2016-09-29 | 株式会社東芝 | Semiconductor device |
| JP2016195286A (en) * | 2010-01-15 | 2016-11-17 | ローム株式会社 | Semiconductor device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5389688A (en) * | 1977-01-19 | 1978-08-07 | Hitachi Ltd | Semiconductor device |
-
1986
- 1986-01-22 JP JP811886U patent/JPS62120355U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5389688A (en) * | 1977-01-19 | 1978-08-07 | Hitachi Ltd | Semiconductor device |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005533367A (en) * | 2001-11-21 | 2005-11-04 | ゼネラル セミコンダクター，インク． | Integrated circuit that prevents the generation of cracks in the passivation layer |
| JP2010147498A (en) * | 2001-11-21 | 2010-07-01 | General Semiconductor Inc | Method of manufacturing integrated circuit resistant to formation of crack in passivation layer |
| JP2016195286A (en) * | 2010-01-15 | 2016-11-17 | ローム株式会社 | Semiconductor device |
| JP2016174021A (en) * | 2015-03-16 | 2016-09-29 | 株式会社東芝 | Semiconductor device |
| US9899346B2 (en) | 2015-03-16 | 2018-02-20 | Kabushiki Kaisha Toshiba | Semiconductor device |