JPS6145901B2 - - Google Patents

Info

Publication number
JPS6145901B2
JPS6145901B2 JP54137045A JP13704579A JPS6145901B2 JP S6145901 B2 JPS6145901 B2 JP S6145901B2 JP 54137045 A JP54137045 A JP 54137045A JP 13704579 A JP13704579 A JP 13704579A JP S6145901 B2 JPS6145901 B2 JP S6145901B2
Authority
JP
Japan
Prior art keywords
fet
source
drain
converter
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54137045A
Other languages
Japanese (ja)
Other versions
JPS5661818A (en
Inventor
Taiki Uchiumi
Yoshio Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Hokushin Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Hokushin Electric Corp filed Critical Yokogawa Hokushin Electric Corp
Priority to JP13704579A priority Critical patent/JPS5661818A/en
Publication of JPS5661818A publication Critical patent/JPS5661818A/en
Publication of JPS6145901B2 publication Critical patent/JPS6145901B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/20Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising resistance and either capacitance or inductance, e.g. phase-shift oscillator
    • H03B5/26Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising resistance and either capacitance or inductance, e.g. phase-shift oscillator frequency-determining element being part of bridge circuit in closed ring around which signal is transmitted; frequency-determining element being connected via a bridge circuit to such a closed ring, e.g. Wien-Bridge oscillator, parallel-T oscillator

Landscapes

  • Filters And Equalizers (AREA)
  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
  • Networks Using Active Elements (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Description

【発明の詳細な説明】 この発明は、ウイーンブリツジを用いた正弦波
発振器の改良に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a sine wave oscillator using a Vienna bridge.

従来この種の回路としては第1図のようなもの
が知られている。第1図において、1は演算増幅
器、2は交流直流変換器、3,4,7,9は抵抗
器、6,8はキヤパシタ、5は電界効果形トラン
ジスタ(以下FETという)で、抵抗3、抵抗4
とFET5、抵抗9とキヤパシタ8、抵抗7とキ
ヤパシタ6は、それぞれウイーンブリツジの一辺
をなしこのウイーンブリツジは演算増幅器1の帰
還回路となつている。交流直流変換器2は発振器
の出力を検出して、FET5のドレイン―ソース
間抵抗を制御するものでこの変換器の出力は
FET5のゲートに接続されている。このような
発振器は従来から用いられているがこの回路にお
いては、FET5のドレイン―ソース間抵抗がド
レイン―ソース間電圧の変化に対して影響される
ため出力波形が歪んでしまう欠点があつた。この
ような波形の歪みをなくすにはFET5のドレイ
ン―ソース間に印加する電圧の幅を小さくし、ド
レイン―ソース間抵抗がドレイン―ソース間電圧
の変化に対して一定とみなせる範囲内で動作させ
るようにすればよい。しかしながら、あまりにこ
の動作範囲を狭くするとFET5による制御範囲
も狭くなつてしまい発振の振幅が不安定となつて
しまう。このようにFETのような非線形素子を
用いた発振回路では、波形歪と安定度とは互いに
相反する性質をもち両方を同時に満足させる発振
器を実現することは困難であつた。
Conventionally, as this type of circuit, the one shown in FIG. 1 is known. In Fig. 1, 1 is an operational amplifier, 2 is an AC/DC converter, 3, 4, 7, and 9 are resistors, 6, 8 are capacitors, 5 is a field effect transistor (hereinafter referred to as FET); resistance 4
and FET 5, resistor 9 and capacitor 8, and resistor 7 and capacitor 6 each form one side of a Vienna bridge, and this Vienna bridge serves as a feedback circuit for operational amplifier 1. The AC/DC converter 2 detects the output of the oscillator and controls the resistance between the drain and source of the FET 5, and the output of this converter is
Connected to the gate of FET5. Although such an oscillator has been used in the past, this circuit has the disadvantage that the output waveform is distorted because the drain-source resistance of the FET 5 is affected by changes in the drain-source voltage. To eliminate such waveform distortion, reduce the width of the voltage applied between the drain and source of FET5, and operate within the range where the drain-source resistance can be considered constant against changes in the drain-source voltage. Just do it like this. However, if this operating range is narrowed too much, the control range by the FET 5 will also be narrowed, and the amplitude of oscillation will become unstable. As described above, in an oscillator circuit using a nonlinear element such as a FET, waveform distortion and stability have contradictory properties, and it has been difficult to realize an oscillator that satisfies both at the same time.

この発明は、このような従来の欠点を解消する
ためになされたもので、前記FET5と直列に特
性が同一の他のFETを逆向きに接続することに
より、波形歪と安定度を同時に満足させる正弦波
発振器を実現したものである。
This invention was made to eliminate such conventional drawbacks, and by connecting another FET with the same characteristics in the opposite direction in series with the FET 5, waveform distortion and stability can be satisfied at the same time. This is a realization of a sine wave oscillator.

この発明の一実施例を第2図に示す。第1図の
従来例と異なる点は、抵抗4とFET5の間に
FET5と特性が同一なFET10を直列に接続
し、このFETのドレインとソースの極性をFET
5と逆にしかつFET10のゲートとソース間を
短絡するようにした点である。FET5と10を
このような接続にすることによる効果を以下に説
明する。
An embodiment of this invention is shown in FIG. The difference from the conventional example in Figure 1 is that there is a connection between resistor 4 and FET 5.
FET10, which has the same characteristics as FET5, is connected in series, and the polarity of the drain and source of this FET is set to
5 is reversed, and the gate and source of the FET 10 are short-circuited. The effect of connecting FETs 5 and 10 in this way will be explained below.

第3図は、FETのゲート―ソース間電圧VGS
を一定に保つたままで、ドレイン―ソース間電圧
DSを変化させたときのドレイン―ソース間の等
価抵抗の変化を示したものである。曲線aは
FETを順方向に接続したときの、曲線bは逆方
向に接続したときの特性図である。曲線Cは曲線
aと曲線bを加算したもので、VDSの変化に対し
てかなり一定化された特性が得られている。本発
明はまさにこの特性を利用したものであり、曲線
Cの特性を得るために第2図に示すように同一特
性の2個のFETを直列にかつ互いに逆向きに接
続したものである。第2図に示す実施例では
FET10のゲート―ソース間を短絡してVGS
0Vで動作させているため、FET5のVGSも0Vに
近い状態で動作させることになる。
Figure 3 shows the FET gate-source voltage V GS
This figure shows the change in the equivalent resistance between the drain and source when the drain-source voltage V DS is changed while V DS is kept constant. Curve a is
Curve b is a characteristic diagram when the FETs are connected in the forward direction, and curve b is the characteristic diagram when they are connected in the reverse direction. Curve C is the sum of curves a and b, and provides fairly constant characteristics with respect to changes in V DS . The present invention utilizes exactly this characteristic, and in order to obtain the characteristic of curve C, two FETs having the same characteristics are connected in series in opposite directions to each other, as shown in FIG. In the embodiment shown in FIG.
By shorting the gate and source of FET10, V GS =
Since it is operated at 0V, the VGS of FET5 will also be operated close to 0V.

このような構成にすることにより、FETのゲ
ート電圧が一定の場合には、ドレイン―ソース間
電圧の大きさ及び極性の如何にかかわらず常に一
定のドレイン―ソース間抵抗をもつような、即ち
かなり広い範囲のドレイン―ソース電圧の変化に
対しても抵抗値が一定になるような線形素子を実
現でき、波形歪と安定度を同時に満足させる発振
器をつくることが可能となる。
By adopting such a configuration, when the gate voltage of the FET is constant, the drain-source resistance is always constant regardless of the magnitude and polarity of the drain-source voltage, that is, it has a fairly constant drain-source resistance. This makes it possible to create a linear element whose resistance value remains constant even over a wide range of drain-source voltage changes, making it possible to create an oscillator that satisfies waveform distortion and stability at the same time.

なお上述の実施例では特性のそろつた2個の
FETを直列に接続した場合について説明してき
たが、同一特性のFETを並列にかつ互いに逆向
きに接続した場合にも、第3図dに示すような直
線化された特性が得られるので、直列接続の場合
と同様な効果が期待できる。第4図はFETを並
列接続したときの一実施例を示す。FET5と
FET11は並列にかつ互いに逆向きに接続さ
れ、FET11のゲートとソース間は短絡され、
FET5のゲートには第2図に示す場合と同様に
交流直流変換器2の出力が接続されている。第2
図に示す実施例、第4図に示す実施例いずれの場
合においても、交流直流変換器2の直流レベル
は、発振回路が常に最適の状態で動作するよう調
整されていなければならないことは言うまでもな
い。
In addition, in the above embodiment, two
We have explained the case where FETs are connected in series, but even when FETs with the same characteristics are connected in parallel and in opposite directions, linearized characteristics as shown in Figure 3d can be obtained. The same effect as in the case of connection can be expected. FIG. 4 shows an embodiment when FETs are connected in parallel. FET5 and
The FETs 11 are connected in parallel and in opposite directions, and the gates and sources of the FETs 11 are short-circuited.
The output of the AC/DC converter 2 is connected to the gate of the FET 5 as in the case shown in FIG. Second
It goes without saying that in both the embodiment shown in the figure and the embodiment shown in Fig. 4, the DC level of the AC/DC converter 2 must be adjusted so that the oscillation circuit always operates in an optimal state. .

この発明は以上説明したように、従来の回路に
FETを1個追加するだけの簡単な構成により発
振器の波形歪と安定度を同時に満足させるという
効果がある。
As explained above, this invention can be applied to conventional circuits.
A simple configuration that only requires the addition of one FET has the effect of simultaneously satisfying the waveform distortion and stability of the oscillator.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、ウイーンブリツジを用いた従来の発
振器を示す接続図、第2図はこの発明による発振
器の一実施例を示す結線図、第3図はFETの等
価抵抗を示す特性図、第4図はこの発明の他の実
施例を示す結線図である。 1…演算増幅器、2…交流直流変換器、3,
4,7,9…抵抗器、6,8…キヤパシタ、5,
10…FET。
Fig. 1 is a connection diagram showing a conventional oscillator using a Vienna Bridge, Fig. 2 is a connection diagram showing an embodiment of the oscillator according to the present invention, Fig. 3 is a characteristic diagram showing the equivalent resistance of FET, FIG. 4 is a wiring diagram showing another embodiment of the present invention. 1... operational amplifier, 2... AC/DC converter, 3,
4,7,9...Resistor, 6,8...Capacitor, 5,
10...FET.

Claims (1)

【特許請求の範囲】 1 ウイーンブリツジを帰還回路に有する演算増
幅器と、この演算増幅器の出力を直流信号に変換
しこの直流信号でウイーンブリツジの一辺の抵抗
値を制御する交流直流変換器と、を備えた発振器
において、 上記ウイーンブリツジとして、その一辺に同一
特性の電界効果形トランジスタを直列又は並列に
2個互いに逆向きに接続し、一方の電界効果形ト
ランジスタはゲートとソース間を短絡し、他方の
電界効果形トランジスタのゲートには交流直流変
換器の出力を接続するようにしたことを特徴とす
る正弦波発振器。
[Scope of Claims] 1. An operational amplifier having a Vienna Bridge in its feedback circuit, and an AC/DC converter that converts the output of the operational amplifier into a DC signal and controls the resistance value of one side of the Vienna Bridge with this DC signal. As the Wien Bridge, two field effect transistors with the same characteristics are connected in series or parallel on one side in opposite directions, and the gate and source of one field effect transistor are short-circuited. A sine wave oscillator characterized in that the output of an AC/DC converter is connected to the gate of the other field effect transistor.
JP13704579A 1979-10-25 1979-10-25 Sine wave oscillator Granted JPS5661818A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13704579A JPS5661818A (en) 1979-10-25 1979-10-25 Sine wave oscillator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13704579A JPS5661818A (en) 1979-10-25 1979-10-25 Sine wave oscillator

Publications (2)

Publication Number Publication Date
JPS5661818A JPS5661818A (en) 1981-05-27
JPS6145901B2 true JPS6145901B2 (en) 1986-10-11

Family

ID=15189572

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13704579A Granted JPS5661818A (en) 1979-10-25 1979-10-25 Sine wave oscillator

Country Status (1)

Country Link
JP (1) JPS5661818A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02312307A (en) * 1989-05-26 1990-12-27 Nec Corp Cr oscillating circuit

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4947309A (en) * 1972-09-12 1974-05-08
JPS5239056A (en) * 1975-09-16 1977-03-26 Stroemungsmasch Anst Divided ring packing for sealing high pressure shaft
JPS5472936A (en) * 1977-11-22 1979-06-11 Fujitsu Ltd Resistance-variable circuit of voltage control type
JPS5491034A (en) * 1977-12-28 1979-07-19 Nec Corp Variable attenuator circuit of voltage control type

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4947309A (en) * 1972-09-12 1974-05-08
JPS5239056A (en) * 1975-09-16 1977-03-26 Stroemungsmasch Anst Divided ring packing for sealing high pressure shaft
JPS5472936A (en) * 1977-11-22 1979-06-11 Fujitsu Ltd Resistance-variable circuit of voltage control type
JPS5491034A (en) * 1977-12-28 1979-07-19 Nec Corp Variable attenuator circuit of voltage control type

Also Published As

Publication number Publication date
JPS5661818A (en) 1981-05-27

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