JPS6032335A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS6032335A
JPS6032335A JP58141676A JP14167683A JPS6032335A JP S6032335 A JPS6032335 A JP S6032335A JP 58141676 A JP58141676 A JP 58141676A JP 14167683 A JP14167683 A JP 14167683A JP S6032335 A JPS6032335 A JP S6032335A
Authority
JP
Japan
Prior art keywords
metal
pad
wire
bonding
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58141676A
Other languages
English (en)
Inventor
Keijiro Nakatani
中谷　敬次郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58141676A priority Critical patent/JPS6032335A/ja
Publication of JPS6032335A publication Critical patent/JPS6032335A/ja
Pending legal-status Critical Current

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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 本発明は、半導体装置、特に突起電極を有する半導体装
置に関する。
〔従来技術〕
従来、集積回路などの半導体装置において、最も一般的
に用いられてきた装置の端子と外部リードとの接続方法
は、ワイヤボンディング法である。
かかる方法を用いるとき、そこで用いられる半導体装置
は通常以下の如き構造を持ってる。すなわち、半導体基
板表面は内部に含まれる素子の接続用開孔を除いて、５
ｉ０１　、　Ｓｉ３Ｎ４などの絶縁被膜で覆われ、接続
用開孔は内部配線用金属によって結線され、必要な電気
的接続を与えられている。
かくの如き内部配線の終端部、すなわち、外部リードと
の接続端は通常パッドと呼ばれ、半導体基板上の周辺部
に配置されている。これらの内部配線及びパッドの材料
には導電性、シリコンとのオーミック性、加工性などの
点から通常Ａ７が用いられ、この内部配線表面は表面保
藤の目的で絶縁物によって核種されている。そして、熱
圧着法。
超音波圧着法などにより、外部リードがパッドに接続さ
れる。
他方、近年新たに注目を浴びているワイヤレスポンディ
ングにおいては、外部接続用端子として、金属突起（バ
ンプ）からなる突起電極を用意し、複数個の金属外部リ
ードとの接続を同時に実現するというのが特徴である。
かかる金属バンプは、通常前記ワイヤーボンディング用
の通常構造のパッド部上に、Ｔ　ｉ　−Ｐ　ｔ−Ａｕ　
、　Ｃｒ−Ｃｕ−Ａｕなどの金属構成を持って実現され
る。ここでＴｉ。
Ｃｒは、バンプと表面被覆絶縁膜（Ｓｉ０２，５ｉ３Ｎ
４）との密着性が保証されること、Ａｕは電気メッキに
よって容易に突起構造が実現でき、化学的に安定な金属
であること、ＰＬ、Ｃｕは配線金属であるＡｌと突起金
属であるＡｕとの直接接触によるパープルプレーグやホ
ワイトプレーグ等の悪性の金属間化合物の出現を避けぜ
しめるために用いられている。
第１図は、かかる従来のワイヤレスボンディング用半導
体装置の突起電極の構造を示す断面図である。
シリコンなどの半導体基板１は５ｉＯｚなどの絶縁被膜
２で覆われ、この絶縁被膜２上にＡｌバッド３が設けら
れ、このＡｌパッド３上面にＳ　ｉ０２　。
Ｓｉ３Ｎ４などの表面保護膜４と、Ｔｉ、Ｏｒなどの密
着強化用金属と、Ｐｔ、Ｃｕなどの障壁用金属とからな
る導電体５と、上部金属としてＡｕからなる金属バンプ
６が形成されている。なお、金属バンプ６は通常電気メ
ツキ法により形成される。
かかる構造の半導体装置にワイヤレスボンディングをほ
どこす際には、ます金属バンプ６に接続されるべき外部
リード７をこの金属バンプ６に接触させ、しかる後、約
４５０℃の高熱と１〜２．５ｋｇ／ｃｍ２の高圧力とを
約１秒間、この接触部上面に加えて、ボンディングが完
了する。
しかるに従来構造の金属バンプ６においては、上述のよ
うに、ボンディング時に高圧力が加えられることにより
、金属バンプ６直下の峠等電（＋５にクラックが生じ、
その結果バンプ金属であるＡｕとパッド部配線金属であ
るＡｌが直接接触し、機械的低強度のパープルプレーグ
や、電気的高抵抗のホワイトプレーグができたり、又圧
力と同時に加えられる高熱により金楕バンプ６を形成す
る金属Ａｕと、表面保護膜（Ｓｉ０２．５ｉ３Ｎ４）　
４との著しい熱膨張係数との差に基き、金属バッド６周
辺の表面保護膜４にクラックが生じ保賎効果を損うとい
う重大な信頼性上の欠点がある。
上記の欠点を補うためにはＡｌバッド３から金属バンプ
６を離して形成させればよいが、そのためにはＡｌ配線
用パターンの設計変更が必要になり必然的に、半導体装
置のコストアップに連なるためその実現は困難である。
〔発明の目的〕
本発明の目的は、上記の欠点を除去することにより、ボ
ンデング時に発生するパープルプレーグ。
ホワイトプレーグ及び表面保護膜のクラックなどの発生
を防止した高信頼性で、かつ簡単に形成できる構造の突
起電極を有する半導体装置を提供することにある。
〔実施例の説明〕
以下、本発明の実施例について図面を参照して説明する
。
第２図は本発明の一実施例の要部を示す断面図である。
本実施例は、シリコンなどの半導体基板１１とその上に
形成されたＳ　ｉ０２などの絶縁膜１２と、絶縁被膜１
２上に形成されたＡｌパッド１３とＡｌバッド１３の上
面の１部及び絶縁被膜１２上に形成された５ｉ０２　、
８ｉ３Ｎ４などからなる表面保護膜１４と、Ｔｉ、Ｃｒ
などからなるＡｌパット１３の上面に形成された密着強
化用金属と、ｐｔ。
Ｃｕなどからなる障壁用金属とからなる導電体１５と、
ワイヤボンデング法として熱圧着結合法により接続され
たＡｕ１Ｊ−ド線の一部分からなる金属バンプ１６とか
ら構成される。
すなわち、本実施例が、第１図に示した従来例と異なる
点は、金属バンプを従来の電気メツキ法ではなく、ワイ
ヤボンデング法を用いて形成した点にある。本実施例の
金属バンプ１６は、熱圧着法により接続されたＡｕ１Ｊ
−ドを４電体Ｊ５上の部分を残して、それ以外は切９増
ったものであり、現在の自動化されたワイヤボンデング
装置により容易に形成することができる。しかもボンデ
ングは約３００℃の温度と約Ｑ、　５　ｋｇ／ｃｍ２の
圧力の低温、低圧力のもとて約０３秒の短時間で行われ
るので、ボンデング時に、導電体１５や保護膜１４には
クラック発生などの悪影響を及はすことなく、電気的２
機械的に安定な金桃バンプが得られる。
さらに、かくして形成された金属バンプ１６は、第２図
に示すように、その上部がボンデング用電極の圧接によ
り凹部が形成される。そこでこの金員バンプ１６に接続
さるべき外部リード線１７の先端の形状をあらかじめこ
の凹部の形に合せて折り曲げでおくか、又はリード劇料
としてボンデング時の圧力で容易にＭｌ）曲がるリード
材料を用いることにより、第１図に示した従来例の場合
よｐも、容易に接続されることになる。従って、従来よ
りも短かい時間でも圧接することが可能となり、従来発
生していた圧接時のクラック発生が改善される。
第３−は本発明の他の実施例の要部を示す断面図である
。
本実施例は、金員バンプ１６′を、第２図に示した実施
例において、熱圧着法により形成したＡｕリードからな
る金属バンプ１６のリード線部分を、Ａｌパッド１３か
ら離れ°Ｃ１保護膜１４上に達するだけの所要の長さを
残して切り取って構成したものである。
本実施例によると、リード線１７′は第３図に示１４上
の適切な箇所で金属バンブ１６′と接続可能となり、接
続時に、半導体装置の信頼性を損うことがない。
なお、以上の実施例の説明においては、ワイヤボンデン
グ法として熱圧着法を取上けたけれとも、超音波ボンデ
ング法などの他のワイヤボンデング法を用いても良いこ
とは言うまでもない。
また、半導体基板としてシリコンを取上けだけれども、
これも他の半導体基板を用いた場合にも本発明が適用で
きることは言うまでもない。
〔発明の効果〕
以上、詳細に説明したとおり、本発明の半導体装置は、
突起電極として、ワイヤポンチング法により接続された
リード線の一部分からなる上部金属（金属バンブ）を有
しているので、電気的２機械的に安定な突起電極を簡単
に形成できるとともに、外部リード接続時に従来発生し
ていたパープルプレイグツホワイトプレーグ及び表面保
護膜のクラックなどの発生が防止できる高信頼性の半導
体装置が得られるという効果を有している。
【図面の簡単な説明】
第１図は従来の半導体装置の一例の要部を示す断面図、
第２図は本発明の一実施例の要部を示す断面図、第３図
は本発明の他の実施例の要部を示す断面図である。 １・・・・・・半導体基板、２・・・・・・絶縁被膜、
３・・・・・・Ａｌパッド、４・・・・・・表面保護膜
、５・・・・・・導電体、６・・・・−金員バング、７
・・・・外部リード、１１・・・・・・半導体基板、１
２・・・・・・絶縁被膜、１３・・・・・・Ａｌパッド
、１４・・・・・・表面保設膜、１５・・・・・・導電
体、１６．１６’・・・・・・ｆｉＪバンプ、１７．１
７’・・・・・・外部リード。 ８／図 ／’１

Claims (1)

    【特許請求の範囲】
  1. 突起電極を有する半導体装置において、前記突起電極の
    上部金属がワイヤボンデング法により接続されたリード
    線の一部分から構成されることを特徴とする半導体装置
    。
JP58141676A 1983-08-02 1983-08-02 半導体装置 Pending JPS6032335A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58141676A JPS6032335A (ja) 1983-08-02 1983-08-02 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58141676A JPS6032335A (ja) 1983-08-02 1983-08-02 半導体装置

Publications (1)

Publication Number Publication Date
JPS6032335A true JPS6032335A (ja) 1985-02-19

Family

ID=15297604

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58141676A Pending JPS6032335A (ja) 1983-08-02 1983-08-02 半導体装置

Country Status (1)

Country Link
JP (1) JPS6032335A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4742023A (en) * 1986-08-28 1988-05-03 Fujitsu Limited Method for producing a semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4742023A (en) * 1986-08-28 1988-05-03 Fujitsu Limited Method for producing a semiconductor device

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