JPS59177949U - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS59177949U
JPS59177949U JP1983073149U JP7314983U JPS59177949U JP S59177949 U JPS59177949 U JP S59177949U JP 1983073149 U JP1983073149 U JP 1983073149U JP 7314983 U JP7314983 U JP 7314983U JP S59177949 U JPS59177949 U JP S59177949U
Authority
JP
Japan
Prior art keywords
envelope
metal plate
semiconductor equipment
adhesive
filled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1983073149U
Other languages
English (en)
Inventor
斉藤　忠義
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP1983073149U priority Critical patent/JPS59177949U/ja
Publication of JPS59177949U publication Critical patent/JPS59177949U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第１図は、従来構造の装置断面図、第２図は、従来装置
における樹脂ケースとベース金属との接触部の拡大断面
図、第３図は本考案の二実施例による樹脂ケースとベー
ス金属との接触部の拡大断面図である。 １・・・ベース金属、２．　２’・・・樹脂ケース、３
・・・接着材、４・・・樹脂、５・・・セラミック板、
６・・・電極板、７・・・外部端子、８・・・ソルダー
。

Claims (1)

    【実用新案登録請求の範囲】
  1. 半導体素子を搭載したベースとなる金属板に、半導体素
    子をとり囲んで接触する外囲器を有し、この外囲器内に
    樹脂を充填した半導体装置において、前記外囲器の前記
    金属板との接触部（こ凹状の窪みを有し、その凹状窪み
    内に接着材を充填し、もって該接着剤で前記外囲器を前
    記金属板に接着したことを特徴とする半導体装置。
JP1983073149U 1983-05-17 1983-05-17 半導体装置 Pending JPS59177949U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983073149U JPS59177949U (ja) 1983-05-17 1983-05-17 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983073149U JPS59177949U (ja) 1983-05-17 1983-05-17 半導体装置

Publications (1)

Publication Number Publication Date
JPS59177949U true JPS59177949U (ja) 1984-11-28

Family

ID=30203281

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983073149U Pending JPS59177949U (ja) 1983-05-17 1983-05-17 半導体装置

Country Status (1)

Country Link
JP (1) JPS59177949U (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012015349A (ja) * 2010-07-01 2012-01-19 Fuji Electric Co Ltd 半導体装置
JP6399272B1 (ja) * 2017-09-05 2018-10-03 三菱電機株式会社 パワーモジュール及びその製造方法並びに電力変換装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012015349A (ja) * 2010-07-01 2012-01-19 Fuji Electric Co Ltd 半導体装置
JP6399272B1 (ja) * 2017-09-05 2018-10-03 三菱電機株式会社 パワーモジュール及びその製造方法並びに電力変換装置

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