JPS5867097A - Method of producing printed circuit board - Google Patents
Method of producing printed circuit boardInfo
- Publication number
- JPS5867097A JPS5867097A JP16603281A JP16603281A JPS5867097A JP S5867097 A JPS5867097 A JP S5867097A JP 16603281 A JP16603281 A JP 16603281A JP 16603281 A JP16603281 A JP 16603281A JP S5867097 A JPS5867097 A JP S5867097A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- plating
- resist
- exposure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
本発明は印刷配線板の製造法に関し、さらに詳しくは既
に形成された印刷配線板の所定部分に電解めっきを施し
死後、はんだ付は処理する印刷配線板の製造法に関する
。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a printed wiring board, and more particularly to a method for manufacturing a printed wiring board in which predetermined portions of an already formed printed wiring board are electrolytically plated and soldering is performed after death. .
従来、印刷配線板業界において既に形成され九印刷配線
板上に一儂状に永久保護レジストを形成し、所定部分九
とえば接栓部２部品接続部７などに銅、はんだ、ニッケ
ル、金などのめっきを施し、諌めつき処理部の少なくと
も一部に部品をはんだ付は処理することは公知である。Conventionally, in the printed wiring board industry, a permanent protective resist is formed on the printed wiring board in a single layer, and copper, solder, nickel, gold, etc. It is known to perform plating and soldering of components on at least a portion of the indented portion.
通常、永久保護レジストとしてはエポキシ樹脂。Epoxy resin is usually used as a permanent protective resist.
アミノプラスト樹脂等の熱硬化性樹脂を主成分とする印
刷レジストが用いられる。しかし、印刷レジストは解儂
度が低い欠点があり、高密度回路への適用は困難であシ
、近年、解儂度の優れたフォトレジストの適用が検討さ
れている。A printing resist whose main component is a thermosetting resin such as aminoplast resin is used. However, printed resists have a drawback of low solubility, making them difficult to apply to high-density circuits, and in recent years, the application of photoresists with excellent solubility has been studied.
しかしながら１通常のフォトレジスト（エツチング用、
電解めっき用、ソルダマスク用）は電ｍめつきレジスト
としての特性とソルダマスクとしての特性を合わせもっ
ておらず、前記目的には使用困難である。すなわち、め
っき用のフォトレジストは耐溶剤性、はんだ耐熱性等が
劣りソルダマスクとしては使用できず、ｔたソルダマス
ク用のフォトレジストは耐めっき性が劣り、銅、ニッケ
ル、金、はんだ等の電解めっきに耐えない。However, 1 ordinary photoresist (for etching,
For electrolytic plating and for solder masks), they do not have both the characteristics of an electroplating resist and the characteristics of a solder mask, and are difficult to use for the above purposes. In other words, photoresists for plating have poor solvent resistance, soldering heat resistance, etc. and cannot be used as solder masks, and photoresists for solder masks have poor plating resistance and cannot be used for electrolytic plating of copper, nickel, gold, solder, etc. I can't stand it.
これらの事実に鑑み１本発明者等は種々検討の結果１本
発明に到達した。In view of these facts, the present inventors have arrived at the present invention as a result of various studies.
本発明の目的は、既に形成された印刷配線板の所定部分
に電解めっきを施した後、はんだ付は処理する印刷配線
板の製造法を提供することにある。An object of the present invention is to provide a method for manufacturing a printed wiring board in which predetermined portions of an already formed printed wiring board are electrolytically plated and then soldered.
本発明は
（１）可撓性支持体および感光層からなるソルダマスク
用感光材料を配線導体を有する印刷配線板上に加熱加圧
積層する工程
（２）活性光線を像的に照射し露光部を半硬化さ″せた
後、未露光部を現儂液で除去し、接栓部及び部品接続部
を除く配線板の全面に半硬化のレジスト画像を形成する
工程
（３）露出された接栓部および部品接続部に電解めっき
を施す工程
１５）めつき処理部をはんだ付は処理する工程を含む印
刷配線板の製造法に関する。The present invention involves (1) a step of laminating a photosensitive material for a solder mask consisting of a flexible support and a photosensitive layer on a printed wiring board having a wiring conductor under heat and pressure; and (2) imagewise irradiation of actinic rays to remove exposed areas. Step (3) After semi-curing, removing the unexposed parts with a resist solution and forming a semi-cured resist image on the entire surface of the wiring board except for the plugs and component connection parts (3) Exposed plugs The present invention relates to a method for manufacturing a printed wiring board, including a step of electrolytically plating the parts and component connection parts (15) and soldering the plated parts.
本発明において用いられる可撓性支持体および感光層か
らなるソルダマスク用感光材料は。The photosensitive material for solder mask comprising a flexible support and a photosensitive layer is used in the present invention.
既に公知でアシ、一般的にはソルダマスクとしての特性
を有する感光性樹脂をメチルエテルケトン′、トルエン
、塩化メチレン等の有１１ｍｍ剤に溶解し、この溶液を
ポリエチレンテレ７タレートフイルム等のＯＴｍ性支持
体上にナイフコート法１”−／’コート法等により塗布
し、へ乾燥することによシ製造し得る。ソルダマスク用
感光材料は完全硬化させた際に耐溶剤性、はんだ耐熱性
、電気的特性勢ソルダマスクとしての特性を示すもので
ある。ソルダマスク用感光材料の好ましい例として、特
開昭５０−５５４０４号公報、特開昭５０−１４４４２
９号公報２％開昭５０−１４４４３１号公報記載の組成
物を挙げることかできる。これの組成物は
ハ
（Ａ） 末端エチレン基を少なくとも２個有する光重
合性不飽和化合物
（Ｂｌ 活性光線の照射によって前記不飽和化合物の
重合を開始する増感剤
（Ｃ） 側鎖に光あるいは熱反応性の基を有する線状
高分子化合物
（ＤＪ 少なくとも２個のエポキシ基を有する化合物
（Ｅ） エポキシ樹脂の硬化剤からなり、＊光、現像
に続く加熱により完全硬化するものである。A photosensitive resin that is already known and has properties as a solder mask is dissolved in a 11mm agent such as methyl ether ketone, toluene, methylene chloride, etc., and this solution is applied to an OTm-resistant material such as a polyethylene tere-7 tallate film. It can be manufactured by coating it on a support by a knife coating method, 1"-/' coating method, etc., and drying it. When the photosensitive material for solder mask is completely cured, it has excellent solvent resistance, soldering heat resistance, and electrical resistance. Preferred examples of photosensitive materials for solder masks include JP-A-50-55404 and JP-A-50-14442.
The compositions described in Publication No. 9 (2%) and Japanese Patent Publication No. 144431/1988 can be mentioned. This composition consists of (A) a photopolymerizable unsaturated compound (Bl) having at least two terminal ethylene groups; (C) a sensitizer that initiates polymerization of the unsaturated compound upon irradiation with actinic light; Linear polymer compound having a heat-reactive group (DJ Compound (E) having at least two epoxy groups) Consists of a curing agent for epoxy resin, and is completely cured by *light, development, and subsequent heating.
また、時分１＠５３−４４３４６号公報に記載されてい
る
囚 末端エチレン基を少なくとも２個含有する光重合性
不飽和化合物
（Ｂｌ 活性光線の照射によって前記不飽和化合物の
重合を開始する増感剤
および
（Ｃ） 側鎖にテトラヒドロフルフリル基を有する線
状高分子化合物からなる組成物も用い得る。In addition, a photopolymerizable unsaturated compound (Bl) containing at least two terminal ethylene groups as described in Publication No. 1@53-44346 is used. A composition comprising an agent and (C) a linear polymer compound having a tetrahydrofurfuryl group in its side chain may also be used.
特に好ましい感光材料の例としては上記特公昭５３−４
４３４６号公報に記載される組成物等に密着性向上剤９
例えば２メタクリロイロオ中シエテルアシソドホス７エ
ートのベンゾトリアゾール塩、２アクリロオキシエチル
アシツドホスフエートのベンゾトリアゾール塩を含有せ
しめ九組成物を挙げることができる。これらの組成物は
現像後の露光および／または加熱にょシ完全硬化し、は
んだ耐熱性および密着性に優れ有用である。その他のソ
ルダマスクとしての特性を有する感光材料も本発明にお
いて用いることができる。As an example of a particularly preferable photosensitive material, the above-mentioned Japanese Patent Publication No. 53-4
Adhesion improver 9 is added to the composition described in 4346.
For example, there can be mentioned a composition containing a benzotriazole salt of sietelacysodophos 7ate and a benzotriazole salt of 2acrylooxyethyl acid phosphate in 2-methacryloyl chloride. These compositions are completely cured by exposure to light and/or heating after development, and are useful because they have excellent solder heat resistance and adhesion. Other photosensitive materials having properties as solder masks can also be used in the present invention.
本発明において用いられる可撓性支持体および感光層か
らなるソルダマスク用感光材料の感光層の厚さは被覆さ
れる印刷配線板の回路厚。The thickness of the photosensitive layer of the photosensitive material for solder mask, which is composed of a flexible support and a photosensitive layer used in the present invention, is equal to the circuit thickness of the printed wiring board to be coated.
回路幅９回路密度によって異なるが通常３ｏないし１６
０μｍであることが望ましい。可撓性支持体は感光材料
の製造時に必要な耐熱性、耐溶剤性を有し、透光性があ
シ、さらに可撓性支持体の感光層に対する接着性は積層
露光後は印刷配線板のそれよシも弱いことが必要で、好
ましい例としてはボ、リエチレンテレ７タレート等のポ
リエステルフィルムを挙げることができる。Circuit width 9 Depends on circuit density, but usually 3o to 16
It is desirable that it is 0 μm. The flexible support has the heat resistance and solvent resistance necessary for the production of photosensitive materials, is translucent, and has good adhesion to the photosensitive layer of the flexible support after lamination exposure. It is necessary that the film has a low resistance to this, and preferred examples include polyester films such as polyethylene tere-7 tallate and the like.
これらの可撓性支持体は印刷配線板上に形成された感光
層から容易に剥１１Ｉｌされる。可撓性支持体の厚さは
特に制限されないが支持体上に感光層を形成するさいの
作業性およびコスト等から１５ないし４０μｍであるこ
とが望ましい。These flexible supports are easily peeled off from the photosensitive layer formed on the printed wiring board. The thickness of the flexible support is not particularly limited, but is preferably 15 to 40 μm from the viewpoint of workability and cost when forming a photosensitive layer on the support.
本発明において可撓性支持体および感光層からなるソル
ダマスク用感光材料の印刷配線板上への加熱加圧積層は
公知の貼シ合わせ装置を用いて行なうことができる。す
なわち被覆される印刷配線板がフィルム積層時に回路間
に気泡が残存しにくいパターンを有する場合、たとえば
回路が１８μｍ以下と薄い場合１回路が直線状である場
合には通常の貼シ合わせ装置で加熱加圧積層することが
できる。しかし回路厚５０ないし８０μｍの通常の印刷
配線板の場合には特開昭５２−６６５８１号公報に記載
される減圧貼シ合わせ装置を用い減圧雰囲気下で加熱加
圧を用いることにょシフイルム積層時の回路間の気泡の
残存は完全に防止される。In the present invention, the photosensitive material for a solder mask comprising a flexible support and a photosensitive layer can be laminated under heat and pressure onto a printed wiring board using a known laminating device. In other words, if the printed wiring board to be coated has a pattern that makes it difficult for air bubbles to remain between the circuits when laminating the film, for example, if the circuit is thin (18 μm or less) or if one circuit is linear, heating is performed using a normal laminating device. Can be laminated under pressure. However, in the case of a normal printed wiring board with a circuit thickness of 50 to 80 μm, it is necessary to use a vacuum laminating device described in JP-A-52-66581 and apply heat and pressure in a vacuum atmosphere. Air bubbles remaining between circuits are completely prevented.
本発明において印刷配線板上への感光層の形成は前述の
通シ可佛性支持体および感光層からなるソルダマスク用
感光材料を加熱加圧積層することによシ行なわれる。加
熱加圧積層の条件には、特に制限はない。In the present invention, the photosensitive layer is formed on the printed wiring board by laminating the photosensitive material for a solder mask comprising the above-mentioned permeable support and the photosensitive layer under heat and pressure. There are no particular restrictions on the conditions for heating and pressurizing the lamination.
本発明において半硬化のレジスト画像とは通常のパター
ン露光及び現儂処理によって得られるレジスト−儂を意
味する。すなわち、半硬化のレジスト１ｍ儂とは、３Ｊ
儂処理によってレジスト画像が得られるに必要な１度に
露光によって硬化されたのち、現儂処理されて得られる
レジストｍ像である。In the present invention, the term "semi-cured resist image" means a resist image obtained by ordinary pattern exposure and development processing. In other words, 1 meter of semi-cured resist is 3J
This is a resist m image obtained by being cured by exposure at one time necessary to obtain a resist image by my processing, and then being subjected to my own processing.
本発明においてｆＪｉ儂処理に用いられる現儂液は露光
部にダメージを与えず、未露光部を選択的に溶出するも
のであればその種類について゛は特に制限はない。現儂
液の例としては１，１．１）リフ費ルエタン等のハロゲ
ン化炭化水素、ジエチレングリコール七ツメチルエーテ
ル／炭酸ナトリウム水溶液等の有機溶剤／希アルカリ水
溶液混合液などを挙げることができる。In the present invention, there are no particular restrictions on the type of liquid used in the fJi process as long as it does not damage exposed areas and selectively elutes unexposed areas. Examples of the present liquid include 1.1.1) halogenated hydrocarbons such as refrigerated toluethane, organic solvents such as diethylene glycol methyl ether/sodium carbonate aqueous solution/dilute aqueous alkali solution, and the like.
本発明において電解めっき処理はレジスト画像が半硬化
の状態で行なうことが必要である。In the present invention, it is necessary that the electrolytic plating treatment be performed with the resist image in a semi-hardened state.
完全硬化させてからめっき処理を行なうとレジストの耐
電解めっき性が低下する。電解めっき浴の一類などにつ
いては特に限定はなく種々のめつき浴を用いることがで
き例としてはビロリン酸鋼めっき浴、硫酸鋼めっき浴、
スルファミン酸ニッケルめっき浴、シアン化金めっき浴
等を挙げることができる。If plating is performed after complete curing, the electrolytic plating resistance of the resist will decrease. There are no particular limitations on the type of electrolytic plating bath, and various plating baths can be used. Examples include birophosphate steel plating bath, sulfuric acid steel plating bath,
Examples include a nickel sulfamate plating bath and a gold cyanide plating bath.
本発明の製造法においては、レジス）Ｉｊｊ＊は電解め
っき処理後に完全硬化させることが必要である。レジス
ト画像の完全硬化は露光および／または加熱処理によシ
行なうことができる。露光および加熱処理を組み合わせ
て行なう場合には通常、露光後加熱処理されるが、加熱
後、露光処理してもよい。通常、加熱処理は８０ないし
２００℃、好ましくは１２０ないし１６０℃で３０分な
いし２時間行なわれる。このような硬化処理にょシレジ
ストの耐溶剤性。In the manufacturing method of the present invention, it is necessary to completely harden the resist (Ijj*) after electroplating. Complete hardening of the resist image can be achieved by exposure and/or heat treatment. When exposure and heat treatment are performed in combination, heat treatment is usually performed after exposure, but exposure treatment may be performed after heating. Usually, the heat treatment is carried out at 80 to 200°C, preferably 120 to 160°C, for 30 minutes to 2 hours. This hardening treatment improves the solvent resistance of the resist.
耐熱性等の°被膜特性が向上し、めっき処理部へのはん
だ付は処理が可能となる。The film properties such as heat resistance are improved, and it becomes possible to solder the plated parts.
本発明により接栓部および部品接続部が部分めっき処理
された高密度印刷配線板の製造が容易となる。According to the present invention, it becomes easy to manufacture a high-density printed wiring board in which the plug portions and component connection portions are partially plated.
以下実施例により本発明を説明する。The present invention will be explained below with reference to Examples.
実施例１
（１）感光材料の積層工程
表１に示される町撓性茗持体および感光層からなる感光
材料を日立化成工業株式会社製真空ラミネータ（ＶＬＭ
−３）を用い第１図（Ａ）に示す既に形成された印刷配
線板上に３０１１１１１ Ｈｇの減圧雰囲気下で１００
℃で加圧積層した。１は基板、２は配−導体、３はスル
ホール、４はランド部である。配線導体２は第１図（Ｂ
ｌに示されるように感光層６により全面被覆され九。５
は可撓性支持体である。Example 1 (1) Lamination process of photosensitive material A photosensitive material consisting of a flexible metal supporter and a photosensitive layer shown in Table 1 was laminated in a vacuum laminator (VLM) manufactured by Hitachi Chemical Co., Ltd.
-3) on the already formed printed wiring board shown in Figure 1(A) under a reduced pressure atmosphere of 3011111 Hg.
Pressure lamination was carried out at ℃. 1 is a substrate, 2 is a wiring conductor, 3 is a through hole, and 4 is a land portion. The wiring conductor 2 is shown in Figure 1 (B
The entire surface is covered with a photosensitive layer 6 as shown in FIG. 5
is a flexible support.
（２）露光および現俸工程
部品接続部（スルホール、ランド部等）を除く感光層全
面にオーク製作新製フェニックスｉｏｏｏｍ露光機を用
いて、１００ｍＪ／ｃｄで露光し、２３℃で１時間放置
した後、現像液としてＬｌ、１トリクロルエタンを用い
２０℃で２分間現像し丸。第１図（Ｃ）に示すように部
品接続部（スルホール、ランド部等）を除く印刷配線板
上に半硬化した高解儂力を有するレジスト画偉が形成さ
゛れ九。(2) Exposure and current process The entire surface of the photosensitive layer, excluding parts connecting parts (through-holes, lands, etc.), was exposed to light at 100 mJ/cd using a Phoenix Iooom exposure machine manufactured by Oak Manufacturing, and left at 23°C for 1 hour. After that, the circle was developed for 2 minutes at 20°C using Ll and 1 trichloroethane as a developer. As shown in FIG. 1(C), a semi-cured resist image with high resolving power is formed on the printed wiring board except for component connection areas (through-holes, land areas, etc.).
（３）電解めっき工程
以下に示す条件で各々第１図の）に示すように部品接続
部（スルホール、ランド部等）に電解めっきを施し友。(3) Electrolytic plating process Electrolytic plating is applied to component connection parts (through holes, lands, etc.) as shown in Figure 1 under the conditions shown below.
（４）鋼めつきの場合
ビロリン酸鋼めっき浴を用い、めっき温度５５℃電流密
度５Ａ／ｄｍ”で３０分間行なった。(4) In the case of steel plating, a birophosphate steel plating bath was used, and plating was carried out at a temperature of 55° C. and a current density of 5 A/dm for 30 minutes.
（Ｂ） ニッケルめっきの場合 スルファミン駿ニッケルめっき浴を用い。(B) For nickel plating Using a sulfamine nickel plating bath.
メ）＊温［３０℃、電流密ｌ１５ Ａ ／ｄｍ”で５分
間行なった。Me) *Temperature [30° C., current density 115 A/dm] for 5 minutes.
（Ｃ） 金めつきの場合 、。(C) In the case of gold plating.
シアン化金めつきを用い、めっき温度６０ハ ℃、電電流密度１．五 （Ｄｌ はんだめっきの場合 硼弗化はんだ浴を用い，めっき温度２５℃。Using cyanide gold plating, plating temperature 60 ha °C, current density 1. Five (Dl For solder plating Plating temperature was 25°C using a borofluoride solder bath.
電流密度＆５Ａ／ｄｍｌで１５分間行なった。The current density was 5 A/dml for 15 minutes.
（４）電解めっき後のレジストの硬化工程東芝電材株式
会社製５．６ＫＷ高圧水銀灯を用い３Ｊ２４−で露光し
た後１５０℃で３０分間加熱処理し九。(4) Resist curing process after electrolytic plating After exposure at 3J24- using a 5.6KW high-pressure mercury lamp manufactured by Toshiba Electric Materials Corporation, heat treatment was performed at 150° C. for 30 minutes.
（５）はんだ付は工程 タムラ製作所製７ラツクスＡ２２６を用い。(5) Soldering is a process Uses 7lux A226 manufactured by Tamura Seisakusho.
、２６０℃で１０秒間はんだ浸漬を行なった。鋼。, solder immersion was performed at 260° C. for 10 seconds. steel.
ニッケル、金およびはんだによ多部分めっきされた印刷
配線板はいずれもはんだ付けが可能であった。Printed wiring boards multi-plated with nickel, gold, and solder were all solderable.
比較例
上述の実施例において露光． ３ｊ１ｍ後電解めっき処
理を行なわないで，直ちに露光（ ３ Ｊ ７ｃｍ”
）加熱（１５０℃．３０分）処理を行ない１次に上述実
施例に記載し九条件で鋼，ニッケル、金およびはんだめ
っき処理を行なった。いずれもレジストの密着性が劣シ
．レジス゛ト／鋼界面へのめっき液の本ぐりが認められ
，めっき液のはんだ処理２６０℃，２秒によシレジスト
が剥離し，ンルダマスクとして使用できなかった。Comparative Example Exposure in the above example. Immediate exposure (3J 7cm) without electrolytic plating after 3J1m
) Heat treatment (150° C., 30 minutes) was performed, and then steel, nickel, gold, and solder plating treatments were performed under the nine conditions described in the above-mentioned Examples. In both cases, the adhesion of the resist was poor. Dropout of the plating solution to the resist/steel interface was observed, and the resist peeled off after 2 seconds of soldering with the plating solution at 260°C, making it unusable as a soldering mask.
第１図囚〜（功は本発明の印刷配線板の製造工程を示す
断面図である。
符号の説明
１・・・基板 ２・・・配線導体３・・
・スルホール ４・・・ランド部５・・・可撓
性支持体 ６・・・感光層７・・・露出され九配
線導体部 ８川半硬化レジスト像９・・・電解めっき層Figure 1 is a sectional view showing the manufacturing process of the printed wiring board of the present invention. Explanation of symbols 1... Board 2... Wiring conductor 3...
・Through hole 4...Land part 5...Flexible support 6...Photosensitive layer 7...Exposed nine wiring conductor part 8 Semi-hardened resist image 9...Electrolytic plating layer
Claims (5)
用感光材料を配線導体を有する印刷配線板上に加熱加圧
積層する工程(1) A step of laminating a photosensitive material for a solder mask consisting of a flexible support and a photosensitive layer on a printed wiring board having wiring conductors under heat and pressure.
、未露光部を現像液で除去し、接栓部及び部品接続部を
除く配線板の全面に半硬化のレジスト画像を形成する工
程(2) Semi-cure the exposed area by irradiating actinic rays, and after death, remove the unexposed area with a developer to form a semi-cured resist image on the entire surface of the wiring board except for the plugs and component connections. process of doing
を施す工程(3) Process of applying electrolytic plating to exposed nine-way plugs and component connections
レジスト画像を完全硬化させる工程および(4) Completely curing the resist image by exposure and/or heating after electrolytic plating;
とを特徴とする印刷配線板の製造法。(5) A method for manufacturing a printed wiring board, comprising the step of soldering a plated portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16603281A JPS5867097A (en) | 1981-10-16 | 1981-10-16 | Method of producing printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16603281A JPS5867097A (en) | 1981-10-16 | 1981-10-16 | Method of producing printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5867097A true JPS5867097A (en) | 1983-04-21 |
Family
ID=15823672
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16603281A Pending JPS5867097A (en) | 1981-10-16 | 1981-10-16 | Method of producing printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5867097A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5982788A (en) * | 1982-11-02 | 1984-05-12 | 松下電工株式会社 | Printed circuit board |
| JPS62172789A (en) * | 1986-01-25 | 1987-07-29 | 宇部興産株式会社 | Manufacture of high density printed wiring board |
| JPH0271590A (en) * | 1988-09-06 | 1990-03-12 | Mitsubishi Electric Corp | Substrate for hybrid ic |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5012567A (en) * | 1973-06-07 | 1975-02-08 | ||
| JPS5446141A (en) * | 1977-09-21 | 1979-04-11 | Fujitsu Ltd | Plating method for printed substrate |
| JPS5518401A (en) * | 1978-07-25 | 1980-02-08 | Sumitomo Bakelite Co Ltd | Ink composition for coating flexible circuit base board |
-
1981
- 1981-10-16 JP JP16603281A patent/JPS5867097A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5012567A (en) * | 1973-06-07 | 1975-02-08 | ||
| JPS5446141A (en) * | 1977-09-21 | 1979-04-11 | Fujitsu Ltd | Plating method for printed substrate |
| JPS5518401A (en) * | 1978-07-25 | 1980-02-08 | Sumitomo Bakelite Co Ltd | Ink composition for coating flexible circuit base board |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5982788A (en) * | 1982-11-02 | 1984-05-12 | 松下電工株式会社 | Printed circuit board |
| JPS62172789A (en) * | 1986-01-25 | 1987-07-29 | 宇部興産株式会社 | Manufacture of high density printed wiring board |
| JPH0535595B2 (en) * | 1986-01-25 | 1993-05-26 | Ube Kosan Kk | |
| JPH0271590A (en) * | 1988-09-06 | 1990-03-12 | Mitsubishi Electric Corp | Substrate for hybrid ic |
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