JP2500659B2 - Method for manufacturing printed wiring board - Google Patents

Method for manufacturing printed wiring board

Info

Publication number
JP2500659B2
JP2500659B2 JP30139593A JP30139593A JP2500659B2 JP 2500659 B2 JP2500659 B2 JP 2500659B2 JP 30139593 A JP30139593 A JP 30139593A JP 30139593 A JP30139593 A JP 30139593A JP 2500659 B2 JP2500659 B2 JP 2500659B2
Authority
JP
Japan
Prior art keywords
resist
surface metal
plating layer
metal plating
solder resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP30139593A
Other languages
Japanese (ja)
Other versions
JPH07154058A (en
Inventor
貴徳 角田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP30139593A priority Critical patent/JP2500659B2/en
Publication of JPH07154058A publication Critical patent/JPH07154058A/en
Application granted granted Critical
Publication of JP2500659B2 publication Critical patent/JP2500659B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は印刷配線板の製造方法に
関し、特に所定箇所に異なった種類の表面金属めっき層
を有する印刷配線板の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board, and more particularly to a method for manufacturing a printed wiring board having different kinds of surface metal plating layers at predetermined locations.

【0002】[0002]

【従来の技術】従来、印刷配線板に異なった種類の表面
金属めっき層を形成するためには、図3(a)に示すよ
うに、まず導電回路形成を行った絶縁基板1上に、図3
(b)に示すように、液体フォトソルダレジスト2をス
クリーン印刷する。次いで、予備乾燥し、フォトマスク
3を介して紫外線で露光する。次に、図3(c)に示す
ように、フォトソルダレジスト2を炭酸ナトリウム水浴
液で現像し、加熱硬化する。次に、図3(d)に示すよ
うに、1次めっきレジスト4を形成した後、図3(e)
に示すように、1次めっきレジスト4に被覆されていな
い導電回路上に第1の表面金属めっき層、例えば、無電
解パラジウムめっき層5を形成する。次に、図3(f)
に示すように、1次めっきレジスト4を水酸化ナトリウ
ム水溶液で剥離する。その後、図4(a)に示すよう
に、2次めっきレジスト8を第1の表面金属めっき層の
無電解パラジウムめっき層5上に形成し、図4(b)に
示すように、2次めっきレジスト8に被覆されていない
導体回路上に第2の表面金属めっき層、例えば、無電解
ニッケルめっき層7を形成する。次いで、図4(c)に
示すように、2次めっきレジスト8を水酸化ナトリウム
水溶液で剥離し、無電解パラジウムめっき層5と無電解
ニッケルめっき層7の異なった種類の表面金属めっき層
を有する印刷配線板を製造していた。
2. Description of the Related Art Conventionally, in order to form different kinds of surface metal plating layers on a printed wiring board, as shown in FIG. Three
As shown in (b), the liquid photo solder resist 2 is screen-printed. Next, it is pre-dried and exposed to ultraviolet light through the photomask 3. Next, as shown in FIG. 3C, the photo solder resist 2 is developed with a sodium carbonate water bath solution and heat-cured. Next, as shown in FIG. 3D, after the primary plating resist 4 is formed, FIG.
As shown in, the first surface metal plating layer, for example, the electroless palladium plating layer 5 is formed on the conductive circuit which is not covered with the primary plating resist 4. Next, FIG.
As shown in, the primary plating resist 4 is peeled off with an aqueous sodium hydroxide solution. After that, as shown in FIG. 4A, a secondary plating resist 8 is formed on the electroless palladium plating layer 5 of the first surface metal plating layer, and as shown in FIG. A second surface metal plating layer, for example, an electroless nickel plating layer 7 is formed on the conductor circuit not covered with the resist 8. Next, as shown in FIG. 4 (c), the secondary plating resist 8 is peeled off with an aqueous sodium hydroxide solution to have different kinds of surface metal plating layers of the electroless palladium plating layer 5 and the electroless nickel plating layer 7. Manufactured printed wiring boards.

【0003】[0003]

【発明が解決しようとする課題】この従来の印刷配線板
の製造方法では、めっきレジストの形成,剥離を2回以
上行う必要があるため、めっきレジストの資材費及びめ
っきレジスト形成の作業工数が多くかかるという問題点
があった。
In this conventional method for manufacturing a printed wiring board, since it is necessary to form and remove the plating resist more than once, the material cost of the plating resist and the number of man-hours for forming the plating resist are large. There was a problem of this.

【0004】本発明の目的は、めっきレジストの形成,
剥離工程を省き、資材費と作業工数を削減し安価な印刷
配線板が得られる印刷配線板の製造方法を提供すること
にある。
The object of the present invention is to form a plating resist,
An object of the present invention is to provide a method for manufacturing a printed wiring board, which eliminates the peeling process, reduces the material cost and the number of work steps, and can obtain an inexpensive printed wiring board.

【0005】[0005]

【課題を解決するための手段】本発明の印刷配線板の製
造方法の第1の方法は、表面に導電回路が形成された絶
縁基板上にフォトソルダレジストを印刷し予備加熱する
工程と、フォトマスクを介して前記フォトソルダレジス
トを露光する工程と、このフォトソルダレジストの非被
覆部の前記導電回路上に第1の表面金属めっきを行い第
1の表面金属めっき層を形成する工程と、前記フォトソ
ルダレジストを現像し加熱硬化する工程と、前記第1の
表面金属めっき層上にめっきレジストを形成しこのめっ
きレジストの非被覆部の前記導電回路上に第2の表面金
属めっきを行い第2の表面金属めっき層を形成する工程
と、前記めっきレジストを剥離する工程とを有する。
A first method of a method for manufacturing a printed wiring board according to the present invention comprises a step of printing a photo solder resist on an insulating substrate having a conductive circuit formed on its surface and preheating it, and Exposing the photo solder resist through a mask; forming a first surface metal plating layer on the conductive circuit in the non-covered portion of the photo solder resist to form a first surface metal plating layer; A step of developing the photo solder resist and curing it by heating; forming a plating resist on the first surface metal plating layer; and performing a second surface metal plating on the conductive circuit in the uncovered portion of the plating resist, And a step of peeling off the plating resist.

【0006】本発明の印刷配線板の製造方法の第2の方
法は、表面に導電回路が形成された絶縁基板上にフォト
ソルダレジストを印刷し予備加熱する工程と、このフォ
トソルダレジストの非被覆部の前記導電回路上に第1の
表面金属めっきを行い第1の表面金属めっき層を形成す
る工程と、フォトマスクを介して前記フォトソルダレジ
ストを露光する工程と、このフォトソルダレジストを現
像し加熱硬化する工程と、前記第1の表面金属めっき層
上にめっきレジストを形成しこのめっきレジストの非被
覆部の前記導電回路上に第2の表面金属めっきを行い第
2の表面金属めっき層を形成する工程と、前記めっきレ
ジストを剥離する工程とを有する。
A second method of the method for manufacturing a printed wiring board of the present invention is a step of printing a photo solder resist on an insulating substrate having a conductive circuit formed on the surface thereof and preheating the same, and non-coating of the photo solder resist. Part of the conductive circuit on the conductive circuit to form a first surface metal plating layer, exposing the photo solder resist through a photomask, and developing the photo solder resist. A step of heating and curing, a plating resist is formed on the first surface metal plating layer, and a second surface metal plating is performed on the conductive circuit in the uncovered portion of the plating resist to form a second surface metal plating layer. It has a process of forming and a process of exfoliating the plating resist.

【0007】[0007]

【実施例】次に、本発明の実施例について図面を参照し
て説明する。
Embodiments of the present invention will now be described with reference to the drawings.

【0008】図1(a)〜(g)は本発明の第1の実施
例を説明する工程順に示した断面図である。本発明の第
1の実施例は、まず、図1(a)に示すように、絶縁基
板1上に導電回路を形成する。次に、図1(b)に示す
ように、液体フォトソルダレジスト2をスクリーン印刷
により所定の導電回路上に約10μm塗布した後、80
℃で30分間予備乾燥しフォトマスク3を介してフォト
ソルダレジスト2の紫外線露光を行う。次に、図1
(c)に示すように、フォトソルダレジスト2の非被覆
部の導電回路上に無電解パラジウムめっきを行い第1の
表面金属めっき層として厚みが約0.1μmの無電解パ
ラジウムめっき層5を形成する。第1の表面金属めっき
としては、電解金めっき,電解はんだめっき等が適用で
きるが、好ましくは50℃以下の中性浴が望ましい。
FIGS. 1A to 1G are sectional views showing a first embodiment of the present invention in the order of steps. In the first embodiment of the present invention, first, as shown in FIG. 1A, a conductive circuit is formed on the insulating substrate 1. Next, as shown in FIG. 1 (b), a liquid photosolder resist 2 is applied on a predetermined conductive circuit by screen printing to a thickness of about 10 μm, and then 80
After predrying at 30 ° C. for 30 minutes, the photo solder resist 2 is exposed to ultraviolet light through the photo mask 3. Next, FIG.
As shown in (c), electroless palladium plating is performed on the conductive circuit in the uncovered portion of the photo solder resist 2 to form an electroless palladium plating layer 5 having a thickness of about 0.1 μm as a first surface metal plating layer. To do. As the first surface metal plating, electrolytic gold plating, electrolytic solder plating and the like can be applied, but a neutral bath of 50 ° C. or lower is preferable.

【0009】次に、図1(d)に示すように、フォトソ
ルダレジスト2を濃度約1%の炭酸ナトリウム水溶液で
現像し、150℃で60分間加熱硬化を行う。次に、図
1(e)に示すように、無電解パラジウムめっき層5上
にめっきレジスト6を形成した後、図1(f)に示すよ
うに、めっきレジスト6の非被覆部の導電回路上に約9
0℃で20分間の条件で無電解ニッケルめっきを行い第
2表面金属めっき層として厚みが約3μmの無電解ニッ
ケルめっき層7を形成する。次に、図1(g)に示すよ
うに、濃度約1%の水酸化ナトリウム水溶液でめっきレ
ジスト6を剥離し、第1の実施例の印刷配線板を得る。
Next, as shown in FIG. 1 (d), the photo solder resist 2 is developed with an aqueous solution of sodium carbonate having a concentration of about 1% and heat-cured at 150 ° C. for 60 minutes. Next, as shown in FIG. 1 (e), after forming a plating resist 6 on the electroless palladium plating layer 5, as shown in FIG. 1 (f), on the conductive circuit of the uncovered portion of the plating resist 6. About 9
Electroless nickel plating is performed under conditions of 0 ° C. for 20 minutes to form an electroless nickel plating layer 7 having a thickness of about 3 μm as a second surface metal plating layer. Next, as shown in FIG. 1G, the plating resist 6 is peeled off with a sodium hydroxide aqueous solution having a concentration of about 1% to obtain a printed wiring board of the first embodiment.

【0010】図2(a)〜(g)は本発明の第2の実施
例を説明する工程順に示した断面図である。本発明の第
2の実施例は、まず、図2(a)に示すように、絶縁基
板1上に導体回路を形成する。次に、図2(b)に示す
ように、液体フォトソルダレジスト2をスクリーン印刷
により所定の導電回路上に約10μm塗布した後、80
℃で30分間予備乾燥する。次に、図2(c)に示すよ
うに、無電解パラジウムめっきを行い第1の表面金属め
っき層として厚みが約0.1μの無電解パラジウムめっ
き層5を形成した後、フォトマスク3を介してフォトソ
ルダレジスト2の紫外線露光を行う。
FIGS. 2A to 2G are sectional views showing a second embodiment of the present invention in the order of steps. In the second embodiment of the present invention, first, as shown in FIG. 2A, a conductor circuit is formed on the insulating substrate 1. Next, as shown in FIG. 2B, the liquid photosolder resist 2 is applied on the predetermined conductive circuit by screen printing to a thickness of about 10 μm, and then 80
Pre-dry at 30 ° C. for 30 minutes. Next, as shown in FIG. 2C, after electroless palladium plating is performed to form an electroless palladium plating layer 5 having a thickness of about 0.1 μ as a first surface metal plating layer, a photomask 3 is used. UV exposure of the photo solder resist 2 is performed.

【0011】次に、図2(d)に示すように、フォトソ
ルダレジスト2を濃度約1%の炭酸ナトリウム水溶液で
現像し、150℃で60分間加熱硬化を行う。次に、図
2(e)に示すように、無電解パラジウムめっき層5上
にめっきレジスト6を形成した後、図2(f)に示すよ
うに、めっきレジスト6の非被覆部の導電回路上に約9
0℃で20分間の条件で無電解ニッケルめっきを行い第
2表面金属めっき層として厚みが約3μmの無電解ニッ
ケルめっき層7を形成する。次に、図2(g)に示すよ
うに、濃度約1%の水酸化ナトリウム水溶液でめっきレ
ジスト6を剥離して第2の実施例の印刷配線板を得る。
Next, as shown in FIG. 2 (d), the photo solder resist 2 is developed with an aqueous solution of sodium carbonate having a concentration of about 1% and heat-cured at 150 ° C. for 60 minutes. Next, as shown in FIG. 2 (e), after forming a plating resist 6 on the electroless palladium plating layer 5, as shown in FIG. 2 (f), on the conductive circuit of the non-covered portion of the plating resist 6. About 9
Electroless nickel plating is performed under conditions of 0 ° C. for 20 minutes to form an electroless nickel plating layer 7 having a thickness of about 3 μm as a second surface metal plating layer. Next, as shown in FIG. 2G, the plating resist 6 is peeled off with a sodium hydroxide aqueous solution having a concentration of about 1% to obtain a printed wiring board of the second embodiment.

【0012】このように、第2の実施例ではフォトソル
ダレジスト2の露光を第1の表面金属めっき層形成後に
行ったが、第1の表面金属層形成前に露光を行った第1
の実施例と同様の効果が得られた。
As described above, in the second embodiment, the exposure of the photo solder resist 2 is performed after the formation of the first surface metal plating layer, but the exposure is performed before the formation of the first surface metal layer.
The same effect as that of the above example was obtained.

【0013】[0013]

【発明の効果】以上説明した様に本発明は、異なった種
類の表面金属めっき層を有する印刷配線板の製造方法に
おいて、現像する前のソルダレジストが1次的なめっき
レジストとしての役割をし、めっきレジストの資材費及
びめっきレジスト形成作業工数が削減でき安価な印刷配
線板が得られるという効果がある。
As described above, according to the present invention, the solder resist before development serves as a primary plating resist in the method for manufacturing a printed wiring board having different kinds of surface metal plating layers. The material cost of the plating resist and the man-hours for forming the plating resist can be reduced, and an inexpensive printed wiring board can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)〜(g)は本発明の第1の実施例を説明
する工程順に示した断面図である。
FIGS. 1A to 1G are cross-sectional views shown in the order of steps for explaining a first embodiment of the present invention.

【図2】(a)〜(g)は本発明の第2の実施例を説明
する工程順に示した断面図である。
2A to 2G are cross-sectional views showing the second embodiment of the present invention in the order of steps.

【図3】(a)〜(f)は従来の印刷配線板の製造方法
の一例を説明する工程順に示した断面図である。
3 (a) to 3 (f) are cross-sectional views showing a sequence of steps for explaining an example of a conventional method for manufacturing a printed wiring board.

【図4】(a)〜(c)は従来の印刷配線板の製造方法
の一例を説明する工程順に示した断面図である。
4A to 4C are cross-sectional views showing the order of steps for explaining an example of a conventional method for manufacturing a printed wiring board.

【符号の説明】[Explanation of symbols]

1 絶縁基板 2 フォトソルダレジスト 3 フォトマスク 4 1次めっきレジスト 5 無電解パラジウムめっき層 6 めっきレジスト 7 無電解ニッケルめっき層 8 2次めっきレジスト 1 Insulating Substrate 2 Photo Solder Resist 3 Photo Mask 4 Primary Plating Resist 5 Electroless Palladium Plating Layer 6 Plating Resist 7 Electroless Nickel Plating Layer 8 Secondary Plating Resist

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 表面に導電回路が形成された絶縁基板上
にフォトソルダレジストを印刷し予備加熱する工程と、
フォトマスクを介して前記フォトソルダレジストを露光
する工程と、このフォトソルダレジストの非被覆部の前
記導電回路上に第1の表面金属めっきを行い第1の表面
金属めっき層を形成する工程と、前記フォトソルダレジ
ストを現像し加熱硬化する工程と、前記第1の表面金属
めっき層上にめっきレジストを形成しこのめっきレジス
トの非被覆部の前記導電回路上に第2の表面金属めっき
を行い第2の表面金属めっき層を形成する工程と、前記
めっきレジストを剥離する工程とを有することを特徴と
する印刷配線板の製造方法。
1. A step of printing a photo solder resist on an insulating substrate having a conductive circuit formed on its surface and preheating the same.
Exposing the photo solder resist through a photo mask, and forming a first surface metal plating layer by performing a first surface metal plating on the conductive circuit in an uncovered portion of the photo solder resist, A step of developing the photo solder resist and curing it by heating; forming a plating resist on the first surface metal plating layer; and performing a second surface metal plating on the conductive circuit in the uncovered portion of the plating resist. 2. A method of manufacturing a printed wiring board, comprising: a step of forming a surface metal plating layer of No. 2; and a step of removing the plating resist.
【請求項2】 表面に導電回路が形成された絶縁基板上
にフォトレジストを印刷し予備加熱する工程と、このフ
ォトソルダレジストの非被覆部の前記導電回路上に第1
の表面金属めっきを行い第1の表面金属めっき層を形成
する工程と、フォトマスクを介して前記フォトソルダレ
ジストを露光する工程と、このフォトソルダレジストを
現像し加熱硬化する工程と、前記第1の表面金属めっき
層上にめっきレジストを形成しこのめっきレジストの非
被覆部の前記導電回路上に第2の表面金属めっきを行い
第2の表面金属めっき層を形成する工程と、前記めっき
レジストを剥離する工程とを有することを特徴とする印
刷配線板の製造方法。
2. A step of printing a photoresist on an insulating substrate having a conductive circuit formed on its surface and preheating it, and a first step on the conductive circuit of the non-covered portion of the photo solder resist.
Surface metal plating to form a first surface metal plating layer, exposing the photo solder resist through a photomask, developing the photo solder resist, and heating and curing the photo solder resist; Forming a second surface metal plating layer on the conductive circuit in the non-covered portion of the plating resist and forming a second surface metal plating layer; And a step of peeling the printed wiring board.
JP30139593A 1993-12-01 1993-12-01 Method for manufacturing printed wiring board Expired - Fee Related JP2500659B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30139593A JP2500659B2 (en) 1993-12-01 1993-12-01 Method for manufacturing printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30139593A JP2500659B2 (en) 1993-12-01 1993-12-01 Method for manufacturing printed wiring board

Publications (2)

Publication Number Publication Date
JPH07154058A JPH07154058A (en) 1995-06-16
JP2500659B2 true JP2500659B2 (en) 1996-05-29

Family

ID=17896354

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30139593A Expired - Fee Related JP2500659B2 (en) 1993-12-01 1993-12-01 Method for manufacturing printed wiring board

Country Status (1)

Country Link
JP (1) JP2500659B2 (en)

Also Published As

Publication number Publication date
JPH07154058A (en) 1995-06-16

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