JPS5792473A - Device for rapidly transferring data between succeeding memory place and data output bus of semiconductor memory - Google Patents

Device for rapidly transferring data between succeeding memory place and data output bus of semiconductor memory

Info

Publication number
JPS5792473A
JPS5792473A JP56158570A JP15857081A JPS5792473A JP S5792473 A JPS5792473 A JP S5792473A JP 56158570 A JP56158570 A JP 56158570A JP 15857081 A JP15857081 A JP 15857081A JP S5792473 A JPS5792473 A JP S5792473A
Authority
JP
Japan
Prior art keywords
output bus
memory
succeeding
semiconductor memory
data output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56158570A
Other languages
English (en)
Other versions
JPS6129069B2 (ja
Inventor
Shiefuiirudo Iiton J Saajiento
Rudorufu Uuten Deibitsudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Inmos Corp
Original Assignee
Inmos Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inmos Corp filed Critical Inmos Corp
Publication of JPS5792473A publication Critical patent/JPS5792473A/ja
Publication of JPS6129069B2 publication Critical patent/JPS6129069B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/103—Read-write modes for single port memories, i.e. having either a random port or a serial port using serially addressed read-write data registers
    • G11C7/1033—Read-write modes for single port memories, i.e. having either a random port or a serial port using serially addressed read-write data registers using data registers of which only one stage is addressed for sequentially outputting data from a predetermined number of stages, e.g. nibble read-write mode
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1045—Read-write mode select circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/106—Data output latches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1066—Output synchronization
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
JP56158570A 1980-10-10 1981-10-05 Device for rapidly transferring data between succeeding memory place and data output bus of semiconductor memory Granted JPS5792473A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/195,729 US4344156A (en) 1980-10-10 1980-10-10 High speed data transfer for a semiconductor memory

Publications (2)

Publication Number Publication Date
JPS5792473A true JPS5792473A (en) 1982-06-09
JPS6129069B2 JPS6129069B2 (ja) 1986-07-04

Family

ID=22722545

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56158570A Granted JPS5792473A (en) 1980-10-10 1981-10-05 Device for rapidly transferring data between succeeding memory place and data output bus of semiconductor memory

Country Status (5)

Country Link
US (1) US4344156A (ja)
EP (1) EP0049988B1 (ja)
JP (1) JPS5792473A (ja)
CA (1) CA1161956A (ja)
DE (1) DE3176726D1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57210495A (en) * 1981-06-10 1982-12-24 Nec Corp Block access memory

Families Citing this family (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4556961A (en) * 1981-05-26 1985-12-03 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor memory with delay means to reduce peak currents
US4480320A (en) * 1982-06-01 1984-10-30 General Instrument Corp. Compact ROM with reduced access time
US4484308A (en) * 1982-09-23 1984-11-20 Motorola, Inc. Serial data mode circuit for a memory
JPS5961152A (ja) * 1982-09-30 1984-04-07 Fujitsu Ltd 半導体装置
JPS59135695A (ja) * 1983-01-24 1984-08-03 Mitsubishi Electric Corp 半導体記憶装置
US4586167A (en) * 1983-01-24 1986-04-29 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device
US4567579A (en) * 1983-07-08 1986-01-28 Texas Instruments Incorporated Dynamic memory with high speed nibble mode
JPS6072020A (ja) * 1983-09-29 1985-04-24 Nec Corp デュアルポ−トメモリ回路
JPS60117492A (ja) * 1983-11-29 1985-06-24 Fujitsu Ltd 半導体記憶装置
JPS60136086A (ja) * 1983-12-23 1985-07-19 Hitachi Ltd 半導体記憶装置
GB8401804D0 (en) * 1984-01-24 1984-02-29 Int Computers Ltd Data storage apparatus
JPH0787037B2 (ja) * 1984-03-02 1995-09-20 沖電気工業株式会社 半導体メモリ回路のデータ書込方法
JPH0799616B2 (ja) * 1984-08-30 1995-10-25 三菱電機株式会社 半導体記憶装置
US4719602A (en) * 1985-02-07 1988-01-12 Visic, Inc. Memory with improved column access
US4630239A (en) * 1985-07-01 1986-12-16 Motorola, Inc. Chip select speed-up circuit for a memory
JPS639096A (ja) * 1986-06-30 1988-01-14 Toshiba Corp 半導体メモリ
JPS6363200A (ja) * 1986-09-03 1988-03-19 Mitsubishi Electric Corp 半導体記憶装置
EP0262413B1 (en) * 1986-09-04 1992-07-22 Fujitsu Limited Memory device employing address multiplexing
JPS63136267U (ja) * 1987-02-26 1988-09-07
US5245566A (en) * 1987-04-24 1993-09-14 Fujio Masuoka Programmable semiconductor
US5313420A (en) 1987-04-24 1994-05-17 Kabushiki Kaisha Toshiba Programmable semiconductor memory
JPH0752583B2 (ja) * 1987-11-30 1995-06-05 株式会社東芝 半導体メモリ
JPH01175314A (ja) * 1987-12-29 1989-07-11 Nec Corp 入力インバータ回路
JPS63132893U (ja) * 1988-01-08 1988-08-30
DE3928902C2 (de) * 1988-08-31 1996-01-25 Mitsubishi Electric Corp Halbleiterspeicher und Verfahren zum Betreiben desselben und Verwendung desselben in einem Video-RAM
DE69023258T2 (de) * 1989-03-15 1996-05-15 Matsushita Electronics Corp Halbleiter-Speichereinrichtung.
DE4114744C1 (ja) * 1991-05-06 1992-05-27 Siemens Ag, 8000 Muenchen, De
US6091639A (en) * 1993-08-27 2000-07-18 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and data programming method
US5506809A (en) * 1994-06-29 1996-04-09 Sharp Kabushiki Kaisha Predictive status flag generation in a first-in first-out (FIFO) memory device method and apparatus
US5729503A (en) * 1994-12-23 1998-03-17 Micron Technology, Inc. Address transition detection on a synchronous design
US5668773A (en) * 1994-12-23 1997-09-16 Micron Technology, Inc. Synchronous burst extended data out DRAM
US5682354A (en) * 1995-11-06 1997-10-28 Micron Technology, Inc. CAS recognition in burst extended data out DRAM
US5640364A (en) * 1994-12-23 1997-06-17 Micron Technology, Inc. Self-enabling pulse trapping circuit
US5652724A (en) * 1994-12-23 1997-07-29 Micron Technology, Inc. Burst EDO memory device having pipelined output buffer
US5675549A (en) * 1994-12-23 1997-10-07 Micron Technology, Inc. Burst EDO memory device address counter
US6804760B2 (en) 1994-12-23 2004-10-12 Micron Technology, Inc. Method for determining a type of memory present in a system
US5721859A (en) * 1994-12-23 1998-02-24 Micron Technology, Inc. Counter control circuit in a burst memory
US5526320A (en) 1994-12-23 1996-06-11 Micron Technology Inc. Burst EDO memory device
US6525971B2 (en) 1995-06-30 2003-02-25 Micron Technology, Inc. Distributed write data drivers for burst access memories
US5610864A (en) * 1994-12-23 1997-03-11 Micron Technology, Inc. Burst EDO memory device with maximized write cycle timing
US5598376A (en) * 1994-12-23 1997-01-28 Micron Technology, Inc. Distributed write data drivers for burst access memories
US5717654A (en) * 1995-02-10 1998-02-10 Micron Technology, Inc. Burst EDO memory device with maximized write cycle timing
US5850368A (en) * 1995-06-01 1998-12-15 Micron Technology, Inc. Burst EDO memory address counter
JP2900854B2 (ja) * 1995-09-14 1999-06-02 日本電気株式会社 半導体記憶装置
US5729504A (en) * 1995-12-14 1998-03-17 Micron Technology, Inc. Continuous burst edo memory device
US7681005B1 (en) * 1996-01-11 2010-03-16 Micron Technology, Inc. Asynchronously-accessible memory device with mode selection circuitry for burst or pipelined operation
US5966724A (en) * 1996-01-11 1999-10-12 Micron Technology, Inc. Synchronous memory device with dual page and burst mode operations
US6401186B1 (en) 1996-07-03 2002-06-04 Micron Technology, Inc. Continuous burst memory which anticipates a next requested start address
US6981126B1 (en) * 1996-07-03 2005-12-27 Micron Technology, Inc. Continuous interleave burst access
JPH10124447A (ja) * 1996-10-18 1998-05-15 Fujitsu Ltd データ転送制御方法及び装置
US7103742B1 (en) 1997-12-03 2006-09-05 Micron Technology, Inc. Burst/pipelined edo memory device
US7927948B2 (en) 2005-07-20 2011-04-19 Micron Technology, Inc. Devices with nanocrystals and methods of formation

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3857046A (en) * 1970-11-04 1974-12-24 Gen Instrument Corp Shift register-decoder circuit for addressing permanent storage memory
US3930239A (en) * 1973-07-11 1975-12-30 Philips Corp Integrated memory
JPS53117344A (en) * 1977-03-23 1978-10-13 Ibm Dynamic semiconductor memory
JPS5410412A (en) * 1977-06-23 1979-01-26 Kyokuto Kikai Seisakusho:Kk Low noise multi-stage axial flow blower
JPS5727477A (en) * 1980-07-23 1982-02-13 Nec Corp Memory circuit
JPS6118837A (ja) * 1984-07-06 1986-01-27 Yaskawa Electric Mfg Co Ltd 造波装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3771145B1 (en) * 1971-02-01 1994-11-01 Wiener Patricia P. Integrated circuit read-only memory
US4254477A (en) * 1978-10-25 1981-03-03 Mcdonnell Douglas Corporation Reconfigurable memory circuit
US4279023A (en) * 1979-12-19 1981-07-14 International Business Machines Corporation Sense latch

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3857046A (en) * 1970-11-04 1974-12-24 Gen Instrument Corp Shift register-decoder circuit for addressing permanent storage memory
US3930239A (en) * 1973-07-11 1975-12-30 Philips Corp Integrated memory
JPS53117344A (en) * 1977-03-23 1978-10-13 Ibm Dynamic semiconductor memory
JPS5410412A (en) * 1977-06-23 1979-01-26 Kyokuto Kikai Seisakusho:Kk Low noise multi-stage axial flow blower
JPS5727477A (en) * 1980-07-23 1982-02-13 Nec Corp Memory circuit
JPS6118837A (ja) * 1984-07-06 1986-01-27 Yaskawa Electric Mfg Co Ltd 造波装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57210495A (en) * 1981-06-10 1982-12-24 Nec Corp Block access memory
JPS6146916B2 (ja) * 1981-06-10 1986-10-16 Nippon Electric Co

Also Published As

Publication number Publication date
US4344156A (en) 1982-08-10
JPS6129069B2 (ja) 1986-07-04
DE3176726D1 (en) 1988-06-01
EP0049988A3 (en) 1983-09-28
EP0049988A2 (en) 1982-04-21
EP0049988B1 (en) 1988-04-27
CA1161956A (en) 1984-02-07

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