JPS5681966A - Input protecting circuit for semiconductor device - Google Patents

Input protecting circuit for semiconductor device

Info

Publication number
JPS5681966A
JPS5681966A JP15948979A JP15948979A JPS5681966A JP S5681966 A JPS5681966 A JP S5681966A JP 15948979 A JP15948979 A JP 15948979A JP 15948979 A JP15948979 A JP 15948979A JP S5681966 A JPS5681966 A JP S5681966A
Authority
JP
Japan
Prior art keywords
region
substrate
type
regions
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15948979A
Other languages
Japanese (ja)
Inventor
Takahide Kawano
Taketoshi Uchida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15948979A priority Critical patent/JPS5681966A/en
Publication of JPS5681966A publication Critical patent/JPS5681966A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0255Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a circuit usable for MNOS and C-MOS elements by forming a region floated potentially additionally to a semiconductor substrate provided with source and drain regions as an input protecting circuit. CONSTITUTION:P<+> type source and drain regions 5 and 6 are diffused in an N type Si substrate 1 at ground potential, and a gate Si3N4 film 8 is coated through a gate SiO2 film 7 being extremely thin on the substrate 11 exposed therebetween. Subsequently, the regions 5 and 6 are spaced, and are provided with P type region 2 used as floating state without connecting to any potential point at the substrate 1, an N<+> type region 3 is provided therein, and a shallow N<-> type region 4 is diffused in the surface layer of the region 2 surrounding the region 3. Thus, a diode D1 is formed between the regions 3 and 4, and a diode D2 is formed between the egion 3 and the substrate 1, an SiO2 film 10 is covered on the entire surface as an input protective circuit, a window is opened, and an input voltage applying metal wire 9 is connected to the region 3.
JP15948979A 1979-12-08 1979-12-08 Input protecting circuit for semiconductor device Pending JPS5681966A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15948979A JPS5681966A (en) 1979-12-08 1979-12-08 Input protecting circuit for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15948979A JPS5681966A (en) 1979-12-08 1979-12-08 Input protecting circuit for semiconductor device

Publications (1)

Publication Number Publication Date
JPS5681966A true JPS5681966A (en) 1981-07-04

Family

ID=15694879

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15948979A Pending JPS5681966A (en) 1979-12-08 1979-12-08 Input protecting circuit for semiconductor device

Country Status (1)

Country Link
JP (1) JPS5681966A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58178560A (en) * 1982-04-13 1983-10-19 Nec Corp Semiconductor device
JPS5965461A (en) * 1982-10-06 1984-04-13 Toshiba Corp Semiconductor device
JPS59100579A (en) * 1982-12-01 1984-06-09 Matsushita Electronics Corp Semiconductor device
JPS6021561A (en) * 1983-07-15 1985-02-02 Nec Corp Semiconductor protection device
JPS6230361A (en) * 1985-07-31 1987-02-09 Nec Corp Cmos input protecting circuit
JP2010212710A (en) * 2010-04-26 2010-09-24 Fuji Electric Systems Co Ltd Semiconductor device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58178560A (en) * 1982-04-13 1983-10-19 Nec Corp Semiconductor device
JPH0237113B2 (en) * 1982-04-13 1990-08-22 Nippon Electric Co
JPS5965461A (en) * 1982-10-06 1984-04-13 Toshiba Corp Semiconductor device
JPS59100579A (en) * 1982-12-01 1984-06-09 Matsushita Electronics Corp Semiconductor device
JPS6021561A (en) * 1983-07-15 1985-02-02 Nec Corp Semiconductor protection device
JPH0244156B2 (en) * 1983-07-15 1990-10-02 Nippon Electric Co
JPS6230361A (en) * 1985-07-31 1987-02-09 Nec Corp Cmos input protecting circuit
JP2010212710A (en) * 2010-04-26 2010-09-24 Fuji Electric Systems Co Ltd Semiconductor device

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