JPS5661146A - Formation of multilayer wiring - Google Patents

Formation of multilayer wiring

Info

Publication number
JPS5661146A
JPS5661146A JP13913679A JP13913679A JPS5661146A JP S5661146 A JPS5661146 A JP S5661146A JP 13913679 A JP13913679 A JP 13913679A JP 13913679 A JP13913679 A JP 13913679A JP S5661146 A JPS5661146 A JP S5661146A
Authority
JP
Japan
Prior art keywords
layer
al2o3
wiring
multilayer wiring
si3n4
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13913679A
Other languages
Japanese (ja)
Other versions
JPS596063B2 (en
Inventor
Masahiko Denda
Wataru Wakamiya
Shinichi Sato
Hirokazu Miyoshi
Natsuo Tsubouchi
Kouji Harada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP13913679A priority Critical patent/JPS596063B2/en
Priority to US06/184,171 priority patent/US4381595A/en
Priority to DE3033513A priority patent/DE3033513C2/en
Publication of JPS5661146A publication Critical patent/JPS5661146A/en
Publication of JPS596063B2 publication Critical patent/JPS596063B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To prevent Al diffusion and to obtain high-reliability multilayer wiring by forming Al2O3 on an Al wiring layer surface wherein Si3N4 is consisted as a layer insulation film. CONSTITUTION:SiO2 2 is provided on an Si substrate 1 and Al wiring 3 and Si3N4 5 are stacked on the SiO2 2. The film 5 is selectively opened to provide a resist layer 61 and the layer 61 is covered with Al2O3 9, 10 thin films. Then, a connection window 7 is provided by lifting off the Al2O3 10 and an Al layer 8 is stacked on the Al2O3 9 and the window 7. The Al2O3 9 checks the diffusion causing from an Al layer 8 to Si3N4 5 and prevents the short circuit between the Al layer 8 and the Al wiring 3. In this way, high-reliability multilayer wiring will be obtained.
JP13913679A 1979-10-09 1979-10-25 How to form multilayer wiring Expired JPS596063B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP13913679A JPS596063B2 (en) 1979-10-25 1979-10-25 How to form multilayer wiring
US06/184,171 US4381595A (en) 1979-10-09 1980-09-04 Process for preparing multilayer interconnection
DE3033513A DE3033513C2 (en) 1979-10-09 1980-09-05 Process for the production of an aluminum-containing conductor layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13913679A JPS596063B2 (en) 1979-10-25 1979-10-25 How to form multilayer wiring

Publications (2)

Publication Number Publication Date
JPS5661146A true JPS5661146A (en) 1981-05-26
JPS596063B2 JPS596063B2 (en) 1984-02-08

Family

ID=15238369

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13913679A Expired JPS596063B2 (en) 1979-10-09 1979-10-25 How to form multilayer wiring

Country Status (1)

Country Link
JP (1) JPS596063B2 (en)

Also Published As

Publication number Publication date
JPS596063B2 (en) 1984-02-08

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