JPS56169422A - Phase synchronizing circuit - Google Patents

Phase synchronizing circuit

Info

Publication number
JPS56169422A
JPS56169422A JP7316080A JP7316080A JPS56169422A JP S56169422 A JPS56169422 A JP S56169422A JP 7316080 A JP7316080 A JP 7316080A JP 7316080 A JP7316080 A JP 7316080A JP S56169422 A JPS56169422 A JP S56169422A
Authority
JP
Japan
Prior art keywords
signal
converter
circuit
fed
color burst
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7316080A
Other languages
Japanese (ja)
Inventor
Keisuke Ogi
Masaaki Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP7316080A priority Critical patent/JPS56169422A/en
Publication of JPS56169422A publication Critical patent/JPS56169422A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0624Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by synchronisation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/08Continuously compensating for, or preventing, undesired influence of physical parameters of noise
    • H03M1/0836Continuously compensating for, or preventing, undesired influence of physical parameters of noise of phase error, e.g. jitter
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Color Television Systems (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To reduce the phase jitter of sampled clock, by adding a fluctuating signal within one quantized step of an A/D converter to the color burst of an input signal for the A/D conversion. CONSTITUTION:An NTSC signal from an input terminal 1 is fed to a synchronizing separation circuit 4 and fed to an A/D converter 2 via an adder 42 for digitization. A color burst signal is picked up at a burst pickup circuit 5 by the output of the circuit 4 from the converter 2, and the phase shift with the reference signal is detected at an operation circuit 6, and this detected output controls a voltage controlled oscillator 8 via a D/A converter 7 to produce sampled clocks. Further, a fluctuation signal in step the amplitude of which is changed per color burst one cycle is produced at a production circuit 41 and fed to the adder 42, and the phase comparison characteristics are in bang bang control and the phase jitter can be reduced.
JP7316080A 1980-05-31 1980-05-31 Phase synchronizing circuit Pending JPS56169422A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7316080A JPS56169422A (en) 1980-05-31 1980-05-31 Phase synchronizing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7316080A JPS56169422A (en) 1980-05-31 1980-05-31 Phase synchronizing circuit

Publications (1)

Publication Number Publication Date
JPS56169422A true JPS56169422A (en) 1981-12-26

Family

ID=13510134

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7316080A Pending JPS56169422A (en) 1980-05-31 1980-05-31 Phase synchronizing circuit

Country Status (1)

Country Link
JP (1) JPS56169422A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61135229A (en) * 1984-12-03 1986-06-23 アールシーエー トムソン ライセンシング コーポレイシヨン Processor for analog signal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61135229A (en) * 1984-12-03 1986-06-23 アールシーエー トムソン ライセンシング コーポレイシヨン Processor for analog signal

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