JPS5521639A - Clock generation circuit - Google Patents

Clock generation circuit

Info

Publication number
JPS5521639A
JPS5521639A JP9458378A JP9458378A JPS5521639A JP S5521639 A JPS5521639 A JP S5521639A JP 9458378 A JP9458378 A JP 9458378A JP 9458378 A JP9458378 A JP 9458378A JP S5521639 A JPS5521639 A JP S5521639A
Authority
JP
Japan
Prior art keywords
output
pulse
waveform
clock
clear
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9458378A
Other languages
Japanese (ja)
Inventor
Wataru Kosuge
Kazuo Ebino
Yukihiro Mutsuumaya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Nippon Telegraph and Telephone Corp filed Critical Hitachi Ltd
Priority to JP9458378A priority Critical patent/JPS5521639A/en
Publication of JPS5521639A publication Critical patent/JPS5521639A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/03Astable circuits

Abstract

PURPOSE:To simply keep constant the phase relation to the clear pulse and to give a given width to the clock waveform immediately after the clear pulse, by producing the clock pulse in synchronizing with the timing of clear. CONSTITUTION:When the clear pulse a is ON, i.e., at L, the output b of the AND gate 2 is at L and the output d of the inverter 4 is at H. When the clear pulse a is OFF, i.e., at H, the output b is at H. This is delayed at the delay element 3 by t, and inverted into the waveform d and fed back to the AND gate to cause the output at L. By repeating this, the output waveform b is obtained. The output waveform can be picked up from a suitable part of the feedback loop, for example, from the terminal 5A also. The period of the clock is 2t and the pulse width of the clock waveform immediately after the clear pulse is always constant, the value t.
JP9458378A 1978-08-04 1978-08-04 Clock generation circuit Pending JPS5521639A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9458378A JPS5521639A (en) 1978-08-04 1978-08-04 Clock generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9458378A JPS5521639A (en) 1978-08-04 1978-08-04 Clock generation circuit

Publications (1)

Publication Number Publication Date
JPS5521639A true JPS5521639A (en) 1980-02-15

Family

ID=14114289

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9458378A Pending JPS5521639A (en) 1978-08-04 1978-08-04 Clock generation circuit

Country Status (1)

Country Link
JP (1) JPS5521639A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59103424A (en) * 1982-11-01 1984-06-14 ユナイテツド・テクノロジ−ズ・コ−ポレイシヨン Series-parallel data converting circuit
JPS59122112A (en) * 1982-12-23 1984-07-14 フエアチアイルド・カメラ・アンド・インストルメント・コ−ポレ−シヨン Temperature stabilized stop-restarting oscillator
JPS631207A (en) * 1986-06-16 1988-01-06 テクトロニックス・インコ−ポレイテッド Trigger starting type oscillator
JP2014090375A (en) * 2012-10-31 2014-05-15 Lapis Semiconductor Co Ltd Multiphase clock generation circuit and dll circuit including the same

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
ELECTRONIC DESIGN=1969 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59103424A (en) * 1982-11-01 1984-06-14 ユナイテツド・テクノロジ−ズ・コ−ポレイシヨン Series-parallel data converting circuit
JPS59122112A (en) * 1982-12-23 1984-07-14 フエアチアイルド・カメラ・アンド・インストルメント・コ−ポレ−シヨン Temperature stabilized stop-restarting oscillator
JPS631207A (en) * 1986-06-16 1988-01-06 テクトロニックス・インコ−ポレイテッド Trigger starting type oscillator
JP2014090375A (en) * 2012-10-31 2014-05-15 Lapis Semiconductor Co Ltd Multiphase clock generation circuit and dll circuit including the same

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