JPS5374350A - Logic circuit - Google Patents

Logic circuit

Info

Publication number
JPS5374350A
JPS5374350A JP15045776A JP15045776A JPS5374350A JP S5374350 A JPS5374350 A JP S5374350A JP 15045776 A JP15045776 A JP 15045776A JP 15045776 A JP15045776 A JP 15045776A JP S5374350 A JPS5374350 A JP S5374350A
Authority
JP
Japan
Prior art keywords
logic circuit
circuit
improving
feature
power consumption
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15045776A
Other languages
Japanese (ja)
Other versions
JPS5623337B2 (en
Inventor
Teruaki Tanaka
Yasushi Sato
Yasoji Suzuki
Tomohisa Shigematsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15045776A priority Critical patent/JPS5374350A/en
Publication of JPS5374350A publication Critical patent/JPS5374350A/en
Publication of JPS5623337B2 publication Critical patent/JPS5623337B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals
    • H03K19/0963—Synchronous circuits, i.e. using clock signals using transistors of complementary type

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Read Only Memory (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To realize a logic circuit which features comparatively small IF-FET number and the power consumption and can feature a high-density integration, by improving the clock pulse control type logic circuit with a stability circuit.
JP15045776A 1976-12-15 1976-12-15 Logic circuit Granted JPS5374350A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15045776A JPS5374350A (en) 1976-12-15 1976-12-15 Logic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15045776A JPS5374350A (en) 1976-12-15 1976-12-15 Logic circuit

Publications (2)

Publication Number Publication Date
JPS5374350A true JPS5374350A (en) 1978-07-01
JPS5623337B2 JPS5623337B2 (en) 1981-05-30

Family

ID=15497336

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15045776A Granted JPS5374350A (en) 1976-12-15 1976-12-15 Logic circuit

Country Status (1)

Country Link
JP (1) JPS5374350A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58161535A (en) * 1982-03-19 1983-09-26 Toshiba Corp Logical circuit
WO1984003806A1 (en) * 1983-03-23 1984-09-27 Gen Electric Cmos latch cell including five transistors, and static flip-flops employing the cell
JPS59229794A (en) * 1983-05-16 1984-12-24 Rohm Co Ltd Logical circuit
JPH01175412A (en) * 1987-12-29 1989-07-11 Fujitsu Ltd Semiconductor integrated circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4956549A (en) * 1972-09-30 1974-06-01

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4956549A (en) * 1972-09-30 1974-06-01

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58161535A (en) * 1982-03-19 1983-09-26 Toshiba Corp Logical circuit
JPH0429255B2 (en) * 1982-03-19 1992-05-18
WO1984003806A1 (en) * 1983-03-23 1984-09-27 Gen Electric Cmos latch cell including five transistors, and static flip-flops employing the cell
US4484087A (en) * 1983-03-23 1984-11-20 General Electric Company CMOS latch cell including five transistors, and static flip-flops employing the cell
JPS59229794A (en) * 1983-05-16 1984-12-24 Rohm Co Ltd Logical circuit
JPS635927B2 (en) * 1983-05-16 1988-02-05 Rohm Kk
JPH01175412A (en) * 1987-12-29 1989-07-11 Fujitsu Ltd Semiconductor integrated circuit
JP2540178B2 (en) * 1987-12-29 1996-10-02 富士通株式会社 Semiconductor integrated circuit

Also Published As

Publication number Publication date
JPS5623337B2 (en) 1981-05-30

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