JPS53143139A - Control logic circuit - Google Patents
Control logic circuitInfo
- Publication number
- JPS53143139A JPS53143139A JP5914677A JP5914677A JPS53143139A JP S53143139 A JPS53143139 A JP S53143139A JP 5914677 A JP5914677 A JP 5914677A JP 5914677 A JP5914677 A JP 5914677A JP S53143139 A JPS53143139 A JP S53143139A
- Authority
- JP
- Japan
- Prior art keywords
- logic circuit
- control logic
- offer
- clock signals
- high reliability
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
- H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To offer the control logic circuit with regular construction having high reliability, by using logical array programmable without using clock signals.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5914677A JPS53143139A (en) | 1977-05-20 | 1977-05-20 | Control logic circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5914677A JPS53143139A (en) | 1977-05-20 | 1977-05-20 | Control logic circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS53143139A true JPS53143139A (en) | 1978-12-13 |
Family
ID=13104891
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5914677A Pending JPS53143139A (en) | 1977-05-20 | 1977-05-20 | Control logic circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS53143139A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60203015A (en) * | 1984-07-31 | 1985-10-14 | テクトロニクス・インコ−ポレイテツド | Switch control circuit |
KR100871689B1 (en) * | 2006-02-21 | 2008-12-05 | 삼성전자주식회사 | High performance static programmable logic array |
-
1977
- 1977-05-20 JP JP5914677A patent/JPS53143139A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60203015A (en) * | 1984-07-31 | 1985-10-14 | テクトロニクス・インコ−ポレイテツド | Switch control circuit |
KR100871689B1 (en) * | 2006-02-21 | 2008-12-05 | 삼성전자주식회사 | High performance static programmable logic array |
US7474122B2 (en) | 2006-02-21 | 2009-01-06 | Samsung Electronics Co., Ltd. | High-performance static programmable logic array |
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