JPH10215042A - Multilayer wiring board - Google Patents

Multilayer wiring board

Info

Publication number
JPH10215042A
JPH10215042A JP1398997A JP1398997A JPH10215042A JP H10215042 A JPH10215042 A JP H10215042A JP 1398997 A JP1398997 A JP 1398997A JP 1398997 A JP1398997 A JP 1398997A JP H10215042 A JPH10215042 A JP H10215042A
Authority
JP
Japan
Prior art keywords
organic resin
layer
wiring conductor
resin insulating
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1398997A
Other languages
Japanese (ja)
Inventor
Seiichi Takami
征一 高見
Hidetoshi Yugawa
英敏 湯川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP1398997A priority Critical patent/JPH10215042A/en
Publication of JPH10215042A publication Critical patent/JPH10215042A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer wiring board wherein wiring conductors can be formed at high densities, and the occurrence of warpage on the whole is prevented effectively, and electrodes of active parts including a semiconductor element and passive parts including a capacitor element and a resistor can be electrically connected securely and firmly to bonding pads. SOLUTION: In a wiring board, an organic resin insulating layer 2 and a thin film wiring conductor layer 3 are laminated alternately on an insulating substrate 1, and an upper thin film wiring conductor layer 3 is electrically connected to a lower thin film wiring conductor layer 3 via through hole conductors 9, and a bonding pad 10 which is electrically connected to the thin film wiring conductor layer 3, and on which an external electronic part A is mounted is provided on the uppermost organic resin insulating layer 2. In this case, a metallic layer 7 is embedded almost entirely in the insulating substrate 1 in nearly parallel with a main plane.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は多層配線基板に関
し、より詳細には混成集積回路装置や半導体素子を収容
する半導体素子収納用パッケージ等に使用される多層配
線基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board, and more particularly to a multilayer wiring board used for a hybrid integrated circuit device, a semiconductor element housing package for housing a semiconductor element, and the like.

【0002】[0002]

【従来の技術】従来、混成集積回路装置や半導体素子収
納用パッケージ等に使用される多層配線基板はその配線
導体がMo−Mn法等の厚膜形成技術によって形成され
ている。
2. Description of the Related Art Hitherto, a multilayer wiring board used in a hybrid integrated circuit device, a package for accommodating a semiconductor element, or the like, has its wiring conductor formed by a thick film forming technique such as the Mo-Mn method.

【0003】このMo−Mn法は通常、タングステン、
モリブデン、マンガン等の高融点金属粉末に有機溶剤、
溶媒を添加混合し、ペースト状となした金属ペーストを
生セラミック体の外表面にスクリーン印刷法により所定
パターンに印刷塗布し、次にこれを複数枚積層するとと
もに還元雰囲気中で焼成し、高融点金属粉末と生セラミ
ック体とを焼結一体化させる方法である。
[0003] This Mo-Mn method is generally used for tungsten,
Organic solvents for high melting point metal powders such as molybdenum and manganese,
A solvent is added and mixed, and a paste-like metal paste is applied by printing on the outer surface of the green ceramic body in a predetermined pattern by a screen printing method. This is a method of sintering and integrating a metal powder and a green ceramic body.

【0004】なお、前記配線導体が形成されるセラミッ
ク体としては通常、酸化アルミニウム質焼結体やムライ
ト質焼結体等の酸化物系セラミックス、或いは表面に酸
化物膜を被着させた窒化アルミニウム質焼結体や炭化珪
素質焼結体等の非酸化物系セラミックスが使用される。
The ceramic body on which the wiring conductor is formed is usually an oxide ceramic such as an aluminum oxide sintered body or a mullite sintered body, or an aluminum nitride having an oxide film deposited on the surface. Non-oxide ceramics such as a porous sintered body and a silicon carbide sintered body are used.

【0005】しかしながら、このMo−Mn法を用いて
配線導体を形成した場合、配線導体は金属ペーストをス
クリーン印刷することにより形成されることから微細化
が困難で配線導体を高密度に形成することができないと
いう欠点を有していた。
However, when the wiring conductor is formed by using the Mo-Mn method, the wiring conductor is formed by screen-printing a metal paste. Had the drawback that it could not be done.

【0006】そこで上記欠点を解消するために配線導体
を従来の厚膜形成技術で形成するのに代えて微細化が可
能な薄膜形成技術を用いて高密度に形成した多層配線基
板が使用されるようなってきた。
In order to solve the above-mentioned drawbacks, instead of forming the wiring conductor by the conventional thick film forming technique, a multilayer wiring board formed by using a thin film forming technique capable of miniaturization is used. I've been like that.

【0007】かかる配線導体を薄膜形成技術により形成
した多層配線基板は、ビスマレイミドトリアジン樹脂や
ガラス繊維を織り込んだガラス布にエポキシ樹脂を含浸
させて形成されるガラスエポキシ樹脂等から成る絶縁基
板の上面に、スピンコート法及び熱硬化処理等によって
形成されるエポキシ樹脂から成る有機樹脂絶縁層と、銅
やアルミニウム等の金属を無電解めっき法や蒸着法等の
薄膜形成技術及びフォトリソグラフィー技術を採用する
ことによって形成される薄膜配線導体層とを交互に積層
させるとともに、上下に位置する薄膜配線導体層を有機
樹脂絶縁層に設けたスルーホールの内壁に被着させたス
ルーホール導体を介して電気的に接続させた構造を有し
ており、最上層の有機樹脂絶縁層上面に、前記薄膜配線
導体層と電気的に接続するボンディングパッドを形成し
ておき、該ボンディングパッドに半導体素子等の能動部
品や容量素子、抵抗器等の受動部品の電極を熱圧着等に
より接続させるようになっている。
A multilayer wiring board in which such wiring conductors are formed by a thin film forming technique is an upper surface of an insulating substrate made of a glass epoxy resin or the like formed by impregnating a glass cloth woven with bismaleimide triazine resin or glass fiber with an epoxy resin. In addition, an organic resin insulating layer made of an epoxy resin formed by a spin coating method, a thermosetting treatment, or the like, and a thin film forming technology such as an electroless plating method or a vapor deposition method of a metal such as copper or aluminum and a photolithography technology are employed. The thin-film wiring conductor layers formed in this manner are alternately laminated, and the upper and lower thin-film wiring conductor layers are electrically connected via the through-hole conductors attached to the inner walls of the through-holes provided in the organic resin insulating layer. And the uppermost organic resin insulating layer is electrically connected to the thin film wiring conductor layer. Previously formed a bonding pad for connection has become active component, a capacitor such as a semiconductor element to said bonding pad, a passive component of the electrode of the resistor or the like so as to be connected by thermocompression bonding or the like.

【0008】[0008]

【発明が解決しようとする課題】しかしながら、この有
機樹脂絶縁層と薄膜配線導体層とを交互に多層に積層し
て形成される多層配線基板は、絶縁基板の上面に有機樹
脂絶縁層を形成する際、絶縁基板に有機樹脂絶縁層の熱
硬化時に発生する応力が作用して絶縁基板に大きな反り
を発生させてしまい、その結果、絶縁基板の上面に形成
されている有機樹脂絶縁層表面のボンディングパッドの
形成位置にばらつきが生じ、ボンディングパッドに半導
体素子等の能動部品や容量素子、抵抗器等の受動部品の
電極を確実、強固に電気的接続することができないとい
う欠点を招来した。
However, in a multilayer wiring board formed by alternately laminating the organic resin insulating layers and the thin film wiring conductor layers in a multilayer, the organic resin insulating layer is formed on the upper surface of the insulating substrate. At this time, the stress generated during the thermal curing of the organic resin insulating layer acts on the insulating substrate, causing a large warpage of the insulating substrate, and as a result, bonding of the surface of the organic resin insulating layer formed on the upper surface of the insulating substrate. Variations occur in the positions where the pads are formed, resulting in a drawback that the electrodes of active components such as semiconductor elements and the like and capacitors and passive components such as resistors cannot be reliably and electrically connected to the bonding pads.

【0009】本発明は上記諸欠点に鑑み案出されたもの
で、その目的は配線導体を薄膜形成技術により形成し、
配線導体を高密度に形成するのを可能とするとともに全
体に反りが発生するのを有効に防止し、ボンディングパ
ッドに半導体素子等の能動部品や容量素子、抵抗器等の
受動部品の電極を確実、強固に電気的接続することがで
きる多層配線基板を提供することにある。
The present invention has been made in view of the above-mentioned drawbacks, and has as its object to form a wiring conductor by a thin film forming technique,
It enables high-density wiring conductors, effectively prevents warpage of the whole, and ensures that the electrodes of active components such as semiconductor devices and passive components such as capacitors and resistors are securely attached to the bonding pads. It is another object of the present invention to provide a multilayer wiring board capable of firmly electrically connecting.

【0010】[0010]

【課題を解決するための手段】本発明は、絶縁基板の少
なくとも一主面上に、有機樹脂絶縁層と薄膜配線導体層
とを交互に積層するとともに上下に位置する薄膜配線導
体層を有機樹脂絶縁層に設けたスルーホール導体を介し
て電気的に接続してなり、最上層の有機樹脂絶縁層上面
に、前記薄膜配線導体層と電気的に接続し、外部の電子
部品が接続されるボンディングパッドを設けて成る多層
配線基板であって、前記絶縁基板はその内部で、前記一
主面と略平行な方向の略全面に金属層が埋設されている
ことを特徴とするものである。
According to the present invention, an organic resin insulating layer and a thin film wiring conductor layer are alternately laminated on at least one principal surface of an insulating substrate, and the thin film wiring conductor layers located above and below are formed on an organic resin. A bonding electrically connected through a through-hole conductor provided in the insulating layer, and electrically connected to the thin-film wiring conductor layer on the upper surface of the uppermost organic resin insulating layer, to which an external electronic component is connected. A multilayer wiring board provided with pads, wherein a metal layer is embedded inside substantially the entire surface of the insulating substrate in a direction substantially parallel to the one main surface.

【0011】また本発明は、前記金属層の厚み(T 1
が、絶縁基板の厚みを(T2 )としたとき、T2 /10
0≦T 1≦T2 /10であることを特徴とするものであ
る。
[0011] The present invention, the thickness of the metal layer (T 1)
But when the thickness of the insulating substrate and (T 2), T 2/ 10
It is characterized in that it is 0 ≦ T 1 ≦ T 2/ 10.

【0012】本発明の多層配線基板によれば、絶縁基板
上に薄膜形成技術によって配線を形成したことから配線
の微細化が可能となり、配線を極めて高密度に形成する
ことが可能となる。
According to the multilayer wiring board of the present invention, since the wiring is formed on the insulating substrate by the thin film forming technique, the wiring can be miniaturized, and the wiring can be formed at an extremely high density.

【0013】また本発明の多層配線基板によれば、絶縁
基板の内部で、有機樹脂絶縁層が被着形成される主面と
略平行な方向の略全面に、その厚み(T 1)が絶縁基板
の厚み(T2 )に対してT2 /100≦T 1≦T2 /1
0の金属層を埋設させたことから絶縁基板は外力に対す
る機械的強度が向上し、絶縁基板上に有機樹脂絶層を形
成する際、絶縁基板に有機樹脂絶縁層の熱硬化時に発生
する応力が作用したとしても絶縁基板に大きな反りが発
生することは殆どなく、その結果、ボンディングパッド
の形成位置が同一の平面となり、ボンディングパッドに
半導体素子等の能動部品や容量素子、抵抗器等の受動部
品の電極を確実、強固に電気的接続することが可能とな
る。
According to the multilayer wiring board of the present invention, the thickness (T 1 ) is insulated on substantially the entire surface in a direction substantially parallel to the main surface on which the organic resin insulating layer is formed on the inside of the insulating substrate. T the thickness of the substrate (T 2) 2/100 ≦ T 1 ≦ T 2/1
The mechanical strength of the insulating substrate against external force is improved by embedding the metal layer of No. 0, and when the organic resin insulating layer is formed on the insulating substrate, the stress generated during the thermosetting of the organic resin insulating layer on the insulating substrate is reduced. Even if it acts, a large warp hardly occurs on the insulating substrate. As a result, the bonding pads are formed on the same plane, and active components such as semiconductor elements and passive components such as capacitors and resistors are formed on the bonding pads. The electrodes can be reliably and firmly electrically connected.

【0014】[0014]

【発明の実施の形態】次に本発明を添付図面に基づき詳
細に説明する。図1は、本発明の多層配線基板の一実施
例を示し、1は絶縁基板、2は有機樹脂絶縁層、3は薄
膜配線導体層である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 shows an embodiment of a multilayer wiring board according to the present invention, wherein 1 is an insulating substrate, 2 is an organic resin insulating layer, and 3 is a thin-film wiring conductor layer.

【0015】前記絶縁基板1はその上面に有機樹脂絶縁
層2と薄膜配線導体層3とから成る多層配線部4が配設
されており、該多層配線部4を支持する支持部材として
作用する。
On the upper surface of the insulating substrate 1, a multilayer wiring portion 4 comprising an organic resin insulating layer 2 and a thin-film wiring conductor layer 3 is disposed, and functions as a support member for supporting the multilayer wiring portion 4.

【0016】前記絶縁基板1はガラス繊維を織り込んだ
布にエポキシ樹脂を含浸させたガラスエポキシ樹脂基板
やガラス繊維を織り込んだ布にビスマレイミドトリアジ
ン樹脂を含浸させたビスマレイミドトリアジン基板等の
電気絶縁基板を複数枚積層するとともにその各々を一体
的に接合させて形成されており、例えば、ガラスエポキ
シ樹脂基板を使用して形成する場合は、ガラス繊維を織
り込んだ布にエポキシ樹脂の前駆体を含浸させたものを
複数枚積層し、しかる後、前記エポキシ樹脂前駆体を1
00℃〜200℃の温度で熱硬化させることによって製
作される。
The insulating substrate 1 is an electrically insulating substrate such as a glass epoxy resin substrate obtained by impregnating an epoxy resin into a cloth woven with glass fibers or a bismaleimide triazine substrate obtained by impregnating a bismaleimide triazine resin into a cloth woven with glass fibers. It is formed by laminating a plurality of sheets and joining each of them integrally.For example, when forming using a glass epoxy resin substrate, impregnating a cloth woven with glass fibers with a precursor of epoxy resin. The epoxy resin precursor is then laminated with a plurality of
It is manufactured by thermosetting at a temperature of 00C to 200C.

【0017】また前記絶縁基板1には上下両主面に貫通
する孔径が例えば、300μm〜500μmの貫通孔5
が形成されており、該貫通孔5の内壁には両端が絶縁基
板1の上下両面に導出する導電層6が被着されている。
The insulating substrate 1 has a through hole 5 having a diameter of, for example, 300 μm to 500 μm penetrating through the upper and lower main surfaces.
A conductive layer 6 is attached to the inner wall of the through hole 5, the conductive layer 6 having both ends leading out to the upper and lower surfaces of the insulating substrate 1.

【0018】前記貫通孔5は後述する絶縁基板1の上面
に形成される多層配線部4の薄膜配線導体層3と外部電
気回路とを電気的に接続する、或いは絶縁基板1の上下
両主面に多層配線部4を配設した場合には両主面の多層
配線部4の薄膜配線導体層同士を電気的に接続する導電
層6を形成するための形成孔として作用し、絶縁基板1
にドリル孔あけ加工法を施すことによって絶縁基板1の
所定位置に所定形状に形成される。
The through hole 5 electrically connects the thin-film wiring conductor layer 3 of the multilayer wiring portion 4 formed on the upper surface of the insulating substrate 1 to be described later and an external electric circuit, or the upper and lower main surfaces of the insulating substrate 1 When the multi-layer wiring portion 4 is disposed on the insulating substrate 1, the multi-layer wiring portion 4 acts as a formation hole for forming a conductive layer 6 for electrically connecting the thin-film wiring conductor layers of the multi-layer wiring portion 4 on both main surfaces.
The insulating substrate 1 is formed into a predetermined shape at a predetermined position by performing a drilling method on the substrate.

【0019】更に前記貫通孔5の内壁及び絶縁基板1の
上下両面に被着形成されている導電層6は例えば、銅や
ニッケル等の金属材料から成り、従来周知のめっき法及
びエッチング法を採用することによって貫通孔5の内壁
に両端を絶縁基板1の上下両面に導出させた状態で被着
形成される。
The conductive layer 6 formed on the inner wall of the through hole 5 and on the upper and lower surfaces of the insulating substrate 1 is made of a metal material such as copper or nickel. As a result, the inner wall of the through hole 5 is adhered and formed with both ends being led out to the upper and lower surfaces of the insulating substrate 1.

【0020】前記絶縁基板1にはまたその内部に多層配
線部4が配設される面と略平行な方向で、かつ略全面に
わたって金属層7が埋設されており、該金属層7によっ
て絶縁基板1の外力に対する機械的強度が大幅に改善さ
れ、絶縁基板1の上面に後述する多層配線部4の有機樹
脂絶縁層2を形成する際、絶縁基板1に有機樹脂絶縁層
2の熱硬化時に発生する応力が作用したとしても絶縁基
板1に大きな反りを発生することは殆どない。
A metal layer 7 is buried in the insulating substrate 1 in a direction substantially parallel to the surface on which the multilayer wiring portion 4 is provided and substantially over the entire surface thereof. The mechanical strength against external force is greatly improved, and when the organic resin insulating layer 2 of the multilayer wiring portion 4 described later is formed on the upper surface of the insulating substrate 1, the organic resin insulating layer 2 is generated on the insulating substrate 1 when the organic resin insulating layer 2 is thermally cured. Even if a stress is applied, the insulating substrate 1 hardly generates a large warp.

【0021】前記金属層7は銅やアルミニウム、銀、ニ
ッケル、鉄等の金属材料からなり、銅等の金属材料箔
を、複数枚のガラスエポキシ樹脂基板やビスマレイミド
トリアジン基板を積層結合させて絶縁基板1を得る際、
積層されるガラスエポキシ樹脂基板やビスマレイミドト
リアジン基板間に配しておくことによって絶縁基板1の
内部に埋設される。
The metal layer 7 is made of a metal material such as copper, aluminum, silver, nickel, and iron. A metal material foil such as copper is insulated by laminating a plurality of glass epoxy resin substrates or bismaleimide triazine substrates. When obtaining the substrate 1,
By arranging between the glass epoxy resin substrate and the bismaleimide triazine substrate to be laminated, it is embedded in the insulating substrate 1.

【0022】また前記金属層7はその厚み(T 1)が、
絶縁基板1の厚みを(T2 )としたとき、T2 /100
>T 1となると金属層7による絶縁基板1の機械的強度
の改善が不十分となって多層配線部4の有機樹脂絶縁層
2を形成する際に絶縁基板1に反りが発生してしまい、
またT 1>T2 /10となると金属層7と有機樹脂絶縁
層2との間に両者の熱膨張係数の相違に起因して大きな
熱応力が発生するとともに該熱応力によって剥離が発生
してしまう。従って、前記金属層7はその厚み(T 1
が、絶縁基板1の厚みを(T2 )としたとき、T2 /1
00≦T 1≦T2 /10の範囲に特定される。
The metal layer 7 has a thickness (T 1 )
When the thickness of the insulating substrate 1 and (T 2), T 2/ 100
> T 1 to become the cause warpage occurs in the insulating substrate 1 when the improvement in the mechanical strength of the insulating substrate 1 by the metal layer 7 to form an organic resin insulating layer 2 of the multilayer wiring portion 4 becomes insufficient,
Peeling by heat stress is generated along with the addition T 1> large thermal stress due to the difference in thermal expansion coefficient therebetween between T 2/10 when it comes to the metal layer 7 and an organic resin insulating layer 2 is generated I will. Accordingly, the metal layer 7 has a thickness (T 1 )
But when the thickness of the insulating substrate 1 and (T 2), T 2/ 1
It is specified in the range of 00 ≦ T 1 ≦ T 2/ 10.

【0023】更に前記絶縁基板1の上面には有機樹脂絶
縁層2と薄膜配線導体層3とが交互に多層に配設されて
形成される多層配線部4が被着されており、該多層配線
部4を構成する有機樹脂絶縁層2は上下に位置する薄膜
配線導体層3の電気的絶縁をはかる作用をなし、また薄
膜配線導体層3は電気信号を伝達するための伝達路とし
て作用する。
Further, on the upper surface of the insulating substrate 1, a multilayer wiring portion 4 formed by alternately arranging an organic resin insulating layer 2 and a thin film wiring conductor layer 3 in a multilayer is attached. The organic resin insulating layer 2 constituting the portion 4 functions to electrically insulate the thin film wiring conductor layers 3 located above and below, and the thin film wiring conductor layer 3 functions as a transmission path for transmitting an electric signal.

【0024】前記多層配線部4の有機樹脂絶縁層2は、
エポキシ樹脂、ビスマレイミドポリアジド樹脂、ポリフ
ェニレンエーテル樹脂、ふっ素樹脂等の有機樹脂から成
り、例えば、エポキシ樹脂から成る場合、ビスフェノー
ルA型エポキシ樹脂、ノボラック型エポキシ樹脂、グリ
シジルエステル型エポキシ樹脂等にアミン系硬化剤、イ
ミダゾール系硬化剤、酸無水物系硬化剤等の硬化剤を添
加混合してペースト状のエポキシ樹脂前駆体を得るとと
もに該エポキシ樹脂前駆体を基板1の上部にスピンコー
ト法により被着させ、しかる後、これを80〜200℃
の熱で0.5〜3時間熱処理し、熱硬化させることによ
って形成される。
The organic resin insulating layer 2 of the multilayer wiring section 4
It is made of an organic resin such as an epoxy resin, a bismaleimide polyazide resin, a polyphenylene ether resin, and a fluororesin. For example, in the case of an epoxy resin, a bisphenol A type epoxy resin, a novolak type epoxy resin, a glycidyl ester type epoxy resin, and an amine type are used. A curing agent such as a curing agent, an imidazole-based curing agent, and an acid anhydride-based curing agent is added and mixed to obtain a paste-like epoxy resin precursor, and the epoxy resin precursor is applied on the substrate 1 by spin coating. After that, this is heated to 80 to 200 ° C.
Is formed by heat-treating with heat of 0.5 to 3 hours.

【0025】更に前記多層配線部4の有機樹脂絶縁層2
はその各々の所定位置に最小径が有機樹脂絶縁層2の厚
みに対して約1.5倍程度のスルーホール8が形成され
ており、該スルーホール8は後述する有機樹脂絶縁層2
を介して上下に位置する薄膜配線導体層3の各々を電気
的に接続するスルーホール導体9を形成するための形成
孔として作用する。
Further, the organic resin insulating layer 2 of the multilayer wiring section 4
Has a through hole 8 having a minimum diameter of about 1.5 times the thickness of the organic resin insulating layer 2 at each predetermined position.
, And acts as a forming hole for forming a through-hole conductor 9 for electrically connecting each of the thin-film wiring conductor layers 3 located above and below via.

【0026】前記有機樹脂絶縁層2に設けるスルーホー
ル8は有機樹脂絶縁層2に従来周知のフォトリソグラフ
ィー技術を採用することによって所定の径に形成され
る。
The through hole 8 provided in the organic resin insulating layer 2 is formed in the organic resin insulating layer 2 to a predetermined diameter by employing a conventionally known photolithography technique.

【0027】また前記各有機樹脂絶縁層2の上面には所
定パターンの薄膜配線導体層3が、更に各有機樹脂絶縁
層2に設けたスルーホール8の内壁にはスルーホール導
体9が各々配設されており、スルーホール導体9によっ
て間に有機樹脂絶縁層2を挟んで上下に位置する各薄膜
配線導体層3の各々が電気的に接続されるようになって
いる。
A thin-film wiring conductor layer 3 having a predetermined pattern is provided on the upper surface of each organic resin insulating layer 2, and a through-hole conductor 9 is provided on the inner wall of a through hole 8 provided in each organic resin insulating layer 2. Each of the thin-film wiring conductor layers 3 located above and below the organic resin insulating layer 2 with the through-hole conductor 9 therebetween is electrically connected.

【0028】前記各有機樹脂絶縁層2の上面及びスルー
ホール8の内壁に配設される薄膜配線導体層3及びスル
ーホール導体9は銅、ニッケル、金、アルミニウム等の
金属材料を無電解めっき法や蒸着法、スパッタリング法
等の薄膜形成技術及びフォトリソグラフィー技術を採用
することによって形成され、例えば、銅で形成されてい
る場合には、有機樹脂絶縁層2の上面及びスルーホール
8の内表面に、硫酸銅0.06モル/リットル、ホルマ
リン0.3モル/リットル、水酸化ナトリウム0.35
モル/リットル、エチレンジアミン四酢酸0.35モル
/リットルから成る無電解銅めっき浴を用いて厚さ1μ
m乃至40μmの銅層を被着させ、しかる後、前記銅層
をフォトリソグラフィー技術により所定パターンに加工
することによって各有機樹脂絶縁層2間、及びスルーホ
ール8内壁に配設される。この場合、薄膜配線導体層3
及びスルーホール導体9は薄膜形成技術により形成され
ることから配線の微細化が可能であり、これによって薄
膜配線導体層3を極めて高密度に形成することが可能と
なる。
The thin-film wiring conductor layer 3 and the through-hole conductor 9 provided on the upper surface of each of the organic resin insulating layers 2 and the inner wall of the through-hole 8 are made of a metal material such as copper, nickel, gold, or aluminum by electroless plating. And a thin film forming technique such as a vapor deposition method and a sputtering method, and a photolithography technique. For example, when the thin film is formed of copper, it is formed on the upper surface of the organic resin insulating layer 2 and the inner surface of the through hole 8. , Copper sulfate 0.06 mol / l, formalin 0.3 mol / l, sodium hydroxide 0.35
Mol / liter, and an electroless copper plating bath consisting of 0.35 mol / liter of ethylenediaminetetraacetic acid.
A copper layer of m to 40 μm is deposited, and then the copper layer is processed into a predetermined pattern by a photolithography technique to be disposed between the organic resin insulating layers 2 and on the inner wall of the through hole 8. In this case, the thin film wiring conductor layer 3
In addition, since the through-hole conductor 9 is formed by a thin-film forming technique, it is possible to miniaturize the wiring, whereby the thin-film wiring conductor layer 3 can be formed at an extremely high density.

【0029】なお、前記有機樹脂絶縁層2と薄膜配線導
体層3とを交互に多層に配設して形成される多層配線部
4は各有機樹脂絶縁層2の上面を中心線平均粗さ(R
a)で0.05μm≦Ra≦5μmの粗面としておくと
有機樹脂絶縁層2と薄膜配線導体層3との接合及び上下
に位置する有機樹脂絶縁層2同士の接合を強固となすこ
とができる。従って、前記多層配線部4の各有機樹脂絶
縁層2はその上面をエッチング加工法等によって粗し、
中心線平均粗さ(Ra)で0.05μm≦Ra≦5μm
の粗面としておくことが好ましい。
The multilayer wiring portion 4 formed by alternately arranging the organic resin insulating layers 2 and the thin film wiring conductor layers 3 in a multilayer structure has a center line average roughness (upper surface) of each organic resin insulating layer 2. R
By setting a rough surface of 0.05 μm ≦ Ra ≦ 5 μm in a), the bonding between the organic resin insulating layer 2 and the thin-film wiring conductor layer 3 and the bonding between the organic resin insulating layers 2 located above and below can be made strong. . Therefore, the upper surface of each organic resin insulating layer 2 of the multilayer wiring portion 4 is roughened by an etching method or the like,
Center line average roughness (Ra): 0.05 μm ≦ Ra ≦ 5 μm
It is preferable to make the surface rough.

【0030】また前記有機樹脂絶縁層2はその表面の
2.5mmの長さにおける凹凸の高さ(Pc)のカウン
ト値を、1μm≦Pc≦10μmが500個以上、0.
1μm≦Pc≦1μmが2500個以上、0.01μm
≦Pc≦0.1μmが12500以上としておくと有機
樹脂絶縁層2と薄膜配線導体層3との接合及び上下に位
置する有機樹脂絶縁層2同士の接合がより強固となる。
従って、前記有機樹脂絶縁層2はその表面の2.5mm
の長さにおける凹凸の高さ(Pc)のカウント値を、1
μm≦Pc≦10μmが500個以上、0.1μm≦P
c≦1μmが2500個以上、0.01μm≦Pc≦
0.1μmが12500以上としておくとことが好まし
い。
The count value of the height (Pc) of the unevenness at a length of 2.5 mm on the surface of the organic resin insulating layer 2 is 500 when 1 μm ≦ Pc ≦ 10 μm.
2500 μm of 1 μm ≦ Pc ≦ 1 μm, 0.01 μm
When ≦ Pc ≦ 0.1 μm is set to 12500 or more, the bonding between the organic resin insulating layer 2 and the thin-film wiring conductor layer 3 and the bonding between the organic resin insulating layers 2 located above and below become stronger.
Therefore, the organic resin insulating layer 2 has a surface of 2.5 mm
The count value of the height of irregularities (Pc) in the length of
500 μm ≦ Pc ≦ 10 μm or more, 0.1 μm ≦ P
2500 or more when c ≦ 1 μm, 0.01 μm ≦ Pc ≦
It is preferable that 0.1 μm is 12500 or more.

【0031】前記有機樹脂絶縁層2上面の中心線平均粗
さ(Ra)及び2.5mmの長さにおける凹凸の高さ
(Pc)のカウント値は、有機樹脂絶縁層2の表面を原
子間力顕微鏡(Digital Instruments Inc.製のDimensio
n 3000-Nano Scope III)で50μm角の対角(70μ
m)に走査させてその表面状態を検査測定し、その測定
結果より各々の数値を出した。
The count value of the center line average roughness (Ra) of the upper surface of the organic resin insulating layer 2 and the height of the unevenness (Pc) at a length of 2.5 mm are obtained by measuring the surface of the organic resin insulating layer 2 with an atomic force. Microscope (Dimensio manufactured by Digital Instruments Inc.
n 3000-Nano Scope III)
m), the surface condition was inspected and measured, and each numerical value was obtained from the measurement result.

【0032】また前記中心線平均粗さ(Ra)が0.0
5μm≦Ra≦5μm、2.5mmの長さにおける凹凸
の高さ(Pc)のカウント値が、1μm≦Pc≦10μ
mが500個以上、0.1μm≦Pc≦1μmが250
0個以上、0.01μm≦Pc≦0.1μmが1250
0以上の有機樹脂絶縁層2は、該有機樹脂絶縁層2の上
面にCHF3 、CF4 、Ar等のガスを吹きつけリアク
ティブイオンエッチング処理をすることによって表面が
所定の粗さに粗される。
The center line average roughness (Ra) is 0.0
5 μm ≦ Ra ≦ 5 μm, the count value of the height of unevenness (Pc) at a length of 2.5 mm is 1 μm ≦ Pc ≦ 10 μm
m is 500 or more, and 0.1 μm ≦ Pc ≦ 1 μm is 250
0 or more, 0.01 μm ≦ Pc ≦ 0.1 μm is 1250
The surface of the organic resin insulating layer 2 of 0 or more is roughened to a predetermined roughness by performing a reactive ion etching process by blowing a gas such as CHF 3 , CF 4 , or Ar onto the upper surface of the organic resin insulating layer 2. You.

【0033】更に前記有機樹脂絶縁層2はその各々の厚
みが100μmを越えると有機樹脂絶縁層2にフォトリ
ソグラフィー技術を採用することによってスルーホール
8を形成する際、エッチング加工時間が長くなってスル
ーホール8を所望する鮮明な形状に形成するのが困難と
なり、また5μm未満となると有機樹脂絶縁層2の上面
に上下に位置する有機樹脂絶縁層2の接合強度を上げる
ための粗面加工を施す際、有機樹脂絶縁層2に不要な穴
が形成され上下に位置する薄膜配線導体層3に不要な電
気的短絡を招来してしまう危険性がある。従って、前記
有機樹脂絶縁層2はその各々の厚みを5μm〜100μ
mの範囲としておくことが好ましい。
Further, when the thickness of each of the organic resin insulating layers 2 exceeds 100 μm, when the through holes 8 are formed by employing photolithography technology in the organic resin insulating layers 2, the etching processing time becomes longer and the through-holes become longer. It is difficult to form the hole 8 into a desired clear shape, and if it is less than 5 μm, rough surface processing is performed on the upper surface of the organic resin insulating layer 2 to increase the bonding strength of the upper and lower organic resin insulating layers 2. In this case, there is a risk that unnecessary holes are formed in the organic resin insulating layer 2 and unnecessary electrical short circuits are caused in the thin film wiring conductor layers 3 located above and below. Accordingly, the organic resin insulating layer 2 has a thickness of 5 μm to 100 μm.
It is preferable to set the range of m.

【0034】また更に前記多層配線部4の各薄膜配線導
体層3はその厚みが1μm未満であると各薄膜配線導体
層3の電気抵抗値が大きなものとなって各薄膜配線導体
層3に所定の電気信号を伝達させることが困難となり、
また40μmを越えると薄膜配線導体層3を有機樹脂絶
縁層2に被着させる際に薄膜配線導体層3の内部に大き
な応力が内在し、該大きな内在応力によって薄膜配線導
体層3が有機樹脂絶縁層2から剥離し易いものとなる。
従って、前記多層配線部4の各薄膜配線導体層3の厚み
は1μm〜40μmの範囲としておくことが好ましい。
Further, when the thickness of each thin-film wiring conductor layer 3 of the multilayer wiring portion 4 is less than 1 μm, the electric resistance of each thin-film wiring conductor layer 3 becomes large and a predetermined value is applied to each thin-film wiring conductor layer 3. It is difficult to transmit the electric signal of
If the thickness exceeds 40 μm, a large stress is present inside the thin-film wiring conductor layer 3 when the thin-film wiring conductor layer 3 is applied to the organic resin insulating layer 2, and the large intrinsic stress causes the thin-film wiring conductor layer 3 to break down the organic resin insulating layer. It becomes easy to peel off from the layer 2.
Therefore, it is preferable that the thickness of each thin-film wiring conductor layer 3 of the multilayer wiring portion 4 be in the range of 1 μm to 40 μm.

【0035】前記有機樹脂絶縁層2と薄膜配線導体層3
とを交互に多層に配設して形成される多層配線部4は更
に、最上層の有機樹脂絶縁層2の上面に薄膜配線導体層
3と電気的に接続しているボンディングパッド10が形
成されており、該ボンディングパッド10は的に接続さ
せる作用をなす。
The organic resin insulating layer 2 and the thin film wiring conductor layer 3
And a bonding pad 10 electrically connected to the thin film wiring conductor layer 3 is further formed on the upper surface of the uppermost organic resin insulating layer 2. The bonding pad 10 functions to make a proper connection.

【0036】前記ボンディングパッド10は金属層7の
埋設によって絶縁基板1に反りが発生していないことか
らその全てが略同一の平面に存在することとなり、その
結果、ボンディングパッド10に半導体素子や容量素
子、抵抗器等の電子部品Aの電極を確実、強固に電気的
接続することが可能となる。
Since the bonding pads 10 are not warped in the insulating substrate 1 due to the burying of the metal layer 7, all of the bonding pads 10 exist on substantially the same plane. Electrodes of the electronic component A such as elements and resistors can be reliably and firmly electrically connected.

【0037】前記ボンディングパッド10は例えば、直
径200〜500μmの円形状をなしており、該ボンデ
ィングパッド10に半導体素子や容量素子等の電子部品
Aの電極を熱圧着等により接続させれば、半導体素子や
容量素子等の電子部品Aの電極は薄膜配線導体層3に電
気的に接続されることとなる。
The bonding pad 10 is formed in a circular shape having a diameter of, for example, 200 to 500 μm. If an electrode of an electronic component A such as a semiconductor element or a capacitor is connected to the bonding pad 10 by thermocompression or the like, a semiconductor can be formed. The electrodes of the electronic component A such as the element and the capacitor are electrically connected to the thin-film wiring conductor layer 3.

【0038】なお、前記ボンディングパッド10は薄膜
配線導体層3と同じ金属材料、具体的には銅、ニッケ
ル、金、アルミニウム等の金属材料からなり、最上層の
有機樹脂絶縁層2上に薄膜配線導体層3を形成する際に
同時に前記薄膜配線導体層3と電気的接続をもって形成
される。
The bonding pad 10 is made of the same metal material as the thin-film wiring conductor layer 3, specifically, a metal material such as copper, nickel, gold, aluminum or the like. When the conductor layer 3 is formed, it is formed at the same time as the thin-film wiring conductor layer 3 with electrical connection.

【0039】かくして上述の多層配線基板によれば、最
上層の有機樹脂絶縁層2上面に設けたボンディングパッ
ド10に半導体素子や容量素子等の電子部品Aの電極を
熱圧着等により接続させ、電子部品Aの電極をボンディ
ングパッド10を介して薄膜配線導体層3に電気的に接
続させることによって半導体装置や混成集積回路装置と
なり、薄膜配線導体層3の一部を外部電気回路に接続す
れば前記電子部品Aが外部電気回路に接続されることと
なる。
Thus, according to the above-described multilayer wiring board, the electrodes of the electronic component A such as a semiconductor element and a capacitance element are connected to the bonding pad 10 provided on the upper surface of the uppermost organic resin insulating layer 2 by thermocompression or the like. By electrically connecting the electrodes of the component A to the thin-film wiring conductor layer 3 via the bonding pads 10, a semiconductor device or a hybrid integrated circuit device is obtained. If a part of the thin-film wiring conductor layer 3 is connected to an external electric circuit, The electronic component A is connected to the external electric circuit.

【0040】なお、本発明は上述の実施例に限定される
ものではなく、本発明の要旨を逸脱しない範囲であれば
種々の変更は可能であり、例えば上述の実施例において
は絶縁基板1の上面側のみに複数の有機樹脂絶縁層2と
複数の薄膜配線導体層3とを交互に積層して形成される
多層配線部4を被着させたが、該多層配線部4を絶縁基
板1の下面側のみに設けても、上下の両主面に設けても
よい。
It should be noted that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention. A multilayer wiring portion 4 formed by alternately laminating a plurality of organic resin insulating layers 2 and a plurality of thin film wiring conductor layers 3 on only the upper surface side is applied. It may be provided only on the lower surface side, or may be provided on both upper and lower main surfaces.

【0041】[0041]

【発明の効果】本発明の多層配線基板によれば、絶縁基
板上に薄膜形成技術によって配線を形成したことから配
線の微細化が可能となり、配線を極めて高密度に形成す
ることが可能となる。
According to the multilayer wiring board of the present invention, since the wiring is formed on the insulating substrate by the thin film forming technique, the wiring can be miniaturized and the wiring can be formed at an extremely high density. .

【0042】また本発明の多層配線基板によれば、絶縁
基板の内部で、有機樹脂絶縁層が被着形成される主面と
略平行な方向の略全面に、その厚み(T 1)が絶縁基板
の厚み(T2 )に対してT2 /100≦T 1≦T2 /1
0の金属層を埋設させたことから絶縁基板は外力に対す
る機械的強度が向上し、絶縁基板上に有機樹脂絶層を形
成する際、絶縁基板に有機樹脂絶縁層の熱硬化時に発生
する応力が作用したとしても絶縁基板に大きな反りが発
生することは殆どなく、その結果、ボンディングパッド
に半導体素子等の能動部品や容量素子、抵抗器等の受動
部品の電極を確実、強固に電気的接続することが可能と
なる。
Further, according to the multilayer wiring board of the present invention, the thickness (T 1 ) is insulated on substantially the entire surface in the direction substantially parallel to the main surface on which the organic resin insulating layer is formed on the inside of the insulating substrate. T the thickness of the substrate (T 2) 2/100 ≦ T 1 ≦ T 2/1
The mechanical strength of the insulating substrate against external force is improved by embedding the metal layer of No. 0, and when the organic resin insulating layer is formed on the insulating substrate, the stress generated during the thermosetting of the organic resin insulating layer on the insulating substrate is reduced. Even if it acts, a large warp is hardly generated on the insulating substrate. As a result, the electrodes of active components such as semiconductor elements and the like, capacitive elements, and passive components such as resistors are electrically and firmly connected to the bonding pads. It becomes possible.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の多層配線基板の一実施例を示す断面図
である。
FIG. 1 is a sectional view showing one embodiment of a multilayer wiring board of the present invention.

【符号の説明】[Explanation of symbols]

1・・・絶縁基板 2・・・有機樹脂絶縁層 2a・・最上層の有機樹脂絶縁層 3・・・薄膜配線導体層 4・・・多層配線部 6・・・導電層 7・・・金属層 8・・・スルーホール 9・・・スルーホール導体 10・・ボンディングパッド A・・・電子部品 DESCRIPTION OF SYMBOLS 1 ... Insulating substrate 2 ... Organic resin insulating layer 2a ... Top organic resin insulating layer 3 ... Thin film wiring conductor layer 4 ... Multilayer wiring part 6 ... Conductive layer 7 ... Metal Layer 8: Through hole 9: Through hole conductor 10. Bonding pad A: Electronic component

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】絶縁基板の少なくとも一主面上に、有機樹
脂絶縁層と薄膜配線導体層とを交互に積層するとともに
上下に位置する薄膜配線導体層を有機樹脂絶縁層に設け
たスルーホール導体を介して電気的に接続してなり、最
上層の有機樹脂絶縁層上面に、前記薄膜配線導体層と電
気的に接続し、外部の電子部品が接続されるボンディン
グパッドを設けて成る多層配線基板であって、前記絶縁
基板はその内部で、前記一主面と略平行な方向の略全面
に金属層が埋設されていることを特徴とする多層配線基
板。
1. A through-hole conductor in which an organic resin insulating layer and a thin-film wiring conductor layer are alternately laminated on at least one principal surface of an insulating substrate, and thin-film wiring conductor layers located above and below are provided on the organic resin insulating layer. And a bonding pad electrically connected to the thin-film wiring conductor layer and connected to an external electronic component on the upper surface of the uppermost organic resin insulating layer. A multilayer wiring board, wherein a metal layer is embedded inside substantially the entire surface of the insulating substrate in a direction substantially parallel to the one main surface.
【請求項2】前記金属層はその厚み(T 1)が、絶縁基
板の厚みを(T2 )としたとき、T2 /100≦T 1
2 /10であることを特徴とする請求項1記載の多層
配線基板。
Wherein said metal layer has a thickness (T 1), when the thickness of the insulating substrate and (T 2), T 2/ 100 ≦ T 1 ≦
2. The multilayer wiring board according to claim 1, wherein T 2/10.
JP1398997A 1997-01-28 1997-01-28 Multilayer wiring board Pending JPH10215042A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1398997A JPH10215042A (en) 1997-01-28 1997-01-28 Multilayer wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1398997A JPH10215042A (en) 1997-01-28 1997-01-28 Multilayer wiring board

Publications (1)

Publication Number Publication Date
JPH10215042A true JPH10215042A (en) 1998-08-11

Family

ID=11848650

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1398997A Pending JPH10215042A (en) 1997-01-28 1997-01-28 Multilayer wiring board

Country Status (1)

Country Link
JP (1) JPH10215042A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6928726B2 (en) * 2003-07-24 2005-08-16 Motorola, Inc. Circuit board with embedded components and method of manufacture
US7286366B2 (en) 2005-03-24 2007-10-23 Motorola, Inc. Multilayer circuit board with embedded components and method of manufacture
DE102007040876A1 (en) * 2006-09-14 2008-04-03 Denso Corp., Kariya Multilayer printed circuit board, has substrate made of isolation material, and switching structures made of conducting material and laminated on top of each other by substrate in lamination direction
US8284557B2 (en) 2007-10-18 2012-10-09 Kyocera Corporation Circuit board, mounting structure, and method for manufacturing circuit board

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6928726B2 (en) * 2003-07-24 2005-08-16 Motorola, Inc. Circuit board with embedded components and method of manufacture
US7286366B2 (en) 2005-03-24 2007-10-23 Motorola, Inc. Multilayer circuit board with embedded components and method of manufacture
US7594318B2 (en) 2005-03-24 2009-09-29 Motorola, Inc. Multilayer circuit board with embedded components and method of manufacture
DE102007040876A1 (en) * 2006-09-14 2008-04-03 Denso Corp., Kariya Multilayer printed circuit board, has substrate made of isolation material, and switching structures made of conducting material and laminated on top of each other by substrate in lamination direction
US8284557B2 (en) 2007-10-18 2012-10-09 Kyocera Corporation Circuit board, mounting structure, and method for manufacturing circuit board

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