JPH11233679A - Multilayer wiring board - Google Patents
Multilayer wiring boardInfo
- Publication number
- JPH11233679A JPH11233679A JP10035105A JP3510598A JPH11233679A JP H11233679 A JPH11233679 A JP H11233679A JP 10035105 A JP10035105 A JP 10035105A JP 3510598 A JP3510598 A JP 3510598A JP H11233679 A JPH11233679 A JP H11233679A
- Authority
- JP
- Japan
- Prior art keywords
- organic resin
- resin insulating
- insulating layer
- wiring conductor
- thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、多層配線基板に関
し、より詳細には混成集積回路装置や半導体素子を収容
する半導体素子収納用パッケージ等に使用される多層配
線基板に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board, and more particularly to a multilayer wiring board used for a hybrid integrated circuit device, a semiconductor element housing package for housing a semiconductor element, and the like.
【０００２】[0002]
【従来の技術】従来、混成集積回路装置や半導体素子収
納用パッケージ等に使用される多層配線基板はその配線
導体がＭｏ−Ｍｎ法等の厚膜形成技術によって形成され
ている。2. Description of the Related Art Hitherto, a multilayer wiring board used in a hybrid integrated circuit device, a package for accommodating a semiconductor element, or the like, has its wiring conductor formed by a thick film forming technique such as the Mo-Mn method.
【０００３】このＭｏ−Ｍｎ法は通常、タングステン、
モリブデン、マンガン等の高融点金属粉末に有機溶剤、
溶媒を添加混合し、ペースト状となした金属ペーストを
シート状の生セラミック体の外表面にスクリーン印刷法
により所定パターンに印刷塗布し、次にこれを複数枚積
層するとともに還元雰囲気中で焼成し、高融点金属粉末
と生セラミック体とを焼結一体化させる方法である。[0003] This Mo-Mn method is generally used for tungsten,
Organic solvents for high melting point metal powders such as molybdenum and manganese,
A solvent is added and mixed, and a paste-like metal paste is printed and applied in a predetermined pattern on the outer surface of a sheet-like green ceramic body by a screen printing method, and then a plurality of these are laminated and fired in a reducing atmosphere. A method of sintering and integrating a high melting point metal powder and a green ceramic body.
【０００４】なお、前記配線導体が形成されるセラミッ
ク体としては、通常、酸化アルミニウム質焼結体やムラ
イト質焼結体等の酸化物系セラミックス、或いは表面に
酸化物膜を被着させた窒化アルミニウム質焼結体や炭化
珪素質焼結体等の非酸化物系セラミックスが使用され
る。The ceramic body on which the wiring conductor is formed is usually an oxide ceramic such as an aluminum oxide sintered body or a mullite sintered body, or a nitride having an oxide film deposited on the surface. Non-oxide ceramics such as an aluminum sintered body and a silicon carbide sintered body are used.
【０００５】しかしながら、このＭｏ−Ｍｎ法を用いて
配線導体を形成した場合、配線導体は金属ペーストをス
クリーン印刷することにより形成されることから微細化
が困難で配線導体を高密度に形成することができないと
いう欠点を有していた。However, when the wiring conductor is formed by using the Mo-Mn method, the wiring conductor is formed by screen-printing a metal paste. Had the drawback that it could not be done.
【０００６】そこで上記欠点を解消するために配線導体
を従来周知の厚膜形成技術により形成するのに変えて微
細化が可能な薄膜形成技術を用いて高密度に形成した多
層配線基板が使用されるようになってきた。In order to solve the above-mentioned drawbacks, a multilayer wiring board formed using a thin film forming technique capable of miniaturization instead of forming a wiring conductor by a conventionally known thick film forming technique is used. It has become.
【０００７】かかる配線導体を薄膜形成技術により形成
した多層配線基板は、酸化アルミニウム質焼結体から成
るセラミックスやガラス繊維を織り込んだガラス布にエ
ポキシ樹脂を含浸させて形成されるガラスエポキシ樹脂
等から成る基板の上面にスピンコート法及び熱硬化処理
によって形成されるエポキシ樹脂等の有機樹脂から成る
絶縁層と、銅やアルミニウム等の金属を無電解メッキ法
や蒸着法等の薄膜形成技術及びフォトリソグラフィー技
術を採用することによって形成される薄膜配線導体層と
を交互に積層させるとともに、上下に位置する薄膜配線
導体層を有機樹脂絶縁層に設けたスルーホール導体を介
して電気的に接続させた構造を有しており、最上層の有
機樹脂絶縁層上面に前記薄膜配線導体層と電気的に接続
するボンディングパッドを形成しておき、該ボンディン
グパッドに半導体素子等の能動部品や容量素子、抵抗器
等の受動部品の電極を半田等のロウ材を介して接続させ
るようになっている。A multilayer wiring board in which such wiring conductors are formed by a thin film forming technique is made of glass epoxy resin formed by impregnating ceramics made of aluminum oxide sintered body or glass cloth woven with glass fibers with epoxy resin. An insulating layer made of an organic resin such as an epoxy resin formed by spin coating and thermosetting on the upper surface of a substrate made of a metal, such as copper or aluminum, and a thin film forming technique such as an electroless plating method or a vapor deposition method, and photolithography. A structure in which thin-film wiring conductor layers formed by adopting technology are alternately laminated, and the thin-film wiring conductor layers located above and below are electrically connected via through-hole conductors provided in the organic resin insulating layer. Bonding on the upper surface of the uppermost organic resin insulating layer to be electrically connected to the thin film wiring conductor layer Previously formed the head, so as to connect the active components and capacitive elements such as semiconductor devices to the bonding pad, the passive components of the electrode of the resistor or the like through a solder or the like brazing material.
【０００８】[0008]
【発明が解決しようとする課題】しかしながら、この有
機樹脂絶縁層と薄膜配線導体層とを交互に多層に積層し
て形成される多層配線基板は、ボンディングパッドの各
々が最上層の有機樹脂絶縁層上面に同一平面に形成され
ており、かつボンディングパッドの隣接間隔が、例えば
２００μｍと極めて狭いことからボンディングパッドに
半導体素子等の能動部品や容量素子、抵抗器等の受動部
品の電極を半田等から成るロウ材を介して接続させる
際、ロウ材の一部が隣接するボンディングパッドに流れ
て隣接するボンディングパッド間を電気的に短絡させて
しまい、その結果、ボンディングパッドに接続される半
導体素子等に誤動作を起こさせるという欠点を有してい
た。However, in a multilayer wiring board formed by alternately laminating the organic resin insulating layers and the thin film wiring conductor layers in multiple layers, each of the bonding pads has the uppermost organic resin insulating layer. The electrodes are formed on the same plane on the top surface, and the electrodes of active components such as semiconductor elements, capacitors, and passive components such as resistors are connected to the bonding pads from solder etc. because the adjacent distance between the bonding pads is extremely narrow, for example, 200 μm. When the connection is made via the brazing material, a part of the brazing material flows to the adjacent bonding pad and electrically short-circuits the adjacent bonding pad. It has the disadvantage of causing malfunction.
【０００９】また有機樹脂絶縁層に対するボンディング
パッドの接合が平面的であることから、有機樹脂絶縁層
とボンディングパッドの接合部に多層配線基板と半導体
素子や容量素子、抵抗器等との熱膨張係数の相違に起因
して発生する熱応力が繰り返し印加されるとボンディン
グパッドが有機樹脂絶縁層より剥離してしまい、その結
果、半導体素子等の能動部品や容量素子、抵抗器等の受
動部品の薄膜配線導体層に対する接続の信頼性が低いも
のとなる欠点も有していた。Further, since the bonding of the bonding pad to the organic resin insulating layer is planar, the coefficient of thermal expansion between the multilayer wiring board and the semiconductor element, the capacitor, the resistor, etc. is formed at the bonding portion between the organic resin insulating layer and the bonding pad. When the thermal stress generated due to the difference is applied repeatedly, the bonding pad is peeled off from the organic resin insulating layer, and as a result, the thin film of the active component such as the semiconductor device and the passive component such as the capacitor and the resistor. There was also a disadvantage that the reliability of connection to the wiring conductor layer was low.
【００１０】本発明は上記諸欠点に鑑み案出されたもの
で、その目的は配線導体を薄膜形成技術により形成し、
配線導体を高密度に形成するのを可能とするとともに有
機樹脂絶縁層に対するボンディングパッドの接合を強固
として半導体素子や容量素子等の部品の薄膜配線導体層
に対する接続の信頼性を高いものと成すことができる多
層配線基板を提供することにある。The present invention has been made in view of the above-mentioned drawbacks, and its object is to form a wiring conductor by a thin film forming technique,
To enable the formation of wiring conductors at high density and to strengthen the bonding of the bonding pads to the organic resin insulating layer to achieve high reliability of connection of semiconductor elements, capacitors and other components to the thin film wiring conductor layer. It is an object of the present invention to provide a multilayer wiring board that can perform the above.
【００１１】[0011]
【課題を解決するための手段】本発明は、基板上に、有
機樹脂絶縁層と薄膜配線導体層とを交互に積層するとと
もに上下に位置する薄膜配線導体層を有機樹脂絶縁層に
設けたスルーホール導体を介して電気的に接続してな
り、最上層の有機樹脂絶縁層に設けた穴部底面に、前記
薄膜配線導体層と電気的に接続し、外部の電子部品が接
続されるボンディングパッドを設けて成る多層配線基板
であって、前記穴部内壁の下端側の少なくとも一部をボ
ンディングパッド中に埋設させたことを特徴とするもの
である。According to the present invention, there is provided a through-hole in which an organic resin insulating layer and a thin film wiring conductor layer are alternately laminated on a substrate, and thin film wiring conductor layers positioned above and below are provided on the organic resin insulating layer. A bonding pad electrically connected via a hole conductor, and a bottom surface of a hole provided in the uppermost organic resin insulating layer, electrically connected to the thin film wiring conductor layer and connected to an external electronic component. Wherein at least a part of a lower end side of the inner wall of the hole is embedded in a bonding pad.
【００１２】本発明の多層配線基板によれば、絶縁基板
上に薄膜形成技術によって配線を形成したことから配線
の微細化が可能となり、配線を極めて高密度に形成する
ことが可能になる。According to the multilayer wiring board of the present invention, since the wiring is formed on the insulating substrate by the thin film forming technique, the wiring can be miniaturized and the wiring can be formed at a very high density.
【００１３】また本発明の多層配線基板によれば、最上
層の有機樹脂絶縁層に穴部を設け、該穴部底面にボンデ
ィングパッドを形成したことから隣接するボンディング
パッド間の距離が実質的に長くなり、その結果、ボンデ
ィングパッドに半導体素子等の能動部品や容量素子、抵
抗器等の受動部品の電極を半田等から成るロウ材を介し
て接続させる際、ロウ材の一部が隣接するボンディング
パッドに流れることはなく、所定のボンディングパッド
に半導体素子等の電極を正確に電気的接続させることが
可能となるとともに半導体素子等を常に、正常に作動さ
せることができる。According to the multilayer wiring board of the present invention, since a hole is provided in the uppermost organic resin insulating layer and a bonding pad is formed on the bottom of the hole, the distance between adjacent bonding pads is substantially reduced. As a result, when connecting the electrodes of active components such as semiconductor elements, capacitors, and passive components such as resistors to the bonding pad via a brazing material made of solder or the like, a part of the brazing material is adjacent to the bonding pad. The electrodes such as the semiconductor elements can be accurately and electrically connected to the predetermined bonding pads without flowing to the pads, and the semiconductor elements and the like can always be normally operated.
【００１４】更に本発明の多層配線基板によれば、最上
層の有機樹脂絶縁層に形成されている穴部の内壁の下端
側の少なくとも一部をボンディングパッド中に埋設させ
たことをからボンディングパッドと最上層の有機樹脂絶
縁層とは極めて強固に接合し、両者の接合部に有機樹脂
絶縁層と半導体素子や容量素子等との熱膨張係数の相違
に起因して発生する熱応力が繰り返し印加されたとして
もボンディングパッドが有機樹脂絶縁層より剥離するこ
とはなく、これによって半導体素子等の能動部品や容量
素子、抵抗器等の受動部品の薄膜配線導体層に対する接
続の信頼性を極めて高いものとなすことができる。Further, according to the multilayer wiring board of the present invention, at least a part of the lower end side of the inner wall of the hole formed in the uppermost organic resin insulating layer is buried in the bonding pad. And the uppermost organic resin insulating layer are bonded very firmly, and the thermal stress generated due to the difference in the thermal expansion coefficient between the organic resin insulating layer and the semiconductor element, capacitor element, etc. is repeatedly applied to the joint between them. The bonding pad does not peel off from the organic resin insulating layer even if it is done, which makes the connection reliability of the active components such as semiconductor devices and the passive components such as capacitors and resistors to the thin film wiring conductor layer extremely high. Can be made.
【００１５】[0015]
【発明の実施の形態】次に、本発明を添付図面に基づき
詳細に説明する。図１及び図２は、本発明の多層配線基
板の一実施例を示し、１は基板、２は有機樹脂絶縁層、
３は薄膜配線導体層である。Next, the present invention will be described in detail with reference to the accompanying drawings. 1 and 2 show an embodiment of the multilayer wiring board of the present invention, wherein 1 is a substrate, 2 is an organic resin insulating layer,
3 is a thin film wiring conductor layer.
【００１６】前記基板１はその上面に有機樹脂絶縁層２
と薄膜配線導体層３とからなる多層配線部４が配設され
ており、該多層配線部４を支持する支持部材として作用
する。The substrate 1 has an organic resin insulating layer 2 on its upper surface.
And a thin-film wiring conductor layer 3, and a multilayer wiring portion 4 is provided, and functions as a support member for supporting the multilayer wiring portion 4.
【００１７】前記基板１は酸化アルミニウム質焼結体や
ムライト質焼結体等の酸化物系セラミックス、或いは表
面に酸化物膜を有する窒化アルミニウム質焼結体や炭化
珪素質焼結体等の非酸化物系セラミックス、更にはガラ
ス繊維を織り込んだ布にエポキシ樹脂を含浸させたガラ
スエポキシ樹脂等の電気絶縁材料で形成されており、例
えば、酸化アルミニウム質焼結体で形成されている場合
には、酸化アルミニウム、酸化珪素、酸化マグネシウ
ム、酸化カルシウム等の原料原料に適当な有機溶剤、溶
媒を添加混合して泥漿状となすとともにこれを従来周知
のドクターブレード法やカレンダーロール法を採用する
ことによってセラミックグリーンシート（セラミック生
シート）を形成し、しかる後、前記セラミックグリーン
シートに適当な打ち抜き加工を施し、所定形状となすと
ともに高温（約１６００℃）で焼成することによって、
或いは酸化アルミニウム等の原料粉末に適当な有機溶
剤、溶媒を添加混合して原料粉末を調整するとともに該
原料粉末をプレス成型機によって所定形状に成形し、最
後に前記形成体を約１６００℃の温度で焼成することに
よって製作され、またガラスエポキシ樹脂からなる場合
には、例えば、ガラス繊維を織り込んだ布にエポキシ樹
脂の前駆体を含浸させるとともに該エポキシ樹脂前駆体
を所定の温度で熱硬化させることによって製作される。The substrate 1 is made of an oxide ceramic such as an aluminum oxide sintered body or a mullite sintered body, or a non-conductive material such as an aluminum nitride sintered body or a silicon carbide sintered body having an oxide film on its surface. Oxide ceramics, and further made of an electrically insulating material such as glass epoxy resin impregnated with epoxy resin in a cloth woven with glass fiber, for example, when formed of aluminum oxide sintered body By adding an appropriate organic solvent and a solvent to raw materials such as aluminum oxide, silicon oxide, magnesium oxide and calcium oxide and mixing them to form a slurry, and employing a conventionally known doctor blade method or calender roll method, A ceramic green sheet (ceramic green sheet) is formed, and then a suitable punch is formed on the ceramic green sheet. By baking at a high temperature (about 1600 ° C.) with can process the applied and forms a predetermined shape,
Alternatively, a raw material powder such as aluminum oxide is mixed with a suitable organic solvent and a solvent to prepare the raw material powder, and the raw material powder is formed into a predetermined shape by a press molding machine. Finally, the formed body is heated to a temperature of about 1600 ° C. In the case of being manufactured by baking with, and made of glass epoxy resin, for example, impregnating an epoxy resin precursor into a cloth woven of glass fiber and thermally curing the epoxy resin precursor at a predetermined temperature Produced by
【００１８】また前記基板１には上下両面に貫通する孔
径が、例えば、３００μｍ〜５００μｍの貫通孔５が形
成されており、該貫通孔５の内壁には両端が基板１の上
下両面に導出する導電層６が被着されている。The substrate 1 is formed with through holes 5 having a hole diameter of, for example, 300 μm to 500 μm, which penetrate the upper and lower surfaces of the substrate 1. A conductive layer 6 is applied.
【００１９】前記貫通孔５は後述する基板１の上面に形
成される多層配線部４の薄膜配線導体層３と外部電気回
路とを電気的に接続する、或いは基板１の上下両面に多
層配線部４を配設した場合には両面の多層配線部４の薄
膜配線導体層同士を電気的に接続する導電層６を形成す
るための形成孔として作用し、基板１にドリル孔あけ加
工法を施すことによって基板１の所定位置に所定形状に
形成される。The through hole 5 electrically connects the thin-film wiring conductor layer 3 of the multilayer wiring portion 4 formed on the upper surface of the substrate 1 and an external electric circuit to be described later, or the multilayer wiring portion is formed on both upper and lower surfaces of the substrate 1. When the substrate 4 is provided, it functions as a forming hole for forming the conductive layer 6 for electrically connecting the thin film wiring conductor layers of the multilayer wiring portion 4 on both surfaces, and the substrate 1 is subjected to a drilling method. Thus, a predetermined shape is formed at a predetermined position on the substrate 1.
【００２０】更に前記貫通孔５の内壁及び基板１の上下
両面に被着形成されている導電層６は例えば、銅やニッ
ケル等の金属材料からなり、従来周知のメッキ法及びエ
ッチング法を採用することによって貫通孔５の内壁に両
端を基板１の上下両面に導出させた状態で被着形成され
る。The conductive layer 6 formed on the inner wall of the through hole 5 and on the upper and lower surfaces of the substrate 1 is made of a metal material such as copper or nickel, for example, and employs well-known plating and etching methods. As a result, it is formed on the inner wall of the through hole 5 with both ends being led out to the upper and lower surfaces of the substrate 1.
【００２１】前記基板１にはまた上面に有機樹脂絶縁層
２と薄膜配線導体層３とが交互に多層に配設されて形成
される多層配線部４が被着されており、該多層配線部４
を構成する有機樹脂絶縁層２は上下に位置する薄膜配線
導体層３の電気的絶縁を図る作用をなし、また薄膜配線
導体層３は電気信号を伝達するための伝送路として作用
する。On the upper surface of the substrate 1, a multilayer wiring portion 4 formed by alternately arranging an organic resin insulating layer 2 and a thin film wiring conductor layer 3 in multiple layers is attached. 4
The organic resin insulating layer 2 has the function of electrically insulating the upper and lower thin film wiring conductor layers 3, and the thin film wiring conductor layer 3 functions as a transmission path for transmitting electric signals.
【００２２】前記多層配線部４の有機樹脂絶縁層２は、
エポキシ樹脂、ビスマレイミドトリアジン樹脂、ポリフ
ェニレンエーテル樹脂、フッ素樹脂等の有機樹脂から成
り、例えば、エポキシ樹脂からなる場合、ビスフェノー
ルＡ型エポキシ樹脂、ノボラック型エポキシ樹脂、グリ
シジルエステル型エポキシ樹脂等にアミン系硬化剤、イ
ミダゾール系硬化剤、酸無水物系硬化剤等の硬化剤を添
加混合してペースト状のエポキシ樹脂前駆体を得るとと
もに該エポキシ樹脂前駆体を基板１の上部にスピンコー
ト法により被着させ、しかる後、これを８０℃〜２００
℃の熱で０．５〜３時間熱処理し、熱硬化させることに
よって形成させる。The organic resin insulating layer 2 of the multilayer wiring section 4
It is made of an organic resin such as an epoxy resin, a bismaleimide triazine resin, a polyphenylene ether resin, and a fluororesin. For example, when the resin is made of an epoxy resin, it is amine-cured to a bisphenol A type epoxy resin, a novolak type epoxy resin, a glycidyl ester type epoxy resin, or the like. A curing agent such as a curing agent, an imidazole-based curing agent, an acid anhydride-based curing agent is added and mixed to obtain a paste-like epoxy resin precursor, and the epoxy resin precursor is adhered to the upper portion of the substrate 1 by spin coating. After that, this is brought to 80 ° C. to 200 ° C.
The film is formed by heat-treating with heat of 0.5 ° C. for 0.5 to 3 hours and heat-curing.
【００２３】更に前記多層配線部４の有機樹脂絶縁層２
はその各々の所定位置に最小径が有機樹脂絶縁層２の厚
みに対して約１．５倍程度のスルーホール８が形成され
ており、該スルーホール８は後述する有機樹脂絶縁層２
を介して上下に位置する薄膜配線導体層３の各々を電気
的に接続するスルーホール導体９を形成するための形成
孔として作用する。Further, the organic resin insulating layer 2 of the multilayer wiring section 4
Has a through hole 8 having a minimum diameter of about 1.5 times the thickness of the organic resin insulating layer 2 at each predetermined position.
, And acts as a forming hole for forming a through-hole conductor 9 for electrically connecting each of the thin-film wiring conductor layers 3 located above and below via.
【００２４】前記有機樹脂絶縁層２に設けるスルーホー
ル８は有機樹脂絶縁層２に従来周知のフォトリソグラフ
ィー技術を採用することによって所定の径に形成され
る。The through hole 8 provided in the organic resin insulating layer 2 is formed in the organic resin insulating layer 2 to a predetermined diameter by employing a conventionally known photolithography technique.
【００２５】また前記各有機樹脂絶縁層２の上面には所
定パターンの薄膜配線導体層３が、更に各有機樹脂絶縁
層２に設けたスルーホール８の内壁にはスルーホール導
体９が各々配設されており、スルーホール導体９によっ
て間に有機樹脂絶縁層２を挟んで上下に位置する各薄膜
配線導体層３の各々が電気的に接続されるようになって
いる。A thin-film wiring conductor layer 3 having a predetermined pattern is provided on the upper surface of each organic resin insulating layer 2, and a through-hole conductor 9 is provided on the inner wall of a through hole 8 provided in each organic resin insulating layer 2. Each of the thin-film wiring conductor layers 3 located above and below the organic resin insulating layer 2 with the through-hole conductor 9 therebetween is electrically connected.
【００２６】前記各有機樹脂絶縁層２の上面及びスルー
ホール８の内壁に配設される薄膜配線導体層３及びスル
ーホール導体層９は銅、ニッケル、金、アルミニウム等
の金属材料を無電解メッキ法や蒸着法、スパッタリング
法等の薄膜形成技術及びフォトリソグラフィー技術を採
用することによって形成され、例えば、銅で形成されて
いる場合には、有機樹脂絶縁層２の上面及びスルーホー
ル８の内表面に、硫酸銅０．０６モル／リットル、ホル
マリン０．３モル／リットル、水酸化ナトリウム０．３
５モル／リットル、エチレンジアミン四酢酸０．３５モ
ル／リットルから成る無電解銅メッキ浴を用いて厚さ１
μｍ乃至４０μｍの銅を被着させ、しかる後、前記銅層
をフォトリソグラフィー技術により所定パターンに加工
することによって各有機樹脂絶縁層２間、及びスルーホ
ール８内壁に配設される。この場合、薄膜配線導体層３
及びスルーホール導体９は薄膜形成技術により形成され
ることから配線の微細化が可能であり、これによって薄
膜配線導体層３を極めて高密度に形成することが可能と
なる。The thin-film wiring conductor layer 3 and the through-hole conductor layer 9 provided on the upper surface of each of the organic resin insulating layers 2 and the inner wall of the through-hole 8 are formed by electroless plating a metal material such as copper, nickel, gold, or aluminum. It is formed by adopting a thin film forming technique such as a sputtering method, a vapor deposition method, and a sputtering method, and a photolithography technique. For example, when it is formed of copper, the upper surface of the organic resin insulating layer 2 and the inner surface of the through hole 8 are formed. In addition, copper sulfate 0.06 mol / l, formalin 0.3 mol / l, sodium hydroxide 0.3
Using an electroless copper plating bath consisting of 5 mol / l and 0.35 mol / l of ethylenediaminetetraacetic acid, a thickness of 1
A copper layer having a thickness of 40 μm to 40 μm is deposited, and then the copper layer is processed into a predetermined pattern by photolithography to be disposed between the organic resin insulating layers 2 and on the inner wall of the through hole 8. In this case, the thin film wiring conductor layer 3
In addition, since the through-hole conductor 9 is formed by a thin-film forming technique, it is possible to miniaturize the wiring, whereby the thin-film wiring conductor layer 3 can be formed at an extremely high density.
【００２７】なお、前記有機樹脂絶縁層２と薄膜配線導
体層３とを交互に多層に配設して形成される多層配線部
４は各有機樹脂絶縁層２の上面を中心線平均粗さ（Ｒ
ａ）で０．０５μｍ≦Ｒａ≦５μｍの粗面としておくと
有機樹脂絶縁層２と薄膜配線導体層３との接合及び上下
に位置する有機樹脂絶縁層２同士の接合を強固となすこ
とができる。従って、前記多層配線部４の各有機樹脂絶
縁層２はその上面をエッチング加工法等によって粗し、
中心線平均粗さ（Ｒａ）で０．０５μｍ≦Ｒａ≦５μｍ
の粗面としておくことが好ましい。The multilayer wiring portion 4 formed by alternately arranging the organic resin insulating layers 2 and the thin film wiring conductor layers 3 in a multilayer structure has a center line average roughness (upper surface) of each organic resin insulating layer 2. R
By setting a rough surface of 0.05 μm ≦ Ra ≦ 5 μm in a), the bonding between the organic resin insulating layer 2 and the thin-film wiring conductor layer 3 and the bonding between the organic resin insulating layers 2 located above and below can be made strong. . Therefore, the upper surface of each organic resin insulating layer 2 of the multilayer wiring portion 4 is roughened by an etching method or the like,
Center line average roughness (Ra): 0.05 μm ≦ Ra ≦ 5 μm
It is preferable to make the surface rough.
【００２８】また前記有機樹脂絶縁層２はその表面の
２．５ｍｍの長さにおける凹凸の高さ（Ｐｃ）のカウン
ト値を、１μｍ≦Ｐｃ≦１０μｍが５００個以上、０．
１μｍ≦Ｐｃ≦１μｍが２５００個以上、０．０１μｍ
≦Ｐｃ≦０．１μｍが１２５００個以上としておくと有
機樹脂絶縁層２と薄膜配線導体層３との接合及び上下に
位置する有機樹脂絶縁層２同士の接合がより強固とな
る。従って、前記有機樹脂絶縁層２はその表面の２．５
ｍｍの長さにおける凹凸の高さ（Ｐｃ）のカウント値
を、１μｍ≦Ｐｃ≦１０μｍが５００個以上、０．１μ
ｍ≦Ｐｃ≦１μｍが２５００個以上、０．０１μｍ≦Ｐ
ｃ≦０．１μｍが１２５００個以上としておくことが好
ましい。The count value of the height (Pc) of the unevenness at a length of 2.5 mm on the surface of the organic resin insulating layer 2 is 500 or more for 1 μm ≦ Pc ≦ 10 μm.
2500 μm of 1 μm ≦ Pc ≦ 1 μm, 0.01 μm
If ≦ Pc ≦ 0.1 μm is set to 12,500 or more, the bonding between the organic resin insulating layer 2 and the thin-film wiring conductor layer 3 and the bonding between the organic resin insulating layers 2 located above and below become stronger. Therefore, the organic resin insulating layer 2 has a thickness of 2.5
The count value of the height (Pc) of the unevenness in the length of mm is 1 μm ≦ Pc ≦ 10 μm.
2500 or more m ≦ Pc ≦ 1 μm, 0.01 μm ≦ P
It is preferable that c ≦ 0.1 μm is set to 12,500 or more.
【００２９】前記有機樹脂絶縁層２上面の中心線平均粗
さ（Ｒａ）及び２．５ｍｍの長さにおける凹凸の高さ
（Ｐｃ）のカウント値は、有機樹脂絶縁層２の表面を原
子間力顕微鏡（Digital Instruments Inc.製のDimensio
n 3000-Nano Scope III ）で５０μｍ角の対角（７０μ
ｍ）に走査させてその表面状態を検査測定し、その測定
結果より各々の数値を出した。The count value of the center line average roughness (Ra) of the upper surface of the organic resin insulating layer 2 and the height of the unevenness (Pc) at a length of 2.5 mm are obtained by measuring the surface of the organic resin insulating layer 2 with an atomic force. Microscope (Dimensio manufactured by Digital Instruments Inc.
n 3000-Nano Scope III) 50μm diagonal (70μm)
m), the surface condition was inspected and measured, and each numerical value was obtained from the measurement result.
【００３０】また前記中心線平均粗さ（Ｒａ）が０．０
５μｍ≦Ｒａ≦５μｍ、２．５ｍｍの長さにおける凹凸
の高さ（Ｐｃ）のカウント値が、１μｍ≦Ｐｃ≦１０μ
ｍが５００個以上、０．１μｍ≦Ｐｃ≦１μｍが２５０
０個以上、０．０１μｍ≦Ｐｃ≦０．１μｍが１２５０
０個以上の有機樹脂絶縁層２は、該有機樹脂絶縁層２の
上面にＣＨＦ3 、ＣＦ4 、Ａｒ等のガスを吹きつけたり
アクティブイオンエッチング処理をすることによって表
面が所定の粗さに粗される。The center line average roughness (Ra) is 0.0
5 μm ≦ Ra ≦ 5 μm, the count value of the height of unevenness (Pc) at a length of 2.5 mm is 1 μm ≦ Pc ≦ 10 μm
m is 500 or more, and 0.1 μm ≦ Pc ≦ 1 μm is 250
0 or more, 0.01 μm ≦ Pc ≦ 0.1 μm is 1250
The surface of the zero or more organic resin insulating layers 2 is roughened to a predetermined roughness by spraying a gas such as CHF 3 , CF 4 , Ar or the like on the upper surface of the organic resin insulating layers 2 or performing active ion etching. You.
【００３１】更に前記有機樹脂絶縁層２はその各々の厚
みが１００μｍを超えると有機樹脂絶縁層２にフォトリ
ソグラフィー技術を採用することによってスルーホール
８を形成する際、エッチング加工時間が長くなってスル
ーホール８を所望する鮮明な形状に形成するのが困難と
なり、また５μｍ未満となると有機樹脂絶縁層２の上面
に上下に位置する有機樹脂絶縁層２の接合強度を上げる
ための粗面加工を施す際、有機樹脂絶縁層２に不要な穴
が形成され上下に位置する薄膜配線導体層３に不要な電
気的短絡を招来してしまう危険性がある。従って、前記
有機樹脂絶縁層２はその各々の厚みを５μｍ乃至１００
μｍの範囲としておくことが好ましい。Further, when the thickness of each of the organic resin insulating layers 2 exceeds 100 μm, when the through holes 8 are formed by employing photolithography technology in the organic resin insulating layers 2, the etching processing time becomes longer and the It is difficult to form the hole 8 into a desired clear shape, and if it is less than 5 μm, rough surface processing is performed on the upper surface of the organic resin insulating layer 2 to increase the bonding strength of the upper and lower organic resin insulating layers 2. In this case, there is a risk that unnecessary holes are formed in the organic resin insulating layer 2 and unnecessary electrical short circuits are caused in the thin film wiring conductor layers 3 located above and below. Therefore, the organic resin insulating layer 2 has a thickness of 5 μm to 100 μm.
It is preferable to keep the range of μm.
【００３２】また更に前記多層配線部４の各薄膜配線導
体層３はその厚みが１μｍ未満であると各薄膜配線導体
層３の電気抵抗値が大きなものとなって各薄膜配線導体
層３に所定の電気信号を伝達させることが困難となり、
また４０μｍを超えると薄膜配線導体層３を有機樹脂絶
縁層２に被着させる際に薄膜配線導体層３の内部に大き
な応力が内在し、該大きな内在応力によって薄膜配線導
体層３が有機樹脂絶縁層２より剥離し易いものとなる。
従って、前記多層配線部４の各薄膜配線導体層３の厚み
は１μｍ乃至４０μｍの範囲としておくことが好まし
い。Further, when the thickness of each thin-film wiring conductor layer 3 of the multilayer wiring portion 4 is less than 1 μm, the electric resistance of each thin-film wiring conductor layer 3 becomes large and a predetermined value is applied to each thin-film wiring conductor layer 3. It is difficult to transmit the electric signal of
When the thickness exceeds 40 μm, a large stress is present inside the thin film wiring conductor layer 3 when the thin film wiring conductor layer 3 is adhered to the organic resin insulating layer 2, and the large intrinsic stress causes the thin film wiring conductor layer 3 to cause an organic resin insulation. It is easier to peel off than the layer 2.
Therefore, it is preferable that the thickness of each thin-film wiring conductor layer 3 of the multilayer wiring portion 4 be in the range of 1 μm to 40 μm.
【００３３】前記有機樹脂絶縁層２と薄膜配線導体層３
とを交互に多層に積層して形成される多層配線部４は更
に、最上層の有機樹脂絶縁層２ａに穴部１０が形成され
ており、該穴部１０の底面には薄膜配線導体層３と電気
的に接続しているボンディングパッド７が形成されてい
る。The organic resin insulating layer 2 and the thin film wiring conductor layer 3
The multilayer wiring portion 4 formed by alternately laminating the layers is further provided with a hole 10 in the uppermost organic resin insulating layer 2a. A bonding pad 7 is formed which is electrically connected to the bonding pad 7.
【００３４】前記最上層の有機樹脂絶縁層２ａに形成さ
れている穴部１０は薄膜配線導体層３に電気的接続を持
つボンディングパッド７を形成するための形成穴として
作用し、最上層の有機樹脂絶縁層２ａに従来周知のフォ
トリソグラフィー技術を採用することによって所定位置
に所定開口径に形成される。The hole 10 formed in the uppermost organic resin insulating layer 2a functions as a forming hole for forming a bonding pad 7 having an electrical connection to the thin film wiring conductor layer 3, and the uppermost organic resin insulating layer 2a serves as a forming hole. The resin insulating layer 2a is formed at a predetermined position with a predetermined opening diameter by employing a conventionally known photolithography technique.
【００３５】また前記最上層の有機樹脂絶縁層２ａに設
けた穴部１０の底面に形成されているボンディングパッ
ド７は、半導体素子や容量素子等の電子部品Ａの電極を
薄膜配線導体層３に電気的に接続させる作用をなし、ボ
ンディングパッド７には電子部品Ａの各電極が半田等の
ロウ材を介してロウ付け接続される。この場合、ボンデ
ィングパッド７はその隣接間隔が２００μｍ程度の狭い
ものであったとしても穴部１０の底面に形成されている
ことから隣接するボンディングパッド７間の距離が実質
的に長くなり、その結果、ボンディングパッド７と半導
体素子や容量素子等、電子部品Ａの電極とを接続させる
ロウ材の一部が隣接するボンディングパッド７に流れる
ことはなく、所定のボンディングパッド７に電子部品Ａ
の電極を正確に電気的接続させて半導体素子等の電子部
品Ａを常に、正常に作動させることが可能となる。The bonding pad 7 formed on the bottom surface of the hole 10 provided in the uppermost organic resin insulating layer 2a connects the electrode of the electronic component A such as a semiconductor element or a capacitor to the thin film wiring conductor layer 3. Each electrode of the electronic component A is connected to the bonding pad 7 by brazing via a brazing material such as solder. In this case, the bonding pads 7 are formed on the bottom surface of the hole 10 even if the distance between adjacent bonding pads is as narrow as about 200 μm, so that the distance between the adjacent bonding pads 7 becomes substantially longer. A part of the brazing material for connecting the bonding pad 7 to an electrode of the electronic component A, such as a semiconductor element or a capacitor, does not flow to the adjacent bonding pad 7, and the electronic component A
The electronic components A such as semiconductor elements can always be normally operated by electrically connecting these electrodes accurately.
【００３６】前記ボンディングパッド７は、例えば、薄
膜配線導体層３と同じ金属材料、具体的には銅、ニッケ
ル、金、アルミニウム等の金属材料から成り、前述の薄
膜配線導体層３の形成方法と同一の方法によって穴部１
０の底面に形成される。The bonding pad 7 is made of, for example, the same metal material as the thin-film wiring conductor layer 3, specifically, a metal material such as copper, nickel, gold, aluminum or the like. Hole 1 by the same method
0 is formed on the bottom surface.
【００３７】また前記ボンディングパッド７の内部には
図２に示すように最上層の有機樹脂絶縁層２ａに設けた
穴部１０の内壁の下端側が埋設されている。As shown in FIG. 2, the lower end side of the inner wall of the hole 10 provided in the uppermost organic resin insulating layer 2a is buried inside the bonding pad 7.
【００３８】前記最上層の有機樹脂絶縁層２ａに設けた
穴部１０の内壁の下端側をボンディングパッド７の内部
に埋設させるとボンディングパッド７と最上層の有機樹
脂絶縁層２ａとが極めて強固に接合し、これによってボ
ンディングパッド７と最上層の有機樹脂絶縁層２ａとの
接合部に該有機樹脂絶縁層２ａと半導体素子等の電子部
品Ａとの熱膨張係数の相違に起因して発生する熱応力が
繰り返し印加されてもボンディングパッド７は有機樹脂
絶縁層２ａより剥離することはなく、電子部品Ａの薄膜
配線導体層に対する接続の信頼性を極めて高いものとな
すことが可能となる。When the lower end of the inner wall of the hole 10 provided in the uppermost organic resin insulating layer 2a is buried inside the bonding pad 7, the bonding pad 7 and the uppermost organic resin insulating layer 2a become extremely strong. The heat generated due to the difference in the coefficient of thermal expansion between the organic resin insulating layer 2a and the electronic component A such as a semiconductor element is formed at the joint between the bonding pad 7 and the uppermost organic resin insulating layer 2a. Even if stress is repeatedly applied, the bonding pad 7 does not peel off from the organic resin insulating layer 2a, and the reliability of connection of the electronic component A to the thin film wiring conductor layer can be made extremely high.
【００３９】なお、前記ボンディングパッド７の内部に
最上層の有機樹脂絶縁層２ａに設けた穴部１０の内壁の
下端側を埋設させる方法としては、例えば、穴部１０の
内壁をすり鉢状としておき、穴部１０の底面に厚みが若
干厚いボンディングパッド７を形成しておくことによっ
て行われる。As a method of embedding the lower end of the inner wall of the hole 10 provided in the uppermost organic resin insulating layer 2a inside the bonding pad 7, for example, the inner wall of the hole 10 may be formed in a mortar shape. This is performed by forming a slightly thicker bonding pad 7 on the bottom surface of the hole 10.
【００４０】また前記穴部１０の内壁の下端側はその全
周をボンディングパッド７の内部に埋設させる必要はな
く、一部をボンディングパッド７の内部に埋設させてお
けばよい。It is not necessary to embed the entire periphery of the lower end side of the inner wall of the hole 10 inside the bonding pad 7, but it is sufficient to embed a part thereof inside the bonding pad 7.
【００４１】かくして、本発明の多層配線基板によれ
ば、最上層の有機樹脂絶縁層２ａに設けたボンディング
パッド７に半導体素子や容量素子等の電子部品Ａの電極
を半田等からなるロウ材を介して接続させ、電子部品Ａ
の電極をボンディングパッド７を介して薄膜配線導体層
３に電気的に接続させることによって半導体装置や混成
集積回路装置となり、薄膜配線導体層３の一部を外部電
気回路に接続させれば前記電子部品Ａが外部電気回路に
電気的に接続されることとなる。Thus, according to the multilayer wiring board of the present invention, the electrodes of the electronic component A such as a semiconductor element and a capacitor are soldered to the bonding pads 7 provided on the uppermost organic resin insulating layer 2a. Electronic component A
Are electrically connected to the thin-film wiring conductor layer 3 via the bonding pads 7 to form a semiconductor device or a hybrid integrated circuit device. If a part of the thin-film wiring conductor layer 3 is connected to an external electric circuit, The component A is electrically connected to the external electric circuit.
【００４２】なお、本発明は上述の実施例に限定される
ものではなく、本発明の要旨を逸脱しない範囲であれば
種々の変更は可能であり、例えば、上述の実施例におい
ては基板１の上面のみに有機樹脂絶縁層２と薄膜配線導
体層３とを交互に積層して形成される多層配線部４を被
着させたが、多層配線部４を基板１の下面側のみに設け
ても、上下の両主面に設けてもよい。It should be noted that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention. Although the multilayer wiring portion 4 formed by alternately laminating the organic resin insulating layers 2 and the thin film wiring conductor layers 3 is applied only on the upper surface, the multilayer wiring portion 4 may be provided only on the lower surface side of the substrate 1. , On both upper and lower main surfaces.
【００４３】[0043]
【発明の効果】本発明の多層配線基板によれば、絶縁基
板上に薄膜形成技術によって配線を形成したことから配
線の微細化が可能となり、配線を極めて高密度に形成す
ることが可能になる。According to the multilayer wiring board of the present invention, since the wiring is formed on the insulating substrate by the thin film forming technique, the wiring can be miniaturized and the wiring can be formed at a very high density. .
【００４４】また本発明の多層配線基板によれば、最上
層の有機樹脂絶縁層に穴部を設け、該穴部底面にボンデ
ィングパッドを形成したことから隣接するボンディング
パッド間の距離が実質的に長くなり、その結果、ボンデ
ィングパッドに半導体素子等の能動部品や容量素子、抵
抗器等の受動部品の電極を半田等から成るロウ材を介し
て接続させる際、ロウ材の一部が隣接するボンディング
パッドに流れることはなく、所定のボンディングパッド
に半導体素子等の電極を正確に電気的接続させることが
可能となるとともに半導体素子等を常に、正常に作動さ
せることができる。According to the multilayer wiring board of the present invention, since a hole is provided in the uppermost organic resin insulating layer and a bonding pad is formed on the bottom of the hole, the distance between adjacent bonding pads is substantially reduced. As a result, when connecting the electrodes of active components such as semiconductor elements, capacitors, and passive components such as resistors to the bonding pad via a brazing material made of solder or the like, a part of the brazing material is adjacent to the bonding pad. The electrodes such as the semiconductor elements can be accurately and electrically connected to the predetermined bonding pads without flowing to the pads, and the semiconductor elements and the like can always be normally operated.
【００４５】更に本発明の多層配線基板によれば、最上
層の有機樹脂絶縁層に形成されている穴部の内壁の下端
側の少なくとも一部をボンディングパッド中に埋設させ
たことをからボンディングパッドと最上層の有機樹脂絶
縁層とは極めて強固に接合し、両者の接合部に有機樹脂
絶縁層と半導体素子や容量素子等との熱膨張係数の相違
に起因して発生する熱応力が繰り返し印加されたとして
もボンディングパッドが有機樹脂絶縁層より剥離するこ
とはなく、これによって半導体素子等の能動部品や容量
素子、抵抗器等の受動部品の薄膜配線導体層に対する接
続の信頼性を極めて高いものとなすことができる。Further, according to the multilayer wiring board of the present invention, at least a part of the lower end side of the inner wall of the hole formed in the uppermost organic resin insulating layer is buried in the bonding pad. And the uppermost organic resin insulating layer are bonded very firmly, and the thermal stress generated due to the difference in the thermal expansion coefficient between the organic resin insulating layer and the semiconductor element, capacitor element, etc. is repeatedly applied to the joint between them. The bonding pad does not peel off from the organic resin insulating layer even if it is done, which makes the connection reliability of the active components such as semiconductor devices and the passive components such as capacitors and resistors to the thin film wiring conductor layer extremely high. Can be made.
【図１】本発明の多層配線基板の一実施例を示す断面図
である。FIG. 1 is a sectional view showing one embodiment of a multilayer wiring board of the present invention.
【図２】図１に示す多層配線基板の要部拡大断面図であ
る。FIG. 2 is an enlarged sectional view of a main part of the multilayer wiring board shown in FIG.
１・・・基板 ２・・・有機樹脂絶縁層 ２ａ・・最上層の有機樹脂絶縁層 ３・・・薄膜配線導体層 ４・・・多層配線部 ７・・・ボンディングパッド ８・・・スルーホール ９・・・スルーホール導体 １０・・最上層の有機樹脂絶縁層に設けた穴部 Ａ・・・電子部品 DESCRIPTION OF SYMBOLS 1 ... Substrate 2 ... Organic resin insulation layer 2a ... Top organic resin insulation layer 3 ... Thin film wiring conductor layer 4 ... Multilayer wiring part 7 ... Bonding pad 8 ... Through hole 9: Through-hole conductor 10: Hole provided in uppermost organic resin insulating layer A: Electronic component
Claims (1)
層とを交互に積層するとともに上下に位置する薄膜配線
導体層を有機樹脂絶縁層に設けたスルーホールの内壁に
形成されてるスルーホール導体を介して電気的に接続し
てなり、最上層の有機樹脂絶縁層に設けた穴部底面に、
前記薄膜配線導体層と電気的に接続し、外部の電子部品
が接続されるボンディングパッドを設けて成る多層配線
基板であって、前記穴部内壁の下端側の少なくとも一部
をボンディングパッド中に埋設させたことを特徴とする
多層配線基板。An organic resin insulating layer and a thin-film wiring conductor layer are alternately laminated on a substrate, and a thin-film wiring conductor layer positioned above and below is formed on an inner wall of a through hole provided in the organic resin insulating layer. It is electrically connected via a hole conductor, and on the bottom of the hole provided in the uppermost organic resin insulating layer,
A multilayer wiring board comprising a bonding pad electrically connected to the thin-film wiring conductor layer and connected to an external electronic component, wherein at least a part of a lower end side of the inner wall of the hole is embedded in the bonding pad. A multilayer wiring board characterized by having been made.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10035105A JPH11233679A (en) | 1998-02-17 | 1998-02-17 | Multilayer wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10035105A JPH11233679A (en) | 1998-02-17 | 1998-02-17 | Multilayer wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH11233679A true JPH11233679A (en) | 1999-08-27 |
Family
ID=12432663
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10035105A Pending JPH11233679A (en) | 1998-02-17 | 1998-02-17 | Multilayer wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH11233679A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100882608B1 (en) | 2007-09-28 | 2009-02-12 | 삼성전기주식회사 | Fabrication method of cavity capacitor and printed circuit board with embedded cavity capacitor |
| JP2009117839A (en) * | 2007-11-06 | 2009-05-28 | Ibiden Co Ltd | Circuit board and manufacturing method thereof |
-
1998
- 1998-02-17 JP JP10035105A patent/JPH11233679A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100882608B1 (en) | 2007-09-28 | 2009-02-12 | 삼성전기주식회사 | Fabrication method of cavity capacitor and printed circuit board with embedded cavity capacitor |
| JP2009117839A (en) * | 2007-11-06 | 2009-05-28 | Ibiden Co Ltd | Circuit board and manufacturing method thereof |
| US8309856B2 (en) | 2007-11-06 | 2012-11-13 | Ibiden Co., Ltd. | Circuit board and manufacturing method thereof |
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