JPH08125052A - Package for containing semiconductor chip - Google Patents
Package for containing semiconductor chipInfo
- Publication number
- JPH08125052A JPH08125052A JP6263996A JP26399694A JPH08125052A JP H08125052 A JPH08125052 A JP H08125052A JP 6263996 A JP6263996 A JP 6263996A JP 26399694 A JP26399694 A JP 26399694A JP H08125052 A JPH08125052 A JP H08125052A
- Authority
- JP
- Japan
- Prior art keywords
- frame
- metallized
- metal layer
- insulating substrate
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Ceramic Products (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体素子を収容する
ための半導体素子収納用パッケージに関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor element housing package for housing a semiconductor element.
【０００２】[0002]
【従来の技術】コンピュータ等の情報処理装置には半導
体素子収納用パッケージの内部に半導体素子を収容した
半導体装置が多数実装されている。2. Description of the Related Art In an information processing apparatus such as a computer, a large number of semiconductor devices each having a semiconductor element housed in a semiconductor element housing package are mounted.
【０００３】従来、半導体素子を収容するための半導体
素子収納用パッケージは、通常、酸化アルミニウム質焼
結体等の電気絶縁材料から成り、その上面の略中央部に
半導体素子を収容するための凹部及び該凹部周辺から周
縁部にかけて導出されたタングステン、モリブデン、マ
ンガン等の高融点金属粉末から成る複数個のメタライズ
配線層を有する絶縁基体と、半導体素子を外部電気回路
に電気的に接続するために前記メタライズ配線層に銀ロ
ウ等のロウ材を介してロウ付けされた複数個の外部リー
ド端子と、鉄ーニッケルーコバルト合金や鉄ーニッケル
合金等の金属から成る蓋体とから構成されており、絶縁
基体の凹部底面に半導体素子をガラス、樹脂、ロウ材等
の接着剤を介して接着固定するとともに該半導体素子の
各電極をボンディングワイヤを介してメタライズ配線層
に接続し、しかる後、絶縁基体上面に金属製蓋体を溶接
し、絶縁基体と金属製蓋体とから成る容器内部に半導体
素子を気密に封止することによって最終製品としての半
導体装置となる。Conventionally, a semiconductor element accommodating package for accommodating a semiconductor element is usually made of an electrically insulating material such as an aluminum oxide sintered body, and a recess for accommodating the semiconductor element is formed in the substantially central portion of the upper surface thereof. And an insulating base having a plurality of metallized wiring layers made of high-melting-point metal powder such as tungsten, molybdenum, and manganese, which are led out from the periphery of the recess to the periphery, and for electrically connecting the semiconductor element to an external electric circuit. A plurality of external lead terminals brazed to the metallized wiring layer via a brazing material such as silver brazing, and a lid made of metal such as iron-nickel-cobalt alloy or iron-nickel alloy, The semiconductor element is bonded and fixed to the bottom surface of the concave portion of the insulating substrate through an adhesive such as glass, resin, or brazing material, and each electrode of the semiconductor element is bonded. By connecting it to the metallized wiring layer via a wire, then welding a metal lid to the upper surface of the insulating base, and hermetically sealing the semiconductor element inside the container consisting of the insulating base and the metal lid. It becomes a semiconductor device as a product.
【０００４】尚、前記従来の半導体素子収納用パッケー
ジは通常、絶縁基体の上面に鉄ーニッケルーコバルト合
金や鉄ーニッケル合金等の金属材料から成る金属枠体を
予めロウ付けしておくとともに該金属枠体に金属製蓋体
をシームウエルド法等により溶接させることによって金
属製蓋体は絶縁基体の上面に取着され、これによって絶
縁基体と金属製蓋体とから成る容器が気密に封止され
る。In the conventional package for accommodating semiconductor elements, usually, a metal frame made of a metal material such as iron-nickel-cobalt alloy or iron-nickel alloy is previously brazed on the upper surface of the insulating base and the metal is used. The metallic lid is attached to the upper surface of the insulating base by welding the metallic lid to the frame by the seam weld method or the like, thereby hermetically sealing the container composed of the insulating base and the metallic lid. It
【０００５】また前記絶縁基体への金属枠体のロウ付け
はまず絶縁基体の上面で、半導体素子を収容する凹部周
囲にタングステン、モリブデン、マンガン等の高融点金
属粉末から成る枠状のメタライズ金属層を従来周知のス
クリーン印刷法等の厚膜手法を採用することによって被
着形成し、次に前記枠状メタライズ金属層上に銀ロウ等
のロウ材と金属枠体とを順次載置させ、最後に前記ロウ
材に約８００℃の温度を印加し、ロウ材を加熱溶融させ
ることによって行われる。The metal frame is brazed to the insulating substrate by first forming a frame-shaped metallized metal layer made of a refractory metal powder such as tungsten, molybdenum or manganese on the upper surface of the insulating substrate around the recess for accommodating the semiconductor element. Is formed by applying a thick film method such as a conventionally known screen printing method, and then a brazing material such as silver brazing material and a metal frame body are sequentially placed on the frame-shaped metallized metal layer. The temperature of about 800 ° C. is applied to the brazing material, and the brazing material is heated and melted.
【０００６】[0006]
【発明が解決しようとする課題】しかしながら、近時、
コンピュータ等の情報処理装置は急激に小型化が進み、
該情報処理装置に実装される半導体装置も極めて小型の
ものが要求され、同時に半導体装置を形成する半導体素
子収納用パッケージも極めて小型のものが要求されるよ
うになってきた。However, in recent years,
Information processing devices such as computers are rapidly becoming smaller,
A semiconductor device mounted on the information processing device is also required to be extremely small, and at the same time, a semiconductor element housing package forming the semiconductor device is also required to be extremely small.
【０００７】そこで半導体素子収納用パッケージを小型
とすると絶縁基体の面積が狭くなるとともに該絶縁基体
の上面に被着される枠状のメタライズ金属層の幅が必然
的に狭くなり、その結果、メタライズ金属層の絶縁基体
に対する被着強度が弱いものとなってきた。そのためこ
の枠状メタライズ金属層に金属枠体を銀ロウ等のロウ材
を介してロウ付けするとロウ材の凝固時に発生する引っ
張り応力によってメタライズ金属層が絶縁基体より剥離
し、絶縁基体と金属製蓋体とから成る容器の内部を気密
封止することができず、内部に収容する半導体素子を長
期間にわたり正常、且つ安定に作動させることが不可と
なる欠点を有していた。Therefore, if the package for accommodating semiconductor elements is made small, the area of the insulating base becomes narrower and the width of the frame-shaped metallized metal layer deposited on the upper surface of the insulating base becomes inevitably narrower, resulting in metallization. The adhesion strength of the metal layer to the insulating substrate has become weak. Therefore, when a metal frame is brazed to this frame-shaped metallized metal layer via a brazing material such as silver brazing, the metallized metal layer is separated from the insulating substrate due to the tensile stress generated when the brazing material is solidified, and the insulating substrate and the metal lid are The inside of the container composed of the body cannot be hermetically sealed, and the semiconductor element housed inside has a drawback that it cannot operate normally and stably for a long period of time.
【０００８】[0008]
【発明の目的】本発明は上記欠点に鑑み案出されたもの
で、その目的は枠状メタライズ金属層を絶縁基体に強固
に被着させ、絶縁基体と金属製蓋体とから成る容器の気
密封止を完全として内部に収容する半導体素子を長期間
にわたり正常、かつ安定に作動させることができる半導
体素子収納用パッケージを提供することにある。SUMMARY OF THE INVENTION The present invention has been devised in view of the above-mentioned drawbacks, and an object of the present invention is to firmly adhere a frame-shaped metallized metal layer to an insulating substrate and to use a container made of the insulating substrate and a metallic lid. It is an object of the present invention to provide a semiconductor element housing package that can operate normally and stably for a long period of time a semiconductor element that is completely sealed and housed therein.
【０００９】[0009]
【課題を解決するための手段】本発明は、上面に半導体
素子を収容するための凹部と、該凹部を囲繞する枠状の
メタライズ金属層を有する絶縁基体と、前記枠状のメタ
ライズ金属層にロウ付けされる金属枠体と、前記金属枠
体に取着される金属製蓋体とから成る半導体素子収納用
パッケージであって、前記枠状のメタライズ金属層を6
0.0乃至80.0重量％のタングステンと20.0乃至40.0重量
％のモリブデンと0.2 乃至2.0 重量％の酸化マンガンと
で形成したことを特徴とするものである。According to the present invention, a recess for accommodating a semiconductor element on an upper surface thereof, an insulating substrate having a frame-shaped metallized metal layer surrounding the recess, and the frame-shaped metallized metal layer are provided. A semiconductor element housing package comprising a metal frame body to be brazed and a metal lid body attached to the metal frame body, wherein the frame-shaped metallized metal layer is
It is characterized in that it is formed from 0.0 to 80.0 wt% tungsten, 20.0 to 40.0 wt% molybdenum, and 0.2 to 2.0 wt% manganese oxide.
【００１０】[0010]
【作用】本発明の半導体素子収納用パッケージによれ
ば、枠状のメタライズ金属層を60.0乃至80.0重量％のタ
ングステンと20.0乃至40.0重量％のモリブデンと0.2 乃
至2.0 重量％の酸化マンガンとで形成することからメタ
ライズ金属層を絶縁基体に極めて強固に被着させること
ができ、その結果、枠状のメタライズ金属層に銀ロウ等
のロウ材を介して金属枠体をロウ付けした場合、ロウ材
の凝固時の引っ張り応力によって枠状メタライズ金属層
が絶縁基体より剥離することはなく、絶縁基体と金属製
蓋体とから成る容器の気密封止を完全として内部に収容
する半導体素子を長期間にわたり正常に、且つ安定に作
動させることが可能となる。According to the semiconductor device housing package of the present invention, the frame-shaped metallized metal layer is formed of 60.0 to 80.0 wt% tungsten, 20.0 to 40.0 wt% molybdenum, and 0.2 to 2.0 wt% manganese oxide. Therefore, the metallized metal layer can be adhered to the insulating substrate very strongly. As a result, when the metal frame is brazed to the frame-shaped metallized metal layer via a brazing material such as silver brazing, the brazing material The frame-shaped metallized metal layer does not peel off from the insulating substrate due to the tensile stress during solidification, and the semiconductor element that completely accommodates the container consisting of the insulating substrate and the metal lid is normally housed for a long period of time. In addition, it is possible to operate stably.
【００１１】[0011]
【実施例】次に本発明を添付図面に基づき詳細に説明す
る。図１は、本発明の半導体素子収納用パッケージの一
実施例を示す断面図であり、図中、1 は絶縁基体、2 は
金属製蓋体である。この絶縁基体1 と金属製蓋体2とで
半導体素子3 を収容するための容器が構成される。The present invention will now be described in detail with reference to the accompanying drawings. FIG. 1 is a cross-sectional view showing an embodiment of a package for housing a semiconductor device of the present invention, in which 1 is an insulating base and 2 is a metallic lid. The insulating base body 1 and the metallic lid body 2 constitute a container for housing the semiconductor element 3.
【００１２】前記絶縁基体1 は酸化アルミニウム質焼結
体、ムライト質焼結体、窒化アルミニウム質焼結体、炭
化珪素質焼結体、ガラスセラミックス焼結体等から成
り、その上面の略中央部に半導体素子3 を収容するため
の空所を形成する凹部1aが設けてあり、該凹部1a底面に
は半導体素子3 がロウ材、ガラス、樹脂等の接着剤を介
して接着固定される。The insulating substrate 1 is composed of an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, a silicon carbide sintered body, a glass ceramic sintered body, etc. A concave portion 1a is formed in the inner surface of the concave portion 1a for accommodating the semiconductor element 3, and the semiconductor element 3 is bonded and fixed to the bottom surface of the concave portion 1a via an adhesive such as a brazing material, glass, or resin.
【００１３】前記絶縁基体1 は例えば、酸化アルミニウ
ム質焼結体から成る場合、アルミナ（Al2 O 3 ) 、シリ
カ(SiO2 ) 、カルシア(CaO) 、マグネシア(MgO) 等のセ
ラミック原料粉末に適当な有機溶剤、溶媒を添加混合し
て泥漿状となすとともにこれを従来周知のドクターブレ
ード法やカレンダーロール法等によりシート状に成形し
てセラミックグリーンシート( セラミック生シート) を
得、しかる後、前記セラミックグリーンシートに適当な
打ち抜き加工を施すとともに複数枚積層し、高温( 約16
00℃) で焼成することによって製作される。When the insulating substrate 1 is made of, for example, an aluminum oxide sintered body, it is suitable for a ceramic raw material powder such as alumina (Al 2 O 3 ), silica (SiO 2 ), calcia (CaO) and magnesia (MgO). A simple organic solvent, a solvent is added and mixed to form a slurry, and this is molded into a sheet by a conventionally known doctor blade method, calendar roll method, etc. to obtain a ceramic green sheet (ceramic green sheet). Appropriate punching is performed on the ceramic green sheet and multiple sheets are laminated, and high temperature (about 16
It is manufactured by firing at 00 ℃.
【００１４】また前記絶縁基体1 には凹部1a周辺から外
周縁にかけて複数個のメタライズ配線層4 が被着形成さ
れており、該メタライズ配線層4 の凹部1a周辺部には半
導体素子3 の電極がボンディングワイヤ5 を介して電気
的に接続され、また絶縁基体1 の外周縁に導出する部位
には外部リード端子6 がロウ材を介してロウ付けされ
る。A plurality of metallized wiring layers 4 are formed on the insulating substrate 1 from the periphery of the recess 1a to the outer peripheral edge thereof, and the electrodes of the semiconductor element 3 are formed on the periphery of the recess 1a of the metallized wiring layer 4. An external lead terminal 6 is brazed via a brazing material to a portion that is electrically connected via a bonding wire 5 and is led to the outer peripheral edge of the insulating base 1.
【００１５】前記絶縁基体1 に設けたメタライズ配線層
4 はタングステン、モリブデン、マンガン等の高融点金
属粉末から成り、該メタライズ配線層4 は外部電気回路
に接続される外部リード端子6 に半導体素子3 の各電極
を電気的に導通させる作用を為す。Metallized wiring layer provided on the insulating substrate 1
4 is made of a refractory metal powder such as tungsten, molybdenum, or manganese, and the metallized wiring layer 4 electrically connects each electrode of the semiconductor element 3 to an external lead terminal 6 connected to an external electric circuit.
【００１６】前記メタライズ配線層4 は例えば、タング
ステン等の高融点金属粉末に有機溶剤、溶媒を添加混合
して得た金属ペーストを絶縁基体1 となるセラミックグ
リーンシートに予め従来周知のスクリーン印刷法により
所定パターンに印刷塗布しておくことによって絶縁基体
1 の所定位置に被着形成される。For the metallized wiring layer 4, for example, a metal paste obtained by adding and mixing an organic solvent and a solvent to a refractory metal powder such as tungsten is mixed on a ceramic green sheet to be the insulating substrate 1 in advance by a screen printing method known in the related art. Insulating substrate by printing and applying in a predetermined pattern
1 is formed in a predetermined position.
【００１７】尚、前記メタライズ配線層4 はその露出す
る外表面にニッケル、金等の耐蝕性に優れ、且つロウ材
と濡れ性の良い金属をメッキ法により1.0 乃至20.0μm
の厚みに層着させておくとメタライズ配線層4 の酸化腐
食を有効に防止することができるとともにメタライズ配
線層4 とボンディングワイヤ5 及び外部リード端子6と
のロウ付け接合を強固なものとなすことができる。従っ
て、前記メタライズ配線層4 の表面にはニッケル、金等
の耐蝕性に優れ、且つロウ材と濡れ性が良い金属をメッ
キ法により1.0 乃至20.0μm の厚みに層着させておくこ
とが好ましい。The metallized wiring layer 4 is coated with a metal such as nickel or gold, which has excellent corrosion resistance and has a good wettability with the brazing material, on the exposed outer surface of the metallized wiring layer 4 by 1.0 to 20.0 μm.
The thickness of the metallized wiring layer 4 can effectively prevent oxidative corrosion of the metallized wiring layer 4, and the brazed joint between the metallized wiring layer 4 and the bonding wires 5 and the external lead terminals 6 can be strengthened. You can Therefore, it is preferable to deposit a metal such as nickel or gold, which has excellent corrosion resistance and wettability with the brazing material, to a thickness of 1.0 to 20.0 μm on the surface of the metallized wiring layer 4 by a plating method.
【００１８】また前記絶縁基体1 に被着したメタライズ
配線層4 にロウ付けされる外部リード端子6 は鉄ーニッ
ケルーコバルト合金や鉄ーニッケル合金等の金属材料か
ら成り、半導体素子3 の各電極を外部電気回路に電気的
に接続する作用を為す。The external lead terminals 6 brazed to the metallized wiring layer 4 adhered to the insulating substrate 1 are made of a metal material such as iron-nickel-cobalt alloy or iron-nickel alloy, and each electrode of the semiconductor element 3 is It acts to electrically connect to an external electric circuit.
【００１９】前記外部リード端子6 は鉄ーニッケルーコ
バルト合金等のインゴット( 塊) を圧延加工法や打ち抜
き加工法等、従来周知の金属加工法を採用し、所定の板
状に形成することによって製作される。The external lead terminal 6 is formed into a predetermined plate shape by adopting a well-known metal processing method such as a rolling processing method or a punching processing method of an ingot (lump) of iron-nickel-cobalt alloy or the like. Produced.
【００２０】また一方、前記絶縁基体1 の上面には半導
体素子3 を収容する凹部1aを囲繞するようにしてメタラ
イズ金属層7 が被着形成されており、該メタライズ金属
層7には金属枠体8 がロウ材9 を介してロウ付けされて
いる。On the other hand, a metallized metal layer 7 is formed on the upper surface of the insulating substrate 1 so as to surround the recess 1a for housing the semiconductor element 3, and the metallized metal layer 7 is covered with a metal frame. 8 is brazed through brazing material 9.
【００２１】前記枠状のメタライズ金属層7 は金属枠体
8 を絶縁基体1 にロウ付けする際の下地金属層として作
用し、60.0乃至80.0重量％のタングステンと20.0乃至4
0.0重量％のモリブデンと0.2 乃至2.0 重量％の酸化マ
ンガンとで形成されているメタライズ金属層7 はタング
ステン及びモリブデンを所定の割合とすることにより絶
縁基体1 と成るセラミックグリーンシートを焼成して絶
縁基体1 となす際、メタライズ金属層7 と絶縁基体1 と
の焼成収縮量及び熱膨張係数の差に起因して両者の被着
界面に発生する応力を小さいものとなすとともに酸化マ
ンガンを添加することにより絶縁基体1 中に含有される
ガラス成分をメタライズ金属層７中に有効に浸透吸収さ
せ該ガラスのアンカー効果によりその被着強度が極めて
強固なものとなっており、枠状のメタライズ金属層7 に
銀ロウ等のロウ材9 を介して金属枠体8 をロウ付けし、
ロウ材9 の凝固時の引っ張り応力が枠状メタライズ金属
層7に作用したとしても枠状メタライズ金属層7 が絶縁
基体1 より剥離することはなく、その結果、絶縁基体1
と金属製蓋体2 とから成る容器の気密封止を完全として
内部に収容する半導体素子3 を長期間にわたり正常に、
且つ安定に作動させることが可能となる。The frame-shaped metallized metal layer 7 is a metal frame body.
8 acts as a base metal layer when brazing 8 to the insulating substrate 1, and contains 60.0 to 80.0% by weight of tungsten and 20.0 to 4%.
The metallized metal layer 7 made of 0.0% by weight of molybdenum and 0.2 to 2.0% by weight of manganese oxide is an insulating substrate by firing tungsten and molybdenum in a predetermined ratio to form an insulating substrate 1. When 1 is set, the stress generated at the adhered interface between the metallized metal layer 7 and the insulating substrate 1 due to the difference in the firing shrinkage amount and the thermal expansion coefficient between them is made small and by adding manganese oxide. The glass component contained in the insulating substrate 1 is effectively permeated and absorbed in the metallized metal layer 7, and the adhesion strength of the glass is extremely strong due to the anchor effect of the glass. Braze the metal frame body 8 through the brazing material 9 such as silver brazing,
Even if the tensile stress at the time of solidification of the brazing material 9 acts on the frame-shaped metallized metal layer 7, the frame-shaped metallized metal layer 7 does not separate from the insulating base 1, and as a result, the insulating base 1
The container 3 consisting of the metal lid 2 and the metal lid 2 is completely hermetically sealed so that the semiconductor element 3 housed inside can be normally operated for a long period of time.
And it becomes possible to operate stably.
【００２２】尚、前記枠状のメタライズ金属層7 はタン
グステンの量が60.0重量％未満となると絶縁基体1 とな
るセラミックグリーンシートを焼成して絶縁基体1 とな
す際、絶縁基体1 とメタライズ金属層7 との焼成収縮量
の差が大きなものとなり、メタライズ金属層7 と絶縁基
体1 との被着界面に大きな応力が発生してメタライズ金
属層7 の絶縁基体1 に対する被着強度が弱いものとな
り、また80.0重量％を越えるとメタライズ金属層7 の熱
膨張係数が絶縁基体1 の熱膨張係数と比較してかなり小
さな値となり、メタライズ金属層7 と絶縁基体1 との被
着界面に両者の熱膨張係数の差に起因する応力が印加さ
れるとメタライズ金属層7 が絶縁基体1 より剥離してし
まう。従って、前記枠状のメタライズ金属層7 はタング
ステンの量が60.0乃至80.0重量％の範囲に特定される。When the amount of tungsten is less than 60.0% by weight, the frame-shaped metallized metal layer 7 becomes the insulating substrate 1 when the ceramic green sheet is fired to form the insulating substrate 1. The difference in the amount of firing shrinkage between the metallized metal layer 7 and the metallized metal layer 7 becomes large, and a large stress is generated at the deposition interface between the metallized metal layer 7 and the insulating substrate 1 to weaken the deposition strength of the metallized metal layer 7 on the insulating substrate 1. On the other hand, if it exceeds 80.0% by weight, the coefficient of thermal expansion of the metallized metal layer 7 becomes considerably smaller than that of the insulating base material 1, and the thermal expansion coefficient of the metallized metal layer 7 and the insulating base material 1 is increased at the interface between them. When the stress caused by the difference in the coefficient is applied, the metallized metal layer 7 is separated from the insulating substrate 1. Therefore, the frame-shaped metallized metal layer 7 is specified in the range of 60.0 to 80.0% by weight of tungsten.
【００２３】また前記枠状のメタライズ金属層7 はモリ
ブデンの量が20.0重量％未満となるとメタライズ金属層
7 の熱膨張係数が絶縁基体1 の熱膨張係数と比較してか
なり小さな値となり、メタライズ金属層7 と絶縁基体1
との被着界面に両者の熱膨張係数の差に起因する応力が
印加されるとメタライズ金属層7 が絶縁基体1 より剥離
してしまい、また40.0重量％を越えると絶縁基体1 とな
るセラミックグリーンシートを焼成して絶縁基体1 とな
す際、絶縁基体1 とメタライズ金属層7 との焼成収縮量
の差が大きなものとなり、メタライズ金属層7 と絶縁基
体1 との被着界面に大きな応力が発生してメタライズ金
属層7 の絶縁基体1 に対する被着強度が弱いものとな
る。従って、前記枠状のメタライズ金属層7 はモリブデ
ンの量が20.0乃至40.0重量％の範囲に特定される。The frame-shaped metallized metal layer 7 is a metallized metal layer 7 when the amount of molybdenum is less than 20.0% by weight.
The coefficient of thermal expansion of 7 is much smaller than that of the insulating substrate 1, and the metallized metal layer 7 and the insulating substrate 1
When a stress resulting from the difference in thermal expansion coefficient between the two is applied to the adhered interface with the metallized metal layer 7 is separated from the insulating substrate 1, and when it exceeds 40.0% by weight, the ceramic green becomes the insulating substrate 1. When the sheet is fired to form the insulating substrate 1, the difference in the amount of firing shrinkage between the insulating substrate 1 and the metallized metal layer 7 becomes large, and a large stress occurs at the adhered interface between the metallized metal layer 7 and the insulating substrate 1. As a result, the adhesion strength of the metallized metal layer 7 to the insulating substrate 1 becomes weak. Therefore, in the frame-shaped metallized metal layer 7, the amount of molybdenum is specified in the range of 20.0 to 40.0% by weight.
【００２４】更に前記枠状のメタライズ金属層7 は酸化
マンガンの量が0.2 重量％未満となると絶縁基体1 とな
るセラミックグリーンシートを焼成して絶縁基体1 とな
す際、絶縁基体1 に含有されるガラス成分のメタライズ
金属層7 への浸透吸収が不足し該ガラス成分によるアン
カー効果が小さいものとなってメタライズ金属層7 の絶
縁基体1 に対する被着強度が弱いものとなり、また2.0
重量％を越えると絶縁基体1 に含有されるガラス成分の
メタライズ金属層7 への浸透吸収が過多となり、該浸透
吸収されたガラス成分よりメタライズ金属層7 自体の機
械的強度が弱いものとなる。従って、前記枠状のメタラ
イズ金属層7 は酸化マンガンの量が0.2乃至2.0 重量％
の範囲に特定される。Further, the frame-shaped metallized metal layer 7 is contained in the insulating substrate 1 when the ceramic green sheet which becomes the insulating substrate 1 when the amount of manganese oxide is less than 0.2 wt% is fired to form the insulating substrate 1. The permeation and absorption of the glass component into the metallized metal layer 7 is insufficient, the anchor effect by the glass component is small, and the adhesion strength of the metallized metal layer 7 to the insulating substrate 1 is weak.
If it exceeds 5% by weight, the glass component contained in the insulating substrate 1 is excessively permeated and absorbed into the metallized metal layer 7, and the mechanical strength of the metallized metal layer 7 itself is weaker than that of the permeated and absorbed glass component. Therefore, the frame-shaped metallized metal layer 7 contains 0.2 to 2.0% by weight of manganese oxide.
Specified in the range of.
【００２５】前記枠状のメタライズ金属層7 は所定量の
タングステン、モリブデン、酸化マンガンの粉末に適当
な有機溶剤、溶媒を添加混合して得たペーストを絶縁基
体1となるセラミックグリーンシート上に従来周知のス
クリーン印刷法等により予め所定厚みに印刷塗布してお
くことによって絶縁基体1 の上面で、半導体素子3 を収
容する凹部1a周囲に枠状に被着形成される。The frame-shaped metallized metal layer 7 is formed on a ceramic green sheet which becomes the insulating substrate 1 by using a paste obtained by adding and mixing a predetermined amount of powder of tungsten, molybdenum and manganese oxide with a suitable organic solvent and solvent. By printing and applying a predetermined thickness in advance by a well-known screen printing method or the like, a frame-like deposition is formed on the upper surface of the insulating substrate 1 around the recess 1a for housing the semiconductor element 3.
【００２６】前記メタライズ金属層7 は更にその上面に
ロウ材9 を介して金属枠体8 がロウ付けされており、該
金属枠体8 は鉄ーニッケルーコバルト合金や鉄ーニッケ
ル合金等の金属材料から成る金属製蓋体2 を絶縁基体1
に取着する際の下地金属部材として作用し、金属枠体8
に金属製蓋体2 をシームウエルド法等により溶接するこ
とによって金属製蓋体2 は絶縁基体1 上に取着される。The metallized metal layer 7 is further brazed on its upper surface with a metal frame 8 via a brazing material 9. The metal frame 8 is made of a metal material such as iron-nickel-cobalt alloy or iron-nickel alloy. Insulating base 1 with metal lid 2 consisting of
Acts as a base metal member when attaching to the metal frame 8
The metal lid body 2 is attached to the insulating base 1 by welding the metal lid body 2 to it by the seam weld method or the like.
【００２７】前記金属枠体8 は鉄ーニッケルーコバルト
合金や鉄ーニッケル合金等の金属材料から成り、該鉄ー
ニッケルーコバルト合金等のインゴット( 塊) を圧延加
工法や打ち抜き加工法等、従来周知の金属加工法を採用
することによって所定の枠状に製作される。The metal frame body 8 is made of a metal material such as an iron-nickel-cobalt alloy or an iron-nickel alloy, and the ingot (lump) of the iron-nickel-cobalt alloy or the like is conventionally processed by a rolling method or a punching method. It is manufactured in a predetermined frame shape by adopting a well-known metal working method.
【００２８】前記金属枠体8 はまた絶縁基体1 に被着さ
せた枠状のメタライズ金属層7 にロウ材9 を介してロウ
付けされ、該ロウ材9 としては銀ー銅合金( 銀ロウ) や
金ー銀合金等が使用される。The metal frame 8 is also brazed to the frame-shaped metallized metal layer 7 adhered to the insulating substrate 1 via a brazing material 9, and the brazing material 9 is a silver-copper alloy (silver brazing). And gold-silver alloys are used.
【００２９】かくして上述の半導体素子収納用パッケー
ジによれば、絶縁基体1 の凹部1a底面に半導体素子3 を
ロウ材、ガラス、樹脂等の接着剤を介して接着固定する
とともに該半導体素子3 の各電極をボンディングワイヤ
5 を介してメタライズ配線層4 に電気的に接続し、しか
る後、絶縁基体1 の上面にロウ付けした金属枠体8 に金
属製蓋体2 をシームウエルド法等により溶接し、絶縁基
体1 と金属製蓋体3 とから成る容器内部に半導体素子3
を気密に封止することによって最終製品としての半導体
装置となる。Thus, according to the above-mentioned package for accommodating semiconductor elements, the semiconductor element 3 is adhered and fixed to the bottom surface of the concave portion 1a of the insulating substrate 1 with an adhesive such as a brazing material, glass, or resin, and Bonding wire for electrode
It is electrically connected to the metallized wiring layer 4 via 5, and then the metal frame 2 is brazed to the upper surface of the insulating substrate 1 by welding the metal lid 2 to the insulating substrate 1 by the seam welding method or the like. The semiconductor element 3 is placed inside the container consisting of the metallic lid 3.
Is hermetically sealed to form a semiconductor device as a final product.
【００３０】尚、本発明は上述した半導体素子収納用パ
ッケージに限定されるものではなく、本発明の要旨を逸
脱しない範囲であれば種々の変更は可能である。The present invention is not limited to the above-mentioned package for accommodating semiconductor elements, and various modifications can be made without departing from the gist of the present invention.
【００３１】[0031]
【発明の効果】本発明の半導体素子収納用パッケージに
よれば、枠状のメタライズ金属層を60.0乃至80.0重量％
のタングステンと20.0乃至40.0重量％のモリブデンと0.
2 乃至2.0 重量％の酸化マンガンとで形成することから
メタライズ金属層を絶縁基体に極めて強固に被着させる
ことができ、その結果、枠状のメタライズ金属層に銀ロ
ウ等のロウ材を介して金属枠体をロウ付けした場合、ロ
ウ材の凝固時の引っ張り応力によって枠状メタライズ金
属層が絶縁基体より剥離することはなく、絶縁基体と金
属製蓋体とから成る容器の気密封止を完全として内部に
収容する半導体素子を長期間にわたり正常に、且つ安定
に作動させることが可能となる。According to the package for housing a semiconductor device of the present invention, the frame-shaped metallized metal layer is contained in an amount of 60.0 to 80.0% by weight.
Tungsten and 20.0-40.0% by weight molybdenum and 0.
Since the metallized metal layer is formed from 2 to 2.0% by weight of manganese oxide, the metallized metal layer can be extremely strongly adhered to the insulating substrate. When the metal frame is brazed, the frame-shaped metallized metal layer does not separate from the insulating substrate due to the tensile stress when the brazing material is solidified, and the container consisting of the insulating substrate and the metal lid is completely hermetically sealed. As a result, it becomes possible to operate the semiconductor element housed inside normally and stably for a long period of time.
【図１】本発明の半導体素子収納用パッケージの一実施
例を示す断面図である。FIG. 1 is a cross-sectional view showing an embodiment of a semiconductor element housing package of the present invention.
１・・・・絶縁基体 １ａ・・・凹部 ２・・・・金属製蓋体 ３・・・・半導体素子 ４・・・・メタライズ配線層 ６・・・・外部リード端子 ７・・・・枠状のメタライズ金属層 ８・・・・金属枠体 ９・・・・ロウ材 1 ... Insulating substrate 1a ... Recess 2 ... Metal lid 3 ... Semiconductor element 4 ... Metallized wiring layer 6 ... External lead terminal 7 ... Frame -Shaped metallized metal layer 8 ... Metal frame 9 ... Brazing material
Claims (1)
と、該凹部を囲繞する枠状のメタライズ金属層を有する
絶縁基体と、前記枠状のメタライズ金属層にロウ付けさ
れる金属枠体と、前記金属枠体に取着される金属製蓋体
とから成る半導体素子収納用パッケージであって、前記
枠状のメタライズ金属層を60.0乃至80.0重量％のタング
ステンと20.0乃至40.0重量％のモリブデンと0.2 乃至2.
0 重量％の酸化マンガンとで形成したことを特徴とする
半導体素子収納用パッケージ。1. A recess for accommodating a semiconductor element on an upper surface, an insulating substrate having a frame-shaped metallized metal layer surrounding the recess, and a metal frame body brazed to the frame-shaped metallized metal layer. A semiconductor element housing package comprising a metal lid attached to the metal frame, wherein the frame-shaped metallized metal layer comprises 60.0 to 80.0 wt% tungsten and 20.0 to 40.0 wt% molybdenum. 0.2 to 2.
A package for accommodating a semiconductor element, which is formed of 0% by weight of manganese oxide.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26399694A JP3426741B2 (en) | 1994-10-27 | 1994-10-27 | Package for storing semiconductor elements |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26399694A JP3426741B2 (en) | 1994-10-27 | 1994-10-27 | Package for storing semiconductor elements |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08125052A true JPH08125052A (en) | 1996-05-17 |
| JP3426741B2 JP3426741B2 (en) | 2003-07-14 |
Family
ID=17397103
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP26399694A Expired - Fee Related JP3426741B2 (en) | 1994-10-27 | 1994-10-27 | Package for storing semiconductor elements |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3426741B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116250078A (en) * | 2021-03-19 | 2023-06-09 | Ngk电子器件株式会社 | Package body |
-
1994
- 1994-10-27 JP JP26399694A patent/JP3426741B2/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116250078A (en) * | 2021-03-19 | 2023-06-09 | Ngk电子器件株式会社 | Package body |
| CN116250078B (en) * | 2021-03-19 | 2023-10-24 | Ngk电子器件株式会社 | Package body |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3426741B2 (en) | 2003-07-14 |
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