JP3426741B2 - Package for storing semiconductor elements - Google Patents

Package for storing semiconductor elements

Info

Publication number
JP3426741B2
JP3426741B2 JP26399694A JP26399694A JP3426741B2 JP 3426741 B2 JP3426741 B2 JP 3426741B2 JP 26399694 A JP26399694 A JP 26399694A JP 26399694 A JP26399694 A JP 26399694A JP 3426741 B2 JP3426741 B2 JP 3426741B2
Authority
JP
Japan
Prior art keywords
frame
metal layer
semiconductor element
metal
metallized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP26399694A
Other languages
Japanese (ja)
Other versions
JPH08125052A (en
Inventor
達也 田代
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
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Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP26399694A priority Critical patent/JP3426741B2/en
Publication of JPH08125052A publication Critical patent/JPH08125052A/en
Application granted granted Critical
Publication of JP3426741B2 publication Critical patent/JP3426741B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Ceramic Products (AREA)

Description

【発明の詳細な説明】 【0001】 【産業上の利用分野】本発明は、半導体素子を収容する
ための半導体素子収納用パッケージに関するものであ
る。 【0002】 【従来の技術】コンピュータ等の情報処理装置には半導
体素子収納用パッケージの内部に半導体素子を収容した
半導体装置が多数実装されている。 【0003】従来、半導体素子を収容するための半導体
素子収納用パッケージは、通常、酸化アルミニウム質焼
結体等の電気絶縁材料から成り、その上面の略中央部に
半導体素子を収容するための凹部及び該凹部周辺から周
縁部にかけて導出されたタングステン、モリブデン、マ
ンガン等の高融点金属粉末から成る複数個のメタライズ
配線層を有する絶縁基体と、半導体素子を外部電気回路
に電気的に接続するために前記メタライズ配線層に銀ロ
ウ等のロウ材を介してロウ付けされた複数個の外部リー
ド端子と、鉄−ニッケル−コバルト合金や鉄−ニッケル
合金等の金属から成る蓋体とから構成されており、絶縁
基体の凹部底面に半導体素子をガラス、樹脂、ロウ材等
の接着剤を介して接着固定するとともに該半導体素子の
各電極をボンディングワイヤを介してメタライズ配線層
に接続し、しかる後、絶縁基体上面に金属製蓋体を溶接
し、絶縁基体と金属製蓋体とから成る容器内部に半導体
素子を気密に封止することによって最終製品としての半
導体装置となる。 【0004】尚、前記従来の半導体素子収納用パッケー
ジは通常、絶縁基体の上面に鉄−ニッケル−コバルト合
金や鉄−ニッケル合金等の金属材料から成る金属枠体を
予めロウ付けしておくとともに該金属枠体に金属製蓋体
をシームウエルド法等により溶接することによって金属
製蓋体は絶縁基体の上面に取着され、これによって絶縁
基体と金属製蓋体とから成る容器が気密に封止される。 【0005】また前記絶縁基体への金属枠体のロウ付け
は、まず絶縁基体の上面で半導体素子を収容する凹部周
囲に、タングステン、モリブデン、マンガン等の高融点
金属粉末から成る枠状のメタライズ金属層を従来周知の
スクリーン印刷法等の厚膜手法を採用することによって
被着形成し、次に前記枠状メタライズ金属層上に銀ロウ
等のロウ材と金属枠体とを順次載置し、最後に前記ロウ
材に約800℃の温度を印加し、ロウ材を加熱溶融するこ
とによって行われる。 【0006】 【発明が解決しようとする課題】しかしながら、近時、
コンピュータ等の情報処理装置は急激に小型化が進み、
該情報処理装置に実装される半導体装置も極めて小型の
ものが要求され、同時に半導体装置を形成する半導体素
子収納用パッケージも極めて小型のものが要求されるよ
うになってきた。 【0007】そこで半導体素子収納用パッケージを小型
とすると絶縁基体の面積が狭くなるとともに該絶縁基体
の上面に被着される枠状のメタライズ金属層の幅が必然
的に狭くなり、その結果、メタライズ金属層の絶縁基体
に対する被着強度が弱いものとなってきた。そのためこ
の枠状メタライズ金属層に金属枠体を銀ロウ等のロウ材
を介してロウ付けするとロウ材の凝固時に発生する引っ
張り応力によってメタライズ金属層が絶縁基体より剥離
し、絶縁基体と金属製蓋体とから成る容器の内部を気密
封止することができず、内部に収容する半導体素子を長
期間にわたり正常、且つ安定に作動させることが不可と
なる欠点を有していた。 【0008】 【発明の目的】本発明は上記欠点に鑑み案出されたもの
で、その目的は枠状メタライズ金属層を絶縁基体に強固
に被着させ、絶縁基体と金属製蓋体とから成る容器の気
密封止を完全として内部に収容する半導体素子を長期間
にわたり正常、かつ安定に作動させることができる半導
体素子収納用パッケージを提供することにある。 【0009】 【課題を解決するための手段】本発明の半導体素子収納
用パッケージは、上面に半導体素子を収容するための凹
部と、該凹部を囲繞する枠状のメタライズ金属層を有
し、ガラス成分を含有する絶縁基体と、前記枠状のメタ
ライズ金属層にロウ付けされる金属枠体と、前記金属枠
体に取着される金属製蓋体とから成る半導体素子収納用
パッケージであって、前記枠状のメタライズ金属層を6
0.0乃至80.0重量%のタングステンと20.0乃至40.0重量
%のモリブデンと0.2乃至2.0重量%の酸化マンガンとで
形成し、該酸化マンガンにより前記絶縁基体の前記ガラ
ス成分を前記枠状のメタライズ金属層に浸透吸収させて
いることを特徴とするものである。 【0010】 【作用】本発明の半導体素子収納用パッケージによれ
ば、枠状のメタライズ金属層を60.0乃至80.0重量%のタ
ングステンと20.0乃至40.0重量%のモリブデンと0.2乃
至2.0重量%の酸化マンガンとで形成し、この酸化マン
ガンにより絶縁基体のガラス成分を枠状のメタライズ金
属層に浸透吸収させていることから、メタライズ金属層
を絶縁基体に極めて強固に被着させることができ、その
結果、枠状のメタライズ金属層に銀ロウ等のロウ材を介
して金属枠体をロウ付けした場合、ロウ材の凝固時の引
っ張り応力によって枠状のメタライズ金属層が絶縁基体
より剥離することはなく、絶縁基体と金属性蓋体とから
成る容器の気密封止を完全として内部に収容する半導体
素子を長期間にわたり正常に、且つ安定に作動させるこ
とが可能となる。 【0011】 【実施例】次に本発明を添付図面に基づき詳細に説明す
る。図1は、本発明の半導体素子収納用パッケージの一
実施例を示す断面図であり、図中、1 は絶縁基体、2 は
金属製蓋体である。この絶縁基体1 と金属製蓋体2とで
半導体素子3 を収容するための容器が構成される。 【0012】前記絶縁基体1 は酸化アルミニウム質焼結
体、ムライト質焼結体、窒化アルミニウム質焼結体、炭
化珪素質焼結体、ガラスセラミックス焼結体等から成
り、その上面の略中央部に半導体素子3 を収容するため
の空所を形成する凹部1aが設けてあり、該凹部1a底面に
は半導体素子3 がロウ材、ガラス、樹脂等の接着剤を介
して接着固定される。 【0013】前記絶縁基体1 は例えば、酸化アルミニウ
ム質焼結体から成る場合、アルミナ(Al2 O 3 ) 、シリ
カ(SiO2 ) 、カルシア(CaO) 、マグネシア(MgO) 等のセ
ラミック原料粉末に適当な有機溶剤、溶媒を添加混合し
て泥漿状となすとともにこれを従来周知のドクターブレ
ード法やカレンダーロール法等によりシート状に成形し
てセラミックグリーンシート( セラミック生シート) を
得、しかる後、前記セラミックグリーンシートに適当な
打ち抜き加工を施すとともに複数枚積層し、高温( 約16
00℃) で焼成することによって製作される。 【0014】また前記絶縁基体1 には凹部1a周辺から外
周縁にかけて複数個のメタライズ配線層4 が被着形成さ
れており、該メタライズ配線層4 の凹部1a周辺部には半
導体素子3 の電極がボンディングワイヤ5 を介して電気
的に接続され、また絶縁基体1 の外周縁に導出する部位
には外部リード端子6 がロウ材を介してロウ付けされ
る。 【0015】前記絶縁基体1 に設けたメタライズ配線層
4 はタングステン、モリブデン、マンガン等の高融点金
属粉末から成り、該メタライズ配線層4 は外部電気回路
に接続される外部リード端子6 に半導体素子3 の各電極
を電気的に導通させる作用を為す。 【0016】前記メタライズ配線層4 は例えば、タング
ステン等の高融点金属粉末に有機溶剤、溶媒を添加混合
して得た金属ペーストを絶縁基体1 となるセラミックグ
リーンシートに予め従来周知のスクリーン印刷法により
所定パターンに印刷塗布しておくことによって絶縁基体
1 の所定位置に被着形成される。 【0017】尚、前記メタライズ配線層4はその露出す
る外表面にニッケル、金等の耐蝕性に優れ、且つロウ材
と濡れ性の良い金属をメッキ法により1.0乃至20.0μm
の厚みに層着させておくとメタライズ配線層4の酸化腐
食を有効に防止することができるとともにメタライズ配
線層4とボンディングワイヤ5及び外部リード端子6との
ロウ付け接合を強固なものとなすことができる。従っ
て、前記メタライズ配線層4の表面にはニッケル、金等
の耐蝕性に優れ、且つロウ材との濡れ性が良い金属をメ
ッキ法により1.0乃至20.0μmの厚みに層着させておく
ことが好ましい。 【0018】また前記絶縁基体1に被着したメタライズ
配線層4にロウ付けされる外部リード端子6は鉄−ニッケ
ル−コバルト合金や鉄−ニッケル合金等の金属材料から
成り、半導体素子3の各電極を外部電気回路に電気的に
接続する作用を為す。 【0019】前記外部リード端子6は鉄−ニッケル−コ
バルト合金等のインゴット(塊)を圧延加工法や打ち抜
き加工法等、従来周知の金属加工法を採用し、所定の板
状に形成することによって製作される。 【0020】また一方、前記絶縁基体1 の上面には半導
体素子3 を収容する凹部1aを囲繞するようにしてメタラ
イズ金属層7 が被着形成されており、該メタライズ金属
層7には金属枠体8 がロウ材9 を介してロウ付けされて
いる。 【0021】前記枠状のメタライズ金属層7 は金属枠体
8 を絶縁基体1 にロウ付けする際の下地金属層として作
用し、60.0乃至80.0重量%のタングステンと20.0乃至4
0.0重量%のモリブデンと0.2 乃至2.0 重量%の酸化マ
ンガンとで形成されているメタライズ金属層7 はタング
ステン及びモリブデンを所定の割合とすることにより絶
縁基体1 と成るセラミックグリーンシートを焼成して絶
縁基体1 となす際、メタライズ金属層7 と絶縁基体1 と
の焼成収縮量及び熱膨張係数の差に起因して両者の被着
界面に発生する応力を小さいものとなすとともに酸化マ
ンガンを添加することにより絶縁基体1 中に含有される
ガラス成分をメタライズ金属層7中に有効に浸透吸収さ
せ該ガラスのアンカー効果によりその被着強度が極めて
強固なものとなっており、枠状のメタライズ金属層7 に
銀ロウ等のロウ材9 を介して金属枠体8 をロウ付けし、
ロウ材9 の凝固時の引っ張り応力が枠状メタライズ金属
層7に作用したとしても枠状メタライズ金属層7 が絶縁
基体1 より剥離することはなく、その結果、絶縁基体1
と金属製蓋体2 とから成る容器の気密封止を完全として
内部に収容する半導体素子3 を長期間にわたり正常に、
且つ安定に作動させることが可能となる。 【0022】尚、前記枠状のメタライズ金属層7 はタン
グステンの量が60.0重量%未満となると絶縁基体1 とな
るセラミックグリーンシートを焼成して絶縁基体1 とな
す際、絶縁基体1 とメタライズ金属層7 との焼成収縮量
の差が大きなものとなり、メタライズ金属層7 と絶縁基
体1 との被着界面に大きな応力が発生してメタライズ金
属層7 の絶縁基体1 に対する被着強度が弱いものとな
り、また80.0重量%を越えるとメタライズ金属層7 の熱
膨張係数が絶縁基体1 の熱膨張係数と比較してかなり小
さな値となり、メタライズ金属層7 と絶縁基体1 との被
着界面に両者の熱膨張係数の差に起因する応力が印加さ
れるとメタライズ金属層7 が絶縁基体1 より剥離してし
まう。従って、前記枠状のメタライズ金属層7 はタング
ステンの量が60.0乃至80.0重量%の範囲に特定される。 【0023】また前記枠状のメタライズ金属層7 はモリ
ブデンの量が20.0重量%未満となるとメタライズ金属層
7 の熱膨張係数が絶縁基体1 の熱膨張係数と比較してか
なり小さな値となり、メタライズ金属層7 と絶縁基体1
との被着界面に両者の熱膨張係数の差に起因する応力が
印加されるとメタライズ金属層7 が絶縁基体1 より剥離
してしまい、また40.0重量%を越えると絶縁基体1 とな
るセラミックグリーンシートを焼成して絶縁基体1 とな
す際、絶縁基体1 とメタライズ金属層7 との焼成収縮量
の差が大きなものとなり、メタライズ金属層7 と絶縁基
体1 との被着界面に大きな応力が発生してメタライズ金
属層7 の絶縁基体1 に対する被着強度が弱いものとな
る。従って、前記枠状のメタライズ金属層7 はモリブデ
ンの量が20.0乃至40.0重量%の範囲に特定される。 【0024】更に前記枠状のメタライズ金属層7 は酸化
マンガンの量が0.2 重量%未満となると絶縁基体1 とな
るセラミックグリーンシートを焼成して絶縁基体1 とな
す際、絶縁基体1 に含有されるガラス成分のメタライズ
金属層7 への浸透吸収が不足し該ガラス成分によるアン
カー効果が小さいものとなってメタライズ金属層7 の絶
縁基体1 に対する被着強度が弱いものとなり、また2.0
重量%を越えると絶縁基体1 に含有されるガラス成分の
メタライズ金属層7 への浸透吸収が過多となり、該浸透
吸収されたガラス成分よりメタライズ金属層7 自体の機
械的強度が弱いものとなる。従って、前記枠状のメタラ
イズ金属層7 は酸化マンガンの量が0.2乃至2.0 重量%
の範囲に特定される。 【0025】前記枠状のメタライズ金属層7 は所定量の
タングステン、モリブデン、酸化マンガンの粉末に適当
な有機溶剤、溶媒を添加混合して得たペーストを絶縁基
体1となるセラミックグリーンシート上に従来周知のス
クリーン印刷法等により予め所定厚みに印刷塗布してお
くことによって絶縁基体1 の上面で、半導体素子3 を収
容する凹部1a周囲に枠状に被着形成される。 【0026】前記メタライズ金属層7は更にその上面に
ロウ材9を介して金属枠体8がロウ付けされており、該金
属枠体8は鉄−ニッケル−コバルト合金や鉄−ニッケル
合金等の金属材料から成る金属製蓋体2を絶縁基体1に取
着する際の下地金属部材として作用し、金属枠体8に金
属製蓋体2をシームウエルド法等により溶接することに
よって金属製蓋体2は絶縁基体1上に取着される。 【0027】前記金属枠体8は鉄−ニッケル−コバルト
合金や鉄−ニッケル合金等の金属材料から成り、該鉄−
ニッケル−コバルト合金等のインゴット(塊)を圧延加
工法や打ち抜き加工法等、従来周知の金属加工法を採用
することによって所定の枠状に製作される。 【0028】前記金属枠体8はまた絶縁基体1に被着させ
た枠状のメタライズ金属層7にロウ材9を介してロウ付け
され、該ロウ材9としては銀−銅合金(銀ロウ)や金−
銀合金等が使用される。 【0029】かくして上述の半導体素子収納用パッケー
ジによれば、絶縁基体1 の凹部1a底面に半導体素子3 を
ロウ材、ガラス、樹脂等の接着剤を介して接着固定する
とともに該半導体素子3 の各電極をボンディングワイヤ
5 を介してメタライズ配線層4 に電気的に接続し、しか
る後、絶縁基体1 の上面にロウ付けした金属枠体8 に金
属製蓋体2 をシームウエルド法等により溶接し、絶縁基
体1 と金属製蓋体3 とから成る容器内部に半導体素子3
を気密に封止することによって最終製品としての半導体
装置となる。 【0030】尚、本発明は上述した半導体素子収納用パ
ッケージに限定されるものではなく、本発明の要旨を逸
脱しない範囲であれば種々の変更は可能である。 【0031】 【発明の効果】本発明の半導体素子収納用パッケージに
よれば、枠状のメタライズ金属層を60.0乃至80.0重量%
のタングステンと20.0乃至40.0重量%のモリブデンと0.
2乃至2.0重量%の酸化マンガンとで形成し、この酸化マ
ンガンにより絶縁基体のガラス成分を枠状のメタライズ
金属層に浸透吸収させていることから、メタライズ金属
層を絶縁基体に極めて強固に被着させることができ、そ
の結果、枠状のメタライズ金属層に銀ロウ等のロウ材を
介して金属枠体をロウ付けした場合、ロウ材の凝固時の
引っ張り応力によって枠状のメタライズ金属層が絶縁基
体より剥離することはなく、絶縁基体と金属性蓋体とか
ら成る容器の気密封止を完全として内部に収容する半導
体素子を長期間にわたり正常に、且つ安定に作動させる
ことが可能となる。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device housing package for housing a semiconductor device. 2. Description of the Related Art In an information processing apparatus such as a computer, a large number of semiconductor devices in which semiconductor elements are accommodated inside a semiconductor element accommodation package are mounted. Conventionally, a semiconductor element housing package for housing a semiconductor element is usually made of an electrically insulating material such as an aluminum oxide sintered body, and has a concave portion for housing the semiconductor element at a substantially central portion of an upper surface thereof. And an insulating base having a plurality of metallized wiring layers made of a refractory metal powder such as tungsten, molybdenum, and manganese derived from the periphery of the concave portion to the peripheral portion, and for electrically connecting the semiconductor element to an external electric circuit. A plurality of external lead terminals brazed to the metallized wiring layer via a brazing material such as silver brazing; and a lid made of a metal such as an iron-nickel-cobalt alloy or an iron-nickel alloy. Then, the semiconductor element is bonded and fixed to the bottom of the concave portion of the insulating base via an adhesive such as glass, resin, brazing material or the like, and each electrode of the semiconductor element is bonded. The metal element is connected to the metallized wiring layer via a wire, and thereafter, a metal lid is welded to the upper surface of the insulating base, and the semiconductor element is hermetically sealed inside a container formed of the insulating base and the metal lid. It becomes a semiconductor device as a product. In the conventional package for housing a semiconductor element, a metal frame made of a metal material such as an iron-nickel-cobalt alloy or an iron-nickel alloy is usually brazed on the upper surface of the insulating base. The metal lid is attached to the upper surface of the insulating base by welding the metal lid to the metal frame by a seam welding method or the like, whereby the container including the insulating base and the metal lid is hermetically sealed. Is done. In addition, the metal frame is brazed to the insulating base by first forming a frame-shaped metallized metal made of a refractory metal powder such as tungsten, molybdenum, manganese or the like on the upper surface of the insulating base and around the recess for accommodating the semiconductor element. The layer is formed by applying a thick film method such as a conventionally known screen printing method, and then a brazing material such as silver brazing and a metal frame are sequentially placed on the frame-shaped metallized metal layer, Finally, a temperature of about 800 ° C. is applied to the brazing material, and the brazing material is heated and melted. [0006] However, recently,
Information processing devices such as computers are rapidly becoming smaller,
An extremely small semiconductor device is also required to be mounted on the information processing apparatus, and at the same time, an extremely small semiconductor element housing package forming the semiconductor device is required. Therefore, when the size of the package for accommodating a semiconductor element is reduced, the area of the insulating base is reduced, and the width of the frame-shaped metallized metal layer attached to the upper surface of the insulating base is necessarily reduced. The adhesion strength of the metal layer to the insulating substrate has become weak. Therefore, when a metal frame is brazed to this frame-shaped metallized metal layer via a brazing material such as silver brazing, the metallized metal layer is separated from the insulating substrate by a tensile stress generated when the brazing material solidifies, and the insulating substrate and the metal cover are formed. There has been a drawback that the inside of a container made of a body cannot be hermetically sealed, and it is impossible to normally and stably operate a semiconductor element contained therein for a long period of time. SUMMARY OF THE INVENTION The present invention has been devised in view of the above-mentioned drawbacks, and has as its object to provide a frame-shaped metallized metal layer which is firmly adhered to an insulating substrate and which comprises an insulating substrate and a metal lid. It is an object of the present invention to provide a package for housing a semiconductor element, which allows a semiconductor element housed therein to be completely hermetically sealed and operate normally and stably for a long period of time. A package for accommodating a semiconductor element according to the present invention has a concave portion for accommodating a semiconductor element on an upper surface, a frame-shaped metallized metal layer surrounding the concave portion, and a glass. A semiconductor element containing package comprising: an insulating base containing a component, a metal frame brazed to the frame-shaped metallized metal layer, and a metal lid attached to the metal frame; The frame-shaped metallized metal layer is
It is formed from 0.0 to 80.0% by weight of tungsten, 20.0 to 40.0% by weight of molybdenum, and 0.2 to 2.0% by weight of manganese oxide, and the manganese oxide allows the glass component of the insulating substrate to penetrate into the frame-shaped metallized metal layer. It is characterized by being absorbed. According to the semiconductor device housing package of the present invention, the frame-shaped metallized metal layer is formed of 60.0 to 80.0% by weight of tungsten, 20.0 to 40.0% by weight of molybdenum, and 0.2 to 2.0% by weight of manganese oxide. Since the manganese oxide allows the glass component of the insulating substrate to penetrate and absorb into the frame-shaped metallized metal layer, the metallized metal layer can be extremely firmly adhered to the insulating substrate. When a metal frame is brazed to a metal-like metallized metal layer via a brazing material such as silver brazing, the frame-shaped metallized metal layer does not peel off from the insulating base due to the tensile stress at the time of solidification of the brazing material. It is possible to completely and hermetically seal the container including the base and the metal lid, and to operate the semiconductor element housed therein normally and stably for a long period of time. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a cross-sectional view showing an embodiment of a package for accommodating a semiconductor element according to the present invention, wherein 1 is an insulating base and 2 is a metal lid. The insulating base 1 and the metal lid 2 constitute a container for housing the semiconductor element 3. The insulating substrate 1 is made of a sintered body of aluminum oxide, a sintered body of mullite, a sintered body of aluminum nitride, a sintered body of silicon carbide, a sintered body of glass ceramic, or the like. The semiconductor device 3 is provided with a concave portion 1a forming a space for accommodating the semiconductor element 3, and the semiconductor element 3 is bonded and fixed to the bottom surface of the concave portion 1a via an adhesive such as brazing material, glass, resin or the like. When the insulating substrate 1 is made of, for example, an aluminum oxide sintered body, it is suitable for ceramic raw material powders such as alumina (Al 2 O 3 ), silica (SiO 2 ), calcia (CaO), and magnesia (MgO). Organic solvent, a solvent is added and mixed to form a slurry, and this is formed into a sheet by a conventionally known doctor blade method, calender roll method, or the like to obtain a ceramic green sheet (ceramic green sheet). Appropriate punching processing is performed on ceramic green sheets, and multiple sheets are laminated.
(00 ° C.). A plurality of metallized wiring layers 4 are formed on the insulating substrate 1 from the periphery of the concave portion 1a to the outer peripheral edge thereof, and electrodes of the semiconductor element 3 are formed around the concave portion 1a of the metallized wiring layer 4. An external lead terminal 6 is electrically connected via a bonding wire 5 to a portion led out to the outer peripheral edge of the insulating base 1 via a brazing material. Metallized wiring layer provided on the insulating substrate 1
Numeral 4 is made of a high melting point metal powder such as tungsten, molybdenum, manganese or the like, and the metallized wiring layer 4 functions to electrically connect each electrode of the semiconductor element 3 to an external lead terminal 6 connected to an external electric circuit. The metallized wiring layer 4 is formed, for example, by applying a metal paste obtained by adding and mixing an organic solvent and a solvent to a high melting point metal powder such as tungsten on a ceramic green sheet serving as the insulating substrate 1 by a conventionally well-known screen printing method. Insulating substrate by printing and applying in a predetermined pattern
1 is formed at a predetermined position. The metallized wiring layer 4 is coated on its exposed outer surface with a metal having excellent corrosion resistance such as nickel and gold and a good wettability with a brazing material by 1.0 to 20.0 μm by plating.
The metallized wiring layer 4 can be effectively prevented from being oxidized and corroded, and the brazed joint between the metallized wiring layer 4 and the bonding wires 5 and the external lead terminals 6 should be made firm. Can be. Therefore, it is preferable that a metal having excellent corrosion resistance, such as nickel and gold, and having good wettability with a brazing material is applied to the surface of the metallized wiring layer 4 to a thickness of 1.0 to 20.0 μm by plating. . The external lead terminals 6 brazed to the metallized wiring layer 4 attached to the insulating substrate 1 are made of a metal material such as an iron-nickel-cobalt alloy or an iron-nickel alloy. To an external electric circuit. The external lead terminal 6 is formed by forming an ingot (lumps) such as an iron-nickel-cobalt alloy into a predetermined plate shape by using a conventionally known metal working method such as a rolling method or a punching method. Be produced. On the other hand, a metallized metal layer 7 is formed on the upper surface of the insulating base 1 so as to surround the concave portion 1a for accommodating the semiconductor element 3, and the metallized metal layer 7 is formed on the metallized metal layer 7. 8 is brazed through a brazing material 9. The frame-shaped metallized metal layer 7 is a metal frame.
8 acts as a base metal layer when brazing to the insulating substrate 1 and comprises 60.0 to 80.0% by weight of tungsten and 20.0 to 4% by weight.
The metallized metal layer 7 formed of 0.0% by weight of molybdenum and 0.2 to 2.0% by weight of manganese oxide is formed by firing a ceramic green sheet to be an insulating base 1 by setting a predetermined ratio of tungsten and molybdenum. In this case, the stress generated at the interface between the metallized metal layer 7 and the insulating substrate 1 due to the difference in the amount of shrinkage in firing and the thermal expansion coefficient between the metallized metal layer 7 and the insulating substrate 1 is reduced, and manganese oxide is added. The glass component contained in the insulating substrate 1 is effectively penetrated and absorbed into the metallized metal layer 7, and the adhesion strength is extremely strong due to the anchor effect of the glass. A metal frame 8 is brazed through a brazing material 9 such as silver brazing,
Even if the tensile stress at the time of solidification of the brazing material 9 acts on the frame-shaped metallized metal layer 7, the frame-shaped metallized metal layer 7 does not peel off from the insulating base 1, and as a result, the insulating base 1
The semiconductor element 3 housed therein is completely sealed hermetically with a container made of
And it can operate stably. When the amount of tungsten is less than 60.0% by weight, when the ceramic green sheet serving as the insulating base 1 is fired to form the insulating base 1, the frame-shaped metallized metal layer 7 is formed with the insulating base 1 and the metallized metal layer. 7, a large stress is generated at the adhesion interface between the metallized metal layer 7 and the insulating substrate 1, and the adhesion strength of the metallized metal layer 7 to the insulating substrate 1 becomes weak. If it exceeds 80.0% by weight, the coefficient of thermal expansion of the metallized metal layer 7 becomes considerably smaller than the coefficient of thermal expansion of the insulating substrate 1, and the thermal expansion coefficient of the metalized metal layer 7 and the insulating substrate 1 at the adhered interface between the two. When a stress resulting from the difference in the coefficients is applied, the metallized metal layer 7 is separated from the insulating base 1. Therefore, the frame-shaped metallized metal layer 7 has a tungsten content specified in the range of 60.0 to 80.0% by weight. When the amount of molybdenum is less than 20.0% by weight, the metallized metal layer 7
7, the thermal expansion coefficient of the metallized metal layer 7 and the insulating substrate 1 was considerably smaller than that of the insulating substrate 1.
When a stress due to the difference between the two thermal expansion coefficients is applied to the interface between the metallized metal layer 7 and the metallized metal layer 7, the metallized metal layer 7 is peeled off from the insulating substrate 1. When the sheet is fired to form the insulating substrate 1, the difference in the amount of firing shrinkage between the insulating substrate 1 and the metallized metal layer 7 becomes large, and a large stress occurs at the adhered interface between the metallized metal layer 7 and the insulating substrate 1. As a result, the adhesion strength of the metallized metal layer 7 to the insulating base 1 becomes weak. Therefore, the frame-shaped metallized metal layer 7 has an amount of molybdenum specified in the range of 20.0 to 40.0% by weight. When the amount of manganese oxide is less than 0.2% by weight, the frame-shaped metallized metal layer 7 is contained in the insulating base 1 when the ceramic green sheet serving as the insulating base 1 is fired to form the insulating base 1. The penetration of the glass component into the metallized metal layer 7 is insufficient, and the anchor effect of the glass component is small, so that the adhesion strength of the metallized metal layer 7 to the insulating substrate 1 is weak, and 2.0
If the content is more than 10% by weight, the glass component contained in the insulating substrate 1 will excessively penetrate and absorb into the metallized metal layer 7, and the mechanical strength of the metallized metal layer 7 itself will be weaker than the penetrated and absorbed glass component. Accordingly, the frame-shaped metallized metal layer 7 contains 0.2 to 2.0% by weight of manganese oxide.
Specified in the range. The frame-shaped metallized metal layer 7 is formed by adding a predetermined amount of tungsten, molybdenum, and manganese oxide powders to a paste obtained by adding an appropriate organic solvent and a solvent onto a ceramic green sheet serving as an insulating substrate 1. By printing and applying a predetermined thickness in advance by a well-known screen printing method or the like, a frame shape is formed on the upper surface of the insulating substrate 1 around the concave portion 1a accommodating the semiconductor element 3. The metallized metal layer 7 has a metal frame 8 brazed on the upper surface thereof via a brazing material 9, and the metal frame 8 is made of a metal such as an iron-nickel-cobalt alloy or an iron-nickel alloy. The metal lid 2 made of a material acts as a base metal member when attaching the metal lid 2 to the insulating base 1, and the metal lid 2 is welded to the metal frame 8 by a seam welding method or the like. Is attached on the insulating substrate 1. The metal frame 8 is made of a metal material such as an iron-nickel-cobalt alloy or an iron-nickel alloy.
An ingot (a lump) such as a nickel-cobalt alloy is manufactured into a predetermined frame shape by employing a conventionally known metal working method such as a rolling method or a punching method. The metal frame 8 is brazed via a brazing material 9 to a frame-shaped metallized metal layer 7 adhered to the insulating base 1, and the brazing material 9 is a silver-copper alloy (silver brazing). And gold-
A silver alloy or the like is used. Thus, according to the above-described package for accommodating a semiconductor element, the semiconductor element 3 is bonded and fixed to the bottom surface of the concave portion 1a of the insulating base 1 with an adhesive such as brazing material, glass, resin, and the like. Bonding wire to electrode
5 and then electrically connected to the metallized wiring layer 4 via a wire 5.Then, the metal lid 2 is welded to the metal frame 8 brazed to the upper surface of the insulating substrate 1 by a seam welding method or the like, and A semiconductor element 3 is placed inside a container comprising a metal lid 3.
Is hermetically sealed to provide a semiconductor device as a final product. It should be noted that the present invention is not limited to the above-described package for housing a semiconductor element, and various modifications can be made without departing from the scope of the present invention. According to the package for housing a semiconductor element of the present invention, the frame-shaped metallized metal layer is contained in an amount of 60.0 to 80.0% by weight.
Tungsten and 20.0 to 40.0% by weight molybdenum and 0.1%
2 to 2.0% by weight of manganese oxide, and the manganese oxide allows the glass component of the insulating substrate to penetrate and absorb into the frame-shaped metallized metal layer. As a result, when a metal frame is brazed to the frame-shaped metallized metal layer via a brazing material such as silver brazing, the frame-shaped metallized metal layer is insulated by the tensile stress at the time of solidification of the brazing material. Without peeling off from the base, the semiconductor element housed therein with the hermetic sealing of the container consisting of the insulating base and the metallic lid completely completed can be operated normally and stably for a long period of time.

【図面の簡単な説明】 【図1】本発明の半導体素子収納用パッケージの一実施
例を示す断面図である。 【符号の説明】 1・・・・絶縁基体 1a・・・凹部 2・・・・金属製蓋体 3・・・・半導体素子 4・・・・メタライズ配線層 6・・・・外部リード端子 7・・・・枠状のメタライズ金属層 8・・・・金属枠体 9・・・・ロウ材
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view showing one embodiment of a package for housing a semiconductor element according to the present invention. [Description of Signs] 1 ... Insulating base 1a ... Recess 2 ... Metal cover 3 ... Semiconductor element 4 ... Metalized wiring layer 6 ... External lead terminal 7 ···· Frame-shaped metallized metal layer 8 ··· Metal frame 9 ··· Brazing material

Claims (1)

(57)【特許請求の範囲】 【請求項1】上面に半導体素子を収容するための凹部
と、該凹部を囲繞する枠状のメタライズ金属層を有し、
ガラス成分を含有する絶縁基体と、前記枠状のメタライ
ズ金属層にロウ付けされる金属枠体と、前記金属枠体に
取着される金属製蓋体とから成る半導体素子収納用パッ
ケージであって、前記枠状のメタライズ金属層を60.0乃
至80.0重量%のタングステンと20.0乃至40.0重量%のモ
リブデンと0.2乃至2.0重量%の酸化マンガンとで形成
、該酸化マンガンにより前記絶縁基体の前記ガラス成
分を前記枠状のメタライズ金属層に浸透吸収させている
ことを特徴とする半導体素子収納用パッケージ。
(57) and [Claims 1. A recess for accommodating the semiconductor element on the upper surface, the frame-shaped metallized metal layer surrounding the recess possess,
A semiconductor device housing package comprising: an insulating base containing a glass component ; a metal frame brazed to the frame-shaped metallized metal layer; and a metal lid attached to the metal frame. The frame-shaped metallized metal layer is formed of 60.0 to 80.0% by weight of tungsten, 20.0 to 40.0% by weight of molybdenum and 0.2 to 2.0% by weight of manganese oxide, and the manganese oxide is used to form the glass substrate of the insulating substrate.
The semiconductor element storage package characterized in that the components are permeated and absorbed in the frame-shaped metallized metal layer .
JP26399694A 1994-10-27 1994-10-27 Package for storing semiconductor elements Expired - Fee Related JP3426741B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26399694A JP3426741B2 (en) 1994-10-27 1994-10-27 Package for storing semiconductor elements

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26399694A JP3426741B2 (en) 1994-10-27 1994-10-27 Package for storing semiconductor elements

Publications (2)

Publication Number Publication Date
JPH08125052A JPH08125052A (en) 1996-05-17
JP3426741B2 true JP3426741B2 (en) 2003-07-14

Family

ID=17397103

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Link
JP (1) JP3426741B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7244712B2 (en) * 2021-03-19 2023-03-22 Ngkエレクトロデバイス株式会社 package

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