JPH07114214B2 - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPH07114214B2
JPH07114214B2 JP62193957A JP19395787A JPH07114214B2 JP H07114214 B2 JPH07114214 B2 JP H07114214B2 JP 62193957 A JP62193957 A JP 62193957A JP 19395787 A JP19395787 A JP 19395787A JP H07114214 B2 JPH07114214 B2 JP H07114214B2
Authority
JP
Japan
Prior art keywords
film
bonding pad
semiconductor device
tin
bpsg
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP62193957A
Other languages
English (en)
Other versions
JPS6437031A (en
Inventor
久雄 桝田
修一 大坂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62193957A priority Critical patent/JPH07114214B2/ja
Priority to US07/227,833 priority patent/US4916397A/en
Publication of JPS6437031A publication Critical patent/JPS6437031A/ja
Publication of JPH07114214B2 publication Critical patent/JPH07114214B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165—Reinforcing structures
    • H01L2224/02166—Collar structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05075—Plural internal layers
    • H01L2224/0508—Plural internal layers being stacked
    • H01L2224/05083—Three-layer arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05166—Titanium [Ti] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/05186—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2224/05187—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
    • H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48617—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950 °C
    • H01L2224/48624—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01022—Titanium [Ti]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01027—Cobalt [Co]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0104—Zirconium [Zr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01042—Molybdenum [Mo]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01072—Hafnium [Hf]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01073—Tantalum [Ta]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01074—Tungsten [W]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049—Nitrides composed of metals from groups of the periodic table
    • H01L2924/0494—4th Group
    • H01L2924/04941—TiN

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置に関し、特に半導体素子上のボンデ
ィングパッドの構造に関するものである。
〔従来の技術〕
従来のこの種の半導体装置のボンディングパッド部分の
断面および平面を第３図，第４図に示す。第３図，第４
図において、回路素子が組み込まれたシリコン基板１上
にフィールド酸化膜（以下「SiO2膜」という）２を形成
し、さらにポリシリコン膜３およびタングステンシリサ
イド膜（以下「WSi膜」という）４を形成、パターニン
グする。このWSi膜４の上にリン，ホウ素のうち少なく
とも１種以上を含有する二酸化珪素膜（以下「BPSG膜」
という）５を形成し、このBPSG膜５上に蒸着などにより
チタンナイトライド膜（以下「TiN膜」という）６およ
びアルミニウム膜（以下「Al膜」という）７を形成す
る。そして、このTiN膜６とAl膜７をパターニングした
後、絶縁保護膜８を被着してそのAl膜７上のボンディン
グパッド部分のみを開孔させることにより、この開孔さ
れたAl膜７をボンディングパッドとして金などのリード
線（図示せず）にてボンディングするものとなってい
る。第３図，第４図中8aは絶縁保護膜８に設けられた開
孔部である。
〔発明が解決しようとする問題点〕
しかし、従来の半導体装置は以上のような構造を有して
いるので、次の，に示すような問題があった。
BPSG膜５とTiN膜６との密着力（接合力）が低いた
め、ボンディング時に両膜間ではく離しやすい。
BPSG膜５中の不純物、特にリン，ホウ素のAl膜７中
への拡散が起こりやすく、この不純物の影響による初期
ボンディング性の低下あるいは金−Al合金層の高温時の
早期劣化、水分の侵入により酸類が発生してAlを腐食さ
せる耐食性不良現象などを引き起こす。
本発明はこのような点に鑑みてなされたものであり、そ
の目的とするところは、ボンディングパッド下地のTiN
膜とその下層の膜（従来の技術ではBPSG膜５）との密着
力を上げ、ボンディング初期のTiN膜と下層の膜とのは
く離をなくし、Al膜への不純物の拡散を抑制することに
より、信頼性を向上させた半導体装置を提供することに
ある。
〔問題点を解決するための手段〕
このような目的を達成するために本発明は、シリコン基
板上に形成されたフィールド酸化膜の表面に内部配線の
ゲートと同時にポリシリコン膜および金属シリサイド膜
を順に形成し、金属シリサイド膜の上にリン，ホウ素の
うち少なくとも１種以上を含有する二酸化珪素膜を形成
し、この二酸化珪素膜のボンディングパッドの個所だけ
エッチングにより除去しその個所に金属ナイトライド膜
およびアルミニウム膜を順に形成してボンディングパッ
ドとするようにしたものである。
〔作用〕
本発明による半導体装置においては、金属ナイトライド
膜と下層の膜との密着力が上がり、またアルミニウム膜
中への不純物の拡散を抑制することができる。
〔実施例〕
第１図は本発明に係わる半導体装置の一実施例のボンデ
ィングパッド部分を示す断面図であり、第２図はその平
面図である。本実施例では、下層から順に、シリコン基
板１上に形成または形成後パターニングされたSiO2膜2,
ポリシリコン膜3,WSi膜４の上にさらにBPSG膜５を形成
する。そして、このBPSG膜５のボンディングパッド部分
のみをエッチングにより除去して開孔部5aを形成した
後、開孔部5aを含むBPSG膜５上にTiN膜６およびAl膜７
を被着する。次いで、TiN膜６とAl膜７を所定形状にパ
ターニングした後、その上に絶縁保護膜８を被着して、
この膜のボンディングパッドとなる部分を開孔させて開
孔部8aを形成させることにより、第１図に示すように、
Al膜７の周囲部を絶縁保護膜にて被覆せしめて、このAl
膜７をボンディングパッドとして構成したものである。
このように、上記実施例によると、SiO2膜２とTiN膜６
＋Al膜７との間に内部配線のゲートと同時にポリシリコ
ン膜３とWSi膜４を形成し、ボンディングパッドとして
のTiN膜６＋Al膜７の下にはBPSG膜５が存在しないよう
にしたので、TiN膜６＋Al膜７とBPSG膜５との接触する
部分が少なくなり、TiN膜６と下層の膜すなわちWSi膜４
との密着力が上がり、またAl膜７中への不純物の拡散を
抑制できる。これによって、TiN膜６とBPSG膜５との密
着力の低さを密着力の高いTiN膜６とWSi膜４との接合に
変えてボンディング初期のはく離をなくし、またBPSG膜
５中の不純物（特にリン，ホウ素）による初期ボンディ
ング性の低下を防止できるとともに、膜の界面を通じて
侵入した水とリン，ホウ素との反応を抑制することがで
きる。さらに、ボンディングパッド部分の金−Al合金層
に悪影響をおよぼすリンの拡散を抑えることができる。
このような効果により長期的信頼性の向上を図ることが
できる。
〔発明の効果〕
以上説明したように本発明は、ボンディングパッドを金
属ナイトライド膜およびアルミニウム膜の下に二酸化珪
素膜が存在しない構造としたことにより、金属ナイトラ
イド膜と下層の膜との密着力が上がり、またアルミニウ
ム膜中への不純物の拡散を抑制できるので、ボンディン
グ性の向上が計れると共に金−アルミニウム接合部の早
期劣化を防止できる効果がある。これによって、半導体
素子の長期信頼性を確保することが可能となる。
【図面の簡単な説明】
第１図は本発明に係わる半導体装置の一実施例のボンデ
ィングパッド部分を示す断面図、第２図は第１図の平面
図、第３図は従来の半導体装置のボンディングパッド部
分を示す断面図、第４図は第３図の平面図である。 １…シリコン基板、２…フィールド酸化膜、３…ポリシ
リコン膜、４…タングステンシリサイド膜、５…二酸化
珪素膜、5a,8a…開孔部、６…チタンナイトライド膜、
７…アルミニウム膜、８…絶縁保護膜。

Claims (2)

    【特許請求の範囲】
  1. 【請求項１】シリコン基板上に形成されたフィールド酸
    化膜の表面に内部配線のゲートと同時にポリシリコン膜
    および金属シリサイド膜を順に形成し、前記金属シリサ
    イド膜の上にリン，ホウ素のうち少なくとも１種以上を
    含有する二酸化珪素膜をボンディングパッドの個所を除
    いて形成し、前記ボンディングパッドの個所に金属ナイ
    トライド膜およびアルミニウム膜を順に形成してボンデ
    ィングパッドしたことを特徴とする半導体装置。
  2. 【請求項２】金属シリサイド膜はタングステンシリサイ
    ド膜であり、金属ナイトライド膜はチタンナイトライド
    膜であることを特徴とする特許請求の範囲第１項記載の
    半導体装置。
JP62193957A 1987-08-03 1987-08-03 半導体装置 Expired - Fee Related JPH07114214B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP62193957A JPH07114214B2 (ja) 1987-08-03 1987-08-03 半導体装置
US07/227,833 US4916397A (en) 1987-08-03 1988-08-03 Semiconductor device with bonding pad

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62193957A JPH07114214B2 (ja) 1987-08-03 1987-08-03 半導体装置

Publications (2)

Publication Number Publication Date
JPS6437031A JPS6437031A (en) 1989-02-07
JPH07114214B2 true JPH07114214B2 (ja) 1995-12-06

Family

ID=16316572

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62193957A Expired - Fee Related JPH07114214B2 (ja) 1987-08-03 1987-08-03 半導体装置

Country Status (2)

Country Link
US (1) US4916397A (ja)
JP (1) JPH07114214B2 (ja)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2550248B2 (ja) * 1991-10-14 1996-11-06 株式会社東芝 半導体集積回路装置およびその製造方法
KR950009283B1 (ko) * 1992-08-24 1995-08-18 삼성전자주식회사 반도체장치의 제조방법
JP3262676B2 (ja) * 1993-06-25 2002-03-04 株式会社リコー 半導体装置
US5633196A (en) * 1994-05-31 1997-05-27 Sgs-Thomson Microelectronics, Inc. Method of forming a barrier and landing pad structure in an integrated circuit
US5956615A (en) * 1994-05-31 1999-09-21 Stmicroelectronics, Inc. Method of forming a metal contact to landing pad structure in an integrated circuit
US5945738A (en) * 1994-05-31 1999-08-31 Stmicroelectronics, Inc. Dual landing pad structure in an integrated circuit
US5702979A (en) * 1994-05-31 1997-12-30 Sgs-Thomson Microelectronics, Inc. Method of forming a landing pad structure in an integrated circuit
US5661081A (en) * 1994-09-30 1997-08-26 United Microelectronics Corporation Method of bonding an aluminum wire to an intergrated circuit bond pad
US5705427A (en) * 1994-12-22 1998-01-06 Sgs-Thomson Microelectronics, Inc. Method of forming a landing pad structure in an integrated circuit
JP4156044B2 (ja) * 1994-12-22 2008-09-24 エスティーマイクロエレクトロニクス，インコーポレイテッド 集積回路におけるランディングパッド構成体の製造方法
US5719071A (en) * 1995-12-22 1998-02-17 Sgs-Thomson Microelectronics, Inc. Method of forming a landing pad sturcture in an integrated circuit
JP3168400B2 (ja) * 1996-01-19 2001-05-21 日本プレシジョン・サーキッツ株式会社 半導体装置および半導体装置の製造方法
JP3304754B2 (ja) * 1996-04-11 2002-07-22 三菱電機株式会社 集積回路の多段埋め込み配線構造
JP3327244B2 (ja) 1999-03-12 2002-09-24 日本電気株式会社 半導体装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3609470A (en) * 1968-02-19 1971-09-28 Ibm Semiconductor devices with lines and electrodes which contain 2 to 3 percent silicon with the remainder aluminum
JPS5921034A (ja) * 1982-07-27 1984-02-02 Toshiba Corp 半導体装置
JPS605560A (ja) * 1983-06-23 1985-01-12 Fujitsu Ltd 半導体装置
JPS609159A (ja) * 1983-06-29 1985-01-18 Fujitsu Ltd 半導体装置
JPS6057646A (ja) * 1983-09-08 1985-04-03 Seiko Epson Corp 半導体装置
US4566026A (en) * 1984-04-25 1986-01-21 Honeywell Inc. Integrated circuit bimetal layer

Also Published As

Publication number Publication date
US4916397A (en) 1990-04-10
JPS6437031A (en) 1989-02-07

Similar Documents

Publication Publication Date Title
US5834365A (en) Method of forming a bonding pad
US5707894A (en) Bonding pad structure and method thereof
JPH07114214B2 (ja) 半導体装置
US7244635B2 (en) Semiconductor device and method of manufacturing the same
JPH06105726B2 (ja) 半導体集積回路装置
JP2001015549A (ja) 半導体装置およびその製造方法
JPH05218021A (ja) 半導体装置
JP2772606B2 (ja) 集積半導体デバイス上にバンプ構造を形成する方法
JPH0582581A (ja) 半導体装置の製造方法
US7163884B2 (en) Semiconductor device and fabrication method thereof
JP2848694B2 (ja) 半導体装置
JPH11121458A (ja) 半導体装置
JP4740536B2 (ja) 半導体装置およびその製造方法
JP2987905B2 (ja) 半導体装置
JPH06333977A (ja) 半導体装置及びその製造方法
JPH05175196A (ja) 半導体装置の配線構造
JPS6367751A (ja) 半導体装置
JP2000357701A (ja) 半導体装置及びその製造方法
JPH04171835A (ja) 樹脂封止型半導体装置
JPH05251497A (ja) 半導体装置
JP2947800B2 (ja) 半導体装置
JPS5937576B2 (ja) 半導体装置
JPH03159125A (ja) 半導体装置
JPH03190240A (ja) 半導体装置の製造方法
JPS63252445A (ja) 半導体装置の製造方法

Legal Events

Date Code Title Description
S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

LAPS Cancellation because of no payment of annual fees