JPH03190181A - Planar emission laser and manufacture thereof - Google Patents
Planar emission laser and manufacture thereofInfo
- Publication number
- JPH03190181A JPH03190181A JP33080389A JP33080389A JPH03190181A JP H03190181 A JPH03190181 A JP H03190181A JP 33080389 A JP33080389 A JP 33080389A JP 33080389 A JP33080389 A JP 33080389A JP H03190181 A JPH03190181 A JP H03190181A
- Authority
- JP
- Japan
- Prior art keywords
- etching
- active layer
- semiconductor
- substrate
- mask
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 239000004065 semiconductor Substances 0.000 claims abstract description 68
- 238000005530 etching Methods 0.000 claims abstract description 56
- 239000000758 substrate Substances 0.000 claims abstract description 30
- 238000000034 method Methods 0.000 claims abstract description 11
- 230000001678 irradiating effect Effects 0.000 claims description 3
- 230000010355 oscillation Effects 0.000 abstract description 10
- 238000002347 injection Methods 0.000 abstract description 3
- 239000007924 injection Substances 0.000 abstract description 3
- 239000010410 layer Substances 0.000 description 50
- 239000000463 material Substances 0.000 description 8
- 238000010884 ion-beam technique Methods 0.000 description 7
- 230000003287 optical effect Effects 0.000 description 6
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 238000001312 dry etching Methods 0.000 description 3
- 230000020169 heat generation Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 125000005842 heteroatom Chemical group 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Landscapes
- Semiconductor Lasers (AREA)
Abstract
Description
【発明の詳細な説明】 （産業上の利用分野） 本発明は、面発光レーザとその製造方法に関する。[Detailed description of the invention] (Industrial application field) The present invention relates to a surface emitting laser and a method for manufacturing the same.
（従来の技術）
将来の光コンピュータ、光演算回路では、マトリクス状
に発光デバイスが集積された光集積回路が必要とされて
いる。これに適する光源として、面発光レーザが盛んに
研究開発されている。この−例として、Ｊ、 Ｌ、 Ｊ
ｅｗｅ１１氏らの発表した面発光レーザ（第７回光集積
および光通信国際会議（ＩｎｔｅｇｒａｔｅｄＯｐｔｉ
ｃｓ ａｎｄ ０ｐｔｉｃａｌ Ｆｉｂｅｒ Ｃｏｍｍ
ｕｎｉｃａｔｉｏｎＩｎｔｅｒｎａｔｉｏｎａｌ Ｃｏ
ｎｆｅｒｅｎｃｅ）テクニカルダイジェストｖｏｌ、
５ ｐ８−ｐ９）がある。このｌｐｍ〜５μｍ角のマイ
クロサイズの面発光レーザでは、発振電流１ｍＡ程度の
低消費電力で発振する事に成功している。(Prior Art) Future optical computers and optical arithmetic circuits will require optical integrated circuits in which light emitting devices are integrated in a matrix. As a light source suitable for this purpose, surface emitting lasers are being actively researched and developed. This - as an example, J, L, J
surface-emitting laser presented by Mr. ewe11 et al. (7th International Conference on Optical Integration and Optical Communications (Integrated Opti
cs and 0ptical Fiber Comm
international co
nference) Technical Digest vol.
5 p8-p9). This micro-sized surface emitting laser of lpm to 5 μm square has successfully oscillated with a low power consumption of about 1 mA of oscillation current.
（発明が解決しようとする課題）
しかしながら前述の従来の面発光レーザでは素子サイズ
が小さいため直列抵抗が２にΩ以上と高くなり高速変調
への適用が困難という問題があった。(Problems to be Solved by the Invention) However, the above-mentioned conventional surface emitting laser has a problem in that the device size is small and the series resistance is as high as 2Ω or more, making it difficult to apply it to high-speed modulation.
その理由は従来の面発光レーザにおいては素子サイズが
小さいために電極抵抗及び半導体バルク抵抗の両方が増
大していたからである。例えば、素子がｌｐｍ径、接触
抵抗Ｐｅ＝１×１０−５Ωｃｍ”では電極抵抗Ｒｃ＝１
．３にΩと大きくなる。又、半導体のバルク抵抗ＲＢは
ｌｐｍ径、活性層までの距離２ｐｍＰＢ＝０．１Ωｃｍ
の場合、２．５にΩとなり大きな値である。以上の大き
な抵抗となる主たる原因は最初に述べた様に、ｌｐｍサ
イズの素子面積にある。そこで、単純に素子サイズを大
きくする改善策が考えられるが、これは素子における発
振閾値の上昇消費電力の増大や発熱量の増加を招くため
好ましくない。The reason for this is that in conventional surface emitting lasers, both electrode resistance and semiconductor bulk resistance have increased due to the small element size. For example, if the element has lpm diameter and contact resistance Pe = 1 x 10-5 Ωcm, electrode resistance Rc = 1
．． It increases to 3Ω. Also, the bulk resistance RB of the semiconductor is lpm diameter, distance to the active layer 2pmPB = 0.1Ωcm
In this case, the value becomes 2.5Ω, which is a large value. As mentioned above, the main reason for the above-mentioned large resistance is the lpm-sized element area. Therefore, a possible improvement measure is to simply increase the element size, but this is not preferable because it increases the oscillation threshold of the element, increases power consumption, and increases heat generation.
このように従来の面発光レーザでは消費電力を低くする
ために活性層の電流注入面積を小さくし低閾値化を図っ
ているが、このために電極や電流経路となる半導体層の
面積も小さくなるため電極抵抗や半導体のバルク抵抗が
高くなるという欠点があった。そのため高速変調特性が
良くなかった。In this way, in conventional surface emitting lasers, in order to reduce power consumption, the current injection area of the active layer is made smaller to lower the threshold value, but this also reduces the area of the semiconductor layer that serves as the electrode and current path. Therefore, there was a drawback that the electrode resistance and the bulk resistance of the semiconductor increased. Therefore, high-speed modulation characteristics were not good.
本発明の目的は発振しきい値電流が低くかつ直列抵抗が
小さく、高速変調特性の良好な面発光レーザとそれを歩
留り良く製造する方法を提供することにある。An object of the present invention is to provide a surface emitting laser with a low oscillation threshold current, low series resistance, and good high-speed modulation characteristics, and a method for manufacturing the same with high yield.
（課題を解決するための手段）
本発明の面発光レーザは半導体基板上に第１導電型の第
１半導体多層反射膜と、少なくとも１つの活性層を有す
る活性層構造と、第２導電型の第２半導体多層反射膜と
を備えた半導体柱を有し、該半導体柱は前記活化層構造
の近傍でくびれを有していることを特徴とする。あるい
はこの面発光レーザにおいて前記半導体柱の上面の断面
積が前記くびれの前記基板面に平行な断面積の２倍以上
であることを特徴とする。(Means for Solving the Problems) A surface emitting laser of the present invention has an active layer structure including a first semiconductor multilayer reflective film of a first conductivity type, at least one active layer, and a semiconductor multilayer structure of a second conductivity type on a semiconductor substrate. The semiconductor pillar includes a second semiconductor multilayer reflective film, and the semiconductor pillar has a constriction near the activation layer structure. Alternatively, in this surface emitting laser, the cross-sectional area of the upper surface of the semiconductor column is at least twice the cross-sectional area of the constriction parallel to the substrate surface.
本発明の面発光レーザの製造方法は半導体基板上に第１
導電型の第１半導体多層反射膜を形成する工程とこの第
１半導体多層反射膜上に少なくとも１つ以上の活性層を
含む活性層構造を形成する工程とこの活性層構造の上に
第２導電型の第２半導体多層反射膜を形成する工程とこ
の半導体多層構造の上部にマスクを形成する工程・と前
記半導体基板を連続的あるいは断続的に回転しながら前
記基板面に対して垂直から傾けた方向からエツチングビ
ームを照射してエツチングし前記活性層構造近傍でくび
れを有する半導体柱を形成する工程とを備えることを特
徴とする。The method for manufacturing a surface emitting laser according to the present invention includes a method for manufacturing a surface emitting laser in which a first
A step of forming a conductive type first semiconductor multilayer reflective film, a step of forming an active layer structure including at least one active layer on the first semiconductor multilayer reflective film, and a step of forming a second conductive layer structure on the active layer structure. a step of forming a second semiconductor multilayer reflective film in the mold; a step of forming a mask on the top of the semiconductor multilayer structure; and a step of tilting the semiconductor substrate from perpendicular to the substrate surface while rotating the semiconductor substrate continuously or intermittently. The method is characterized by comprising a step of etching by irradiating an etching beam from a direction to form a semiconductor pillar having a constriction in the vicinity of the active layer structure.
（作用）
課題を解決するには、活性層部の面積は小さくしたまま
電極や電流経路の面積を大きくすることが必要である。(Function) To solve the problem, it is necessary to increase the area of the electrodes and current paths while keeping the area of the active layer portion small.
これは、活性層近傍でくびれをもつ半導体柱を形成しそ
の上面に電極を形成することにより可能となる。This can be achieved by forming a semiconductor column with a constriction near the active layer and forming an electrode on the top surface of the semiconductor column.
またこのようなくびれを持つ半導体柱を制御性、再現性
歩留り良く形成する方法は従来なかつた。湿式エツチン
グではくびれを持つ形状を作るには材料、エツチング液
の選択性に依るので、材料が限定され、また所定の形を
自由に作ることはできなかった。更に形状の制御性、再
現性が乏しいので歩留りが低い欠点があった。また従来
のイオンビームエツチング等のドライエツチングでは基
板面にほぼ垂直な方向からビームをあてているため、マ
スクとほぼ同じ形状の半導体柱となっていた。従ってく
びれをもつような半導体柱は形成できなかった。Furthermore, there has been no conventional method for forming semiconductor columns having such constrictions with good controllability, reproducibility, and yield. In wet etching, creating a shape with a constriction depends on the selectivity of the material and etching solution, so the materials are limited and it is not possible to freely create a predetermined shape. Furthermore, the controllability and reproducibility of the shape is poor, resulting in a low yield. Furthermore, in conventional dry etching such as ion beam etching, the beam is applied from a direction substantially perpendicular to the substrate surface, resulting in semiconductor pillars having substantially the same shape as the mask. Therefore, semiconductor columns with constrictions could not be formed.
本発明の作用について第１図を用いて説明する。The operation of the present invention will be explained using FIG. 1.
第１図は面発光レーザ用ダブルへテロ（ＤＨ）ウェハー
を反応用イオンビームエツチングを用いてメサ形状の半
導体柱１２を作る工程を示している。エツチングは指向
性のあるドライエツチングであれば何でもよい。エツチ
ング用マスク１１を表面に形成した半導体基板１の面に
図に示したθの入射角１０でエツチングビーム８を照射
してエツチングする。このエツチング中に基板１又は基
板１を固定しているホルダーを半導体基板面に垂直な方
向を軸とじて連続あるいは断続的に回転することにより
、マスク１１の下に半導体柱１２を形成する。FIG. 1 shows the process of forming mesa-shaped semiconductor pillars 12 using reactive ion beam etching on a double hetero (DH) wafer for a surface emitting laser. Any directional dry etching may be used as the etching. The surface of the semiconductor substrate 1 on which the etching mask 11 is formed is etched by irradiating the etching beam 8 at an incident angle 10 of θ shown in the figure. During this etching, the substrate 1 or the holder fixing the substrate 1 is rotated continuously or intermittently about a direction perpendicular to the surface of the semiconductor substrate, thereby forming semiconductor pillars 12 under the mask 11.
この半導体柱１２はマスク１１が円形でエツチング中に
連続して回転すれば円錐に、またマスク１１を四角にし
て一定エッチング時間ごとに９０度回転することにより
四角錐状に形成することもできる。The semiconductor pillars 12 can be formed into a conical shape if the mask 11 is circular and rotated continuously during etching, or can be formed into a square pyramid shape by making the mask 11 square and rotating 90 degrees at every fixed etching time.
同様に多角形の錐状の形も形成される。この錐状の半導
体柱１２は途中にくびれをもち、そのくびれの位置は入
射角１０の大きさθとエツチング量により決まる。メサ
側面はマスク１１がら離れたところに比ベイオビームの
照射量が少ないのでくびれができる。メサの上部は入射
角で決まる逆メサ状の錐形になりくびれの位置から下部
はまた広くなる。Similarly, polygonal cone-like shapes are also formed. This conical semiconductor column 12 has a constriction in the middle, and the position of the constriction is determined by the magnitude θ of the incident angle 10 and the amount of etching. On the side of the mesa, a constriction is formed in the area far from the mask 11 because the amount of irradiation of the biobeam is small. The upper part of the mesa has an inverted mesa-like conical shape determined by the angle of incidence, and the lower part becomes wider from the constriction point.
くびれの位置は同じ深さのエツチングに対し入射角度が
大きい程上方になる。また同じ入射角度ならエツチング
量が多い程下方にくびれが形成される。ドライエツチン
グのエツチング量は制御性、再現性が良いので、エツチ
ングガスの種類、圧力等のエツチング条件を決めれば入
射角度とエツチング時間により第１図に示したマスクか
ら離れた部分のエツチング深さ１３や半導体柱１２のく
びれの位置のマスクからの深さｄを制御することができ
る。The position of the constriction becomes higher as the angle of incidence increases for etching of the same depth. Furthermore, if the incident angle is the same, the larger the amount of etching, the more a constriction is formed downward. The amount of etching in dry etching has good controllability and reproducibility, so if the etching conditions such as the type of etching gas and pressure are determined, the etching depth of the part away from the mask shown in Figure 1 can be adjusted depending on the incident angle and etching time. It is also possible to control the depth d of the constriction position of the semiconductor pillar 12 from the mask.
更に面内均一性も良いので高歩留りが得られる。Furthermore, since the in-plane uniformity is good, a high yield can be obtained.
本発明の面発光レーザの製造工程においては、結晶成長
によって作製されたウェハーの活性層位置をあらかじめ
知ることができるので、エツチングビームの入射角度を
決めておけばくびれの位置をエツチング深さ１３（即ち
エツチング時間）で制御できる。面発光レーザの活性層
構造３の位置をこのくびれの位置となるようにすれば、
発光領域となるこの活性層の電流注入面積を小さくでき
、同時にマスク１１を形成した半導体表面に電極２ｏを
形成すると、活性層に比べ電極面積が十分大きくできる
。従って電極抵抗が下がる。また電流経路となる半導体
柱１２の断面積も実効的に大きくとれるのでこの部分の
バルク抵抗を小さくできる。しかも活性層の面積が小さ
いので発振閾値電流も小さくできる。例えば活性層構造
３を直径１ｐｍのくびれ部分に形成し、ここから表面ま
での厚さ（ｄ）を２ｐｍとし、エツチングビームの入射
角１０、θが３５度のとき電極面積は活性層の面積の約
１４倍となる。この効果により半導体柱の上に形成した
電極抵抗Ｒ６は１／１４、この電極と活性層の間の電流
経路の半導体層のバルク抵抗ＲＢは１／３以下となる。In the manufacturing process of the surface emitting laser of the present invention, the position of the active layer of the wafer fabricated by crystal growth can be known in advance, so by determining the incident angle of the etching beam, the constriction position can be etched to an etching depth of 13 ( In other words, it can be controlled by the etching time). If the active layer structure 3 of the surface emitting laser is positioned at this constriction,
If the current injection area of this active layer serving as a light emitting region can be made small, and at the same time the electrode 2o is formed on the semiconductor surface on which the mask 11 is formed, the electrode area can be made sufficiently larger than that of the active layer. Therefore, electrode resistance decreases. Furthermore, since the cross-sectional area of the semiconductor pillar 12 serving as a current path can be effectively increased, the bulk resistance of this portion can be reduced. Moreover, since the area of the active layer is small, the oscillation threshold current can also be reduced. For example, when the active layer structure 3 is formed in a constricted part with a diameter of 1 pm, the thickness (d) from this to the surface is 2 pm, the incident angle of the etching beam is 10, and θ is 35 degrees, the electrode area is the area of the active layer. Approximately 14 times more. Due to this effect, the resistance R6 of the electrode formed on the semiconductor pillar becomes 1/14, and the bulk resistance RB of the semiconductor layer in the current path between this electrode and the active layer becomes 1/3 or less.
この２つの抵抗ＲｃとＲＢをあわせた直列抵抗は従来の
１／３〜１／４となる。また活性層構造３より下の半導
体層は図のような末広がりの形状になるので同様にここ
のバルク抵抗も小さくできる。これにより低発振しきい
値低消費電力でかつ従来より高速の変調が可能となる。The combined series resistance of these two resistors Rc and RB is 1/3 to 1/4 of the conventional resistance. Further, since the semiconductor layer below the active layer structure 3 has a shape that widens towards the end as shown in the figure, the bulk resistance there can be similarly reduced. This makes it possible to perform modulation at a lower oscillation threshold, lower power consumption, and at a higher speed than before.
また−例として活性層を６ｐｍ径として電極面積を活性
層の断面積の２倍とした場合は電極抵抗人が約１／２倍
バルク抵抗ＲＢが０．５〜０．６倍程度となり、２つの
和では従来の１／２以下となる。これにより従来の約２
倍の高速変調が可能となりまた熱抵抗が小さくなるので
、発熱の問題や信頼性等も改善される。For example, if the active layer has a diameter of 6 pm and the electrode area is twice the cross-sectional area of the active layer, the electrode resistance will be approximately 1/2, and the bulk resistance RB will be approximately 0.5 to 0.6 times, 2 The sum of the two is less than 1/2 of the conventional value. This allows about 2
Since it becomes possible to perform twice as high-speed modulation and to reduce thermal resistance, problems such as heat generation and reliability are also improved.
このように本発明によれば抵抗を小さくできるので高速
変調が可能となり低消費電力でかつ高速動作の面発光レ
ーザが高歩留りで得られる。As described above, according to the present invention, since the resistance can be reduced, high-speed modulation is possible, and a surface-emitting laser with low power consumption and high-speed operation can be obtained with high yield.
（実施例）
次に本発明の実施例について図面を用いて詳細に説明す
る。第１図は本発明の一実施例の製造方法におけるエツ
チング工程を示す口笛２図は本発明の実施例により作製
された面発光レーザの断面図である。(Example) Next, an example of the present invention will be described in detail using the drawings. FIG. 1 shows an etching step in a manufacturing method according to an embodiment of the present invention; FIG. 2 is a sectional view of a surface emitting laser manufactured according to an embodiment of the present invention.
まずｎ型−ＧａＡｓ半導体基板１上にｎ型ＡｌＡｓ８０
２人／ｎ型ＧａＡｓ６７０人の２３周期からなる第１半
導体多層反射膜２、ＡＩｏ、５Ｇａ□、５Ａｓ１４３０
Ａ／Ｉｎ□、２Ｇａ□、ＢＡｓ１００Ａ／ＡＩｏ、５Ｇ
ａ□、５Ａｓ１４３０人からなる活性層構造３、Ｐ型Ｇ
ａＡｓ６７０人Ｐ型ＡｌＡｓ８０２人１０周期の第２半
導体多層反射鏡４、ｐ＋型ＧａＡｓ３０人のキャップ層
５を結晶成長する。ここで活性層構造３内部のＩｎ□、
２Ｇａ□、ＢＡｓ層は正単一量子井戸の活性層である。First, an n-type AlAs80 layer is placed on an n-type GaAs semiconductor substrate 1.
First semiconductor multilayer reflective film 2 consisting of 23 periods of 2 people/n-type GaAs 670 people, AIo, 5Ga□, 5As1430
A/In□, 2Ga□, BAs100A/AIo, 5G
a□, active layer structure 3 consisting of 1430 5As, P type G
A second semiconductor multilayer reflector 4 of 670 aAs and 802 p-type AlAs with 10 periods, and a cap layer 5 of 30 p+-type GaAs are crystal-grown. Here, In□ inside the active layer structure 3,
The 2Ga□, BAs layer is an active layer of a positive single quantum well.
次に第１図に示す様に、マスク１１を通常のホトリソグ
ラフィ技術によって形成する。マスク材料としてはエツ
チング時に半導体材料とのエツチング選択比が大きいも
のならば良い。例えばホトレジスト、５ｉ０２、金等を
用いる事ができる。次にエツチング方法は反応性イオン
ビームエツチングやイオンビームエツチング等の指向性
のあるもので良い。ここではＣ１−イオンビームを用い
た。第１図に示すようにエツチングビーム８を半導体基
板１に対して傾けて入射させ、かつ半導体基板１を回転
させると活性層構造３近傍でくびれを有する構造を得る
。ここではマスクは円形どし、基板１はエツチング中連
続して一様に回転した。マスク径Ｄ２と活性層構造径Ｄ
□の間には
Ｄ２−ＤＩ ＝２ｄｔａｎｅ
（１）の関係がある。ここでｄは活性層構造３か
らキャップ層４までの厚さ、θは第１図のエツチングビ
ームの入射角１０である。従ってＤ２−Ｄｌを小さくす
るにはｄを大きくし０を小さくすれば良い。例えばＤ１
＝１ｐｍ径θ＝３５度、ｄ＝２ｐｍの場合にはＤ２＝３
．８ｐｍとなって３．８μｍ径のマスクを用意すれば良
いこととなる。この場合には活性層構造３の面積に対し
てキャップ層５表面の面積は１４倍となる。従ってこの
条件でエツチングし、くびれの位置の近傍に活性層構造
３がくるようにした。最後に第２図に示す様にＰ型電極
２０および基板１の裏面に半導体柱１２に対向する部分
を除いて、ｎ型電極２１を形成した。この面発光レーザ
の発振光の波長は、活性層構造３の内部の歪単一量子井
戸活性層（Ｉｎ□、２Ｇａ□、ＢＡＳ）で決まり約９５
００人である。そのため発振光２２は半導体基板１の吸
収を受けずに半導体基板１側より取り出すことができる
。Next, as shown in FIG. 1, a mask 11 is formed using a conventional photolithography technique. The mask material may be any material that has a high etching selectivity with respect to the semiconductor material during etching. For example, photoresist, 5i02, gold, etc. can be used. Next, the etching method may be a directional method such as reactive ion beam etching or ion beam etching. Here, a C1- ion beam was used. As shown in FIG. 1, when the etching beam 8 is incident on the semiconductor substrate 1 at an angle and the semiconductor substrate 1 is rotated, a structure having a constriction near the active layer structure 3 is obtained. Here the mask was circular and the substrate 1 was rotated continuously and uniformly during etching. Mask diameter D2 and active layer structure diameter D
D2-DI = 2dtane between □
There is the relationship (1). where d is the thickness from the active layer structure 3 to the cap layer 4, and .theta. is the incident angle 10 of the etching beam in FIG. Therefore, in order to decrease D2-Dl, it is sufficient to increase d and decrease 0. For example D1
= 1 pm diameter θ = 35 degrees, if d = 2 pm, D2 = 3
．． 8 pm, so it is sufficient to prepare a mask with a diameter of 3.8 μm. In this case, the area of the surface of the cap layer 5 is 14 times the area of the active layer structure 3. Therefore, etching was carried out under these conditions so that the active layer structure 3 was located near the constriction position. Finally, as shown in FIG. 2, an n-type electrode 21 was formed on the back surface of the p-type electrode 20 and the substrate 1, except for the portion facing the semiconductor pillar 12. The wavelength of the oscillated light of this surface emitting laser is determined by the strained single quantum well active layer (In□, 2Ga□, BAS) inside the active layer structure 3 and is approximately 95
There are 00 people. Therefore, the oscillated light 22 can be extracted from the semiconductor substrate 1 side without being absorbed by the semiconductor substrate 1.
本実施例では、発振閾値電流０．５ｍＡ、素子の直列抵
抗０．９にΩと良好な特性が得られた。以上述べた様に
本発明による本実施例では活性層の面積は小さいにもか
かわらず、電極面積をそれの１０倍以上に大きく出来て
しかも半導体電流通路の面積も平均で３倍以上大きくで
きるため、直列抵抗が小さ〈従来の２倍以上の高速応答
が可能でかつ低消費電力の面発光レーザが実現できる。In this example, good characteristics were obtained with an oscillation threshold current of 0.5 mA and an element series resistance of 0.9 Ω. As described above, in this embodiment according to the present invention, although the area of the active layer is small, the electrode area can be increased by more than 10 times, and the area of the semiconductor current path can also be increased by more than 3 times on average. , a surface-emitting laser with low series resistance, a response more than twice as fast as the conventional one, and low power consumption can be realized.
本実施例では活性層構造として
Ａｌｏ、５Ｇａ□、５Ａｓ／Ｉｎ□、２Ｇａ□、ＢＡｓ
／Ａｌｏ、５Ｇａ□、５Ａｓの単一量子井戸構造を用い
たが材料や構造はこれに限らず多重量子井戸構造や単一
層構造を用いても良い。活性層の材料は発振光の基板に
よる吸収が小さければよい。又本実施例ではキャップ層
をＰ型電極のために用いたが、第２半導体多層反射膜表
面近傍を充分高濃度（ｐ＞１０１９ｃｍ−３）にすれば
キャップ層を設けなくてもｍい。又、Ｐ型電極２０をエ
ツチングの後に形成したが、Ｐ型電極２０をパターニン
グしたものをマスク１１として用いても良い。又、半導
体多層反射膜としてＧａＡｓ６７０人／ＡｌＡｓ８０２
人のものを用いたがこれに限らず発振光の波長λに対し
て異なる屈折率ｎ１． ｎ２を有し、厚みが各々Ａ／４
ｎ１、Ａ／４ｎ２の層の交互積層構造であれば他の組成
及び厚さでも良い。In this example, the active layer structure is Alo, 5Ga□, 5As/In□, 2Ga□, BAs
Although a single quantum well structure of /Alo, 5Ga□, and 5As is used, the material and structure are not limited to these, and a multiple quantum well structure or a single layer structure may be used. The material for the active layer may be one that has low absorption of oscillated light by the substrate. Further, in this embodiment, the cap layer was used for the P-type electrode, but if the concentration near the surface of the second semiconductor multilayer reflective film is made sufficiently high (p>1019 cm-3), it is not necessary to provide the cap layer. Furthermore, although the P-type electrode 20 is formed after etching, a patterned P-type electrode 20 may be used as the mask 11. Also, as a semiconductor multilayer reflective film, GaAs670/AlAs802
The refractive index n1. which differs with respect to the wavelength λ of the oscillation light is not limited to this. n2, each with a thickness of A/4
Other compositions and thicknesses may be used as long as the structure is an alternate stack of layers n1 and A/4n2.
又、本実力市例ではマスクとして円形を用いたがこれに
限らず、四角形等の他の形状においても本発明を適用出
来るのは明らかである。この場合半導体柱は四角錐状退
くびれをもつ形状となる。エツチングビームの入射角は
３５度としたが所望の特性により形状を最適化し、エツ
チング深さや入射角度を設定すれば良い。またエツチン
グ中基板を連続して一様に回転したが、パルス的に連続
して回転しても良い。パルス幅と１パルスでの回転角を
調整することにより所定のエツチング深件に選択できる
。Furthermore, although a circular shape was used as the mask in this practical example, it is obvious that the present invention can be applied to other shapes such as a rectangular shape as well. In this case, the semiconductor pillar has a rectangular pyramid shape with a receding constriction. Although the incident angle of the etching beam was set at 35 degrees, the shape may be optimized depending on desired characteristics, and the etching depth and incident angle may be set. Furthermore, although the substrate was rotated continuously and uniformly during etching, it may also be rotated continuously in a pulsed manner. A predetermined etching depth can be selected by adjusting the pulse width and the rotation angle per pulse.
またエツチング中断続的に所定時間ごとに回転すること
により、多角形の錐状の形を作ることができる。例えば
エツチングマスクを四角の形状として回転角を９０度ご
とに回転すると四角錐状となり、マスクを三角形として
回転角１２０度では三角形錐状とすることができる。Further, by intermittent etching and rotating at predetermined time intervals, a polygonal pyramidal shape can be created. For example, if the etching mask is a square shape and the rotation angle is rotated by 90 degrees, the etching mask becomes a quadrangular pyramid shape, and if the mask is a triangle and the rotation angle is 120 degrees, the etching mask becomes a triangular pyramid shape.
また本実施例では活性層構造を１４ｘｍ径の大きさとし
たが、目的に応じて消費電力、光出力、変調速度、発光
パターン等を考慮して大きさや形状を最適化すれば良い
。Further, in this embodiment, the active layer structure has a diameter of 14 x m, but the size and shape may be optimized depending on the purpose, taking into consideration power consumption, optical output, modulation speed, light emission pattern, etc.
エツチングはＣ１−イオンを用いたが他のイオンを用い
た反応性イオンビームエツチングでもよいし、Ａｒ等を
用いたイオンビームエツチングでも良い。材料と所望の
形状により使い分けることができる。Although C1- ions are used for etching, reactive ion beam etching using other ions or ion beam etching using Ar or the like may be used. It can be used depending on the material and desired shape.
ｎ型電極２１は基板１の裏面に形成したが、半導体柱１
２と同じ側の面に形成しても良い。Although the n-type electrode 21 was formed on the back surface of the substrate 1,
It may be formed on the same side as 2.
（発明の効果）
本発明の面発光レーザとその製造方法によれば、発振し
きい値が低く、低消費電力でかつ従来の２倍以上の高速
変調可能な面発光レーザが歩留り良く得られる。また熱
抵抗が下るので発熱も改善されそれに伴う信頼性も改善
できる。(Effects of the Invention) According to the surface emitting laser and the manufacturing method thereof of the present invention, a surface emitting laser having a low oscillation threshold, low power consumption, and capable of high speed modulation at least twice that of the conventional laser can be obtained with good yield. Furthermore, since the thermal resistance is lowered, heat generation is improved, and reliability can be improved accordingly.
第１図は本発明の一実施例の製造工程の中のエツチング
工程を示す素、第２図は本発明の一実施例によって得ら
れる面発光レーザの断面図である。
図中、１は半導体基板、２は第１半導体多層反射膜、３
は活性層構造、４は第２半導体多層反射膜、５はキャッ
プ層、８はエツチングビーム、９は回転方向、１０は入
射角θ、１１はマスク、１２は半導体柱、１３はエツチ
ング深さ、２０はＰ型電極、２１はｎ型電極、２２は発
振光である。FIG. 1 is a diagram showing an etching step in the manufacturing process according to an embodiment of the present invention, and FIG. 2 is a sectional view of a surface emitting laser obtained according to an embodiment of the present invention. In the figure, 1 is a semiconductor substrate, 2 is a first semiconductor multilayer reflective film, and 3 is a semiconductor substrate.
is an active layer structure, 4 is a second semiconductor multilayer reflective film, 5 is a cap layer, 8 is an etching beam, 9 is a rotation direction, 10 is an incident angle θ, 11 is a mask, 12 is a semiconductor column, 13 is an etching depth, 20 is a P-type electrode, 21 is an N-type electrode, and 22 is an oscillation light.
Claims (3)
膜と、少なくとも１つの活性層を有する活性層構造と、
第２導電型の第２半導体多層反射膜と、を備えた半導体
柱を有し、該半導体柱は前記活性層構造の近傍でくびれ
を有していることを特徴とする面発光レーザ。(1) an active layer structure having a first semiconductor multilayer reflective film of a first conductivity type and at least one active layer on a semiconductor substrate;
a second semiconductor multilayer reflective film of a second conductivity type; and the semiconductor pillar has a constriction near the active layer structure.
上面の断面積が前記くびれの前記基板面に平行な断面積
の２倍以上であることを特徴とする面発光レーザ。(2) The surface-emitting laser according to claim 1, wherein the cross-sectional area of the upper surface of the semiconductor column is at least twice the cross-sectional area of the constriction parallel to the substrate surface.
膜を形成する工程とこの第１半導体多層反射膜上に少な
くとも１つ以上の活性層を含む活性層構造を形成する工
程とこの活性層構造の上に第２導電型の第２半導体多層
反射膜を形成する工程とこの半導体多層構造の上部にマ
スクを形成する工程と前記半導体基板を連続的あるいは
断続的に回転しながら前記基板面に対して垂直から傾け
た方向からエッチングビームを照射してエッチングし前
記活性層構造近傍でくびれを有する半導体柱を形成する
工程とを備えることを特徴とする面発光レーザの製造方
法。(3) a step of forming a first semiconductor multilayer reflective film of a first conductivity type on a semiconductor substrate; a step of forming an active layer structure including at least one active layer on the first semiconductor multilayer reflective film; a step of forming a second semiconductor multilayer reflective film of a second conductivity type on the active layer structure; a step of forming a mask on the top of the semiconductor multilayer structure; A method for manufacturing a surface emitting laser, comprising the step of etching by irradiating an etching beam from a direction tilted from perpendicular to the surface to form a semiconductor column having a constriction near the active layer structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33080389A JPH03190181A (en) | 1989-12-19 | 1989-12-19 | Planar emission laser and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33080389A JPH03190181A (en) | 1989-12-19 | 1989-12-19 | Planar emission laser and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03190181A true JPH03190181A (en) | 1991-08-20 |
Family
ID=18236730
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33080389A Pending JPH03190181A (en) | 1989-12-19 | 1989-12-19 | Planar emission laser and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03190181A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06232494A (en) * | 1993-02-01 | 1994-08-19 | Nec Corp | Plane emitting element and its manufacture |
| WO2009135648A2 (en) * | 2008-05-08 | 2009-11-12 | Universität Ulm | Completely self-adjusted surface-emitting semiconductor laser for surface mounting having optimized properties |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58135690A (en) * | 1981-11-07 | 1983-08-12 | Agency Of Ind Science & Technol | Vertical oscillation type semiconductor laser |
| JPS5936988A (en) * | 1982-08-26 | 1984-02-29 | Agency Of Ind Science & Technol | Vertical oscillation type semiconductor laser |
| JPS6140077A (en) * | 1984-07-31 | 1986-02-26 | Res Dev Corp Of Japan | Buried type surface plane laser oscillator |
| JPS63181381A (en) * | 1987-01-22 | 1988-07-26 | Yokogawa Electric Corp | Manufacture of gaas mesfet |
-
1989
- 1989-12-19 JP JP33080389A patent/JPH03190181A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58135690A (en) * | 1981-11-07 | 1983-08-12 | Agency Of Ind Science & Technol | Vertical oscillation type semiconductor laser |
| JPS5936988A (en) * | 1982-08-26 | 1984-02-29 | Agency Of Ind Science & Technol | Vertical oscillation type semiconductor laser |
| JPS6140077A (en) * | 1984-07-31 | 1986-02-26 | Res Dev Corp Of Japan | Buried type surface plane laser oscillator |
| JPS63181381A (en) * | 1987-01-22 | 1988-07-26 | Yokogawa Electric Corp | Manufacture of gaas mesfet |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06232494A (en) * | 1993-02-01 | 1994-08-19 | Nec Corp | Plane emitting element and its manufacture |
| WO2009135648A2 (en) * | 2008-05-08 | 2009-11-12 | Universität Ulm | Completely self-adjusted surface-emitting semiconductor laser for surface mounting having optimized properties |
| WO2009135648A3 (en) * | 2008-05-08 | 2010-04-22 | Universität Ulm | Completely self-adjusted surface-emitting semiconductor laser for surface mounting having optimized properties |
| JP2011520272A (en) * | 2008-05-08 | 2011-07-14 | ウニヴェルズィテート・ウルム | Fully tuned surface emitting semiconductor laser for surface mounting with optimized properties |
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