JP7472402B2 - クロックソース回路、ケース、及びマルチケースカスケードシステム - Google Patents
クロックソース回路、ケース、及びマルチケースカスケードシステム Download PDFInfo
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- JP7472402B2 JP7472402B2 JP2023517327A JP2023517327A JP7472402B2 JP 7472402 B2 JP7472402 B2 JP 7472402B2 JP 2023517327 A JP2023517327 A JP 2023517327A JP 2023517327 A JP2023517327 A JP 2023517327A JP 7472402 B2 JP7472402 B2 JP 7472402B2
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- Prior art keywords
- reference signal
- clock
- generating circuit
- case
- slot
- Prior art date
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- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 32
- 239000000872 buffer Substances 0.000 claims description 30
- 230000001360 synchronised effect Effects 0.000 claims description 24
- 239000013078 crystal Substances 0.000 claims description 17
- 230000005540 biological transmission Effects 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 9
- 239000010453 quartz Substances 0.000 claims description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 claims 1
- 230000003993 interaction Effects 0.000 description 8
- 238000010586 diagram Methods 0.000 description 6
- 230000010354 integration Effects 0.000 description 5
- 230000008569 process Effects 0.000 description 3
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000011144 upstream manufacturing Methods 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000001627 detrimental effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/06—Clock generators producing several clock signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/0805—Details of the phase-locked loop the loop being adapted to provide an additional control signal for use outside the loop
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/18—Packaging or power distribution
- G06F1/183—Internal mounting support structures, e.g. for printed circuit boards, internal connecting means
- G06F1/186—Securing of expansion boards in correspondence to slots provided at the computer enclosure
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/083—Details of the phase-locked loop the reference signal being additionally directly applied to the generator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Human Computer Interaction (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202011021236.5 | 2020-09-25 | ||
CN202011021236.5A CN112350718B (zh) | 2020-09-25 | 2020-09-25 | 时钟源电路、机箱及多机箱级联*** |
PCT/CN2020/127103 WO2022062094A1 (zh) | 2020-09-25 | 2020-11-06 | 时钟源电路、机箱及多机箱级联*** |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2023541206A JP2023541206A (ja) | 2023-09-28 |
JP7472402B2 true JP7472402B2 (ja) | 2024-04-22 |
Family
ID=74360348
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2023517327A Active JP7472402B2 (ja) | 2020-09-25 | 2020-11-06 | クロックソース回路、ケース、及びマルチケースカスケードシステム |
Country Status (4)
Country | Link |
---|---|
JP (1) | JP7472402B2 (zh) |
KR (1) | KR20230058135A (zh) |
CN (1) | CN112350718B (zh) |
WO (1) | WO2022062094A1 (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114415779A (zh) * | 2021-12-17 | 2022-04-29 | 苏州华兴源创科技股份有限公司 | 机箱触发信号控制方法及机箱控制*** |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009503436A (ja) | 2005-08-03 | 2009-01-29 | 株式会社アドバンテスト | 標準化テスト計測器シャーシ内の回路カード同期 |
CN108494399A (zh) | 2018-03-22 | 2018-09-04 | 苏州瑞迈斯医疗科技有限公司 | 一种时钟分配装置及pet*** |
WO2020057303A1 (zh) | 2018-09-20 | 2020-03-26 | 中兴通讯股份有限公司 | 网卡、时间同步方法和设备及计算机存储介质 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6831490B1 (en) * | 2000-07-18 | 2004-12-14 | Hewlett-Packard Development Company, L.P. | Clock synchronization circuit and method |
GB2480311A (en) * | 2010-05-13 | 2011-11-16 | Univ Bangor | Optical OFDM synchronisation using clock signal transmitted outside OFDM symbol frequency band |
CN102013970B (zh) * | 2010-12-23 | 2013-07-10 | 北京北方烽火科技有限公司 | 时钟同步方法、装置及基站时钟设备 |
CN104836573B (zh) * | 2015-04-30 | 2017-07-28 | 北京空间机电研究所 | 一种超大面阵cmos相机多路高速信号的同步时钟*** |
CN105306047B (zh) * | 2015-10-27 | 2018-08-10 | 中国电子科技集团公司第四十一研究所 | 一种同步时钟参考源及同步时钟参考产生方法 |
CN106788853B (zh) * | 2017-01-26 | 2018-12-07 | 华为技术有限公司 | 一种时钟同步装置及方法 |
CN107547161B (zh) * | 2017-07-03 | 2019-11-08 | 新华三技术有限公司 | 一种时钟同步方法和装置 |
CN209489030U (zh) * | 2018-10-30 | 2019-10-11 | 北京金风科创风电设备有限公司 | 主控机箱和电力电子控制*** |
-
2020
- 2020-09-25 CN CN202011021236.5A patent/CN112350718B/zh active Active
- 2020-11-06 KR KR1020237010495A patent/KR20230058135A/ko unknown
- 2020-11-06 JP JP2023517327A patent/JP7472402B2/ja active Active
- 2020-11-06 WO PCT/CN2020/127103 patent/WO2022062094A1/zh active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009503436A (ja) | 2005-08-03 | 2009-01-29 | 株式会社アドバンテスト | 標準化テスト計測器シャーシ内の回路カード同期 |
CN108494399A (zh) | 2018-03-22 | 2018-09-04 | 苏州瑞迈斯医疗科技有限公司 | 一种时钟分配装置及pet*** |
WO2020057303A1 (zh) | 2018-09-20 | 2020-03-26 | 中兴通讯股份有限公司 | 网卡、时间同步方法和设备及计算机存储介质 |
Also Published As
Publication number | Publication date |
---|---|
CN112350718A (zh) | 2021-02-09 |
WO2022062094A1 (zh) | 2022-03-31 |
JP2023541206A (ja) | 2023-09-28 |
CN112350718B (zh) | 2023-06-27 |
KR20230058135A (ko) | 2023-05-02 |
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