JP7318169B2 - パッケージ基板及びこれを含むチップパッケージ - Google Patents

パッケージ基板及びこれを含むチップパッケージ Download PDF

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Publication number
JP7318169B2
JP7318169B2 JP2019044455A JP2019044455A JP7318169B2 JP 7318169 B2 JP7318169 B2 JP 7318169B2 JP 2019044455 A JP2019044455 A JP 2019044455A JP 2019044455 A JP2019044455 A JP 2019044455A JP 7318169 B2 JP7318169 B2 JP 7318169B2
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Prior art keywords
substrate
cavity
antenna
insulating layers
package
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JP2019044455A
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Japanese (ja)
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JP2020014189A (ja
Inventor
ソン、キ－ジュン
ジ、ユン－ジェ
チョイ、ジェ－ウン
キム、テ－ソン
Original Assignee
サムソン エレクトロ－メカニックス カンパニーリミテッド．
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492—Bases or plates or solder therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6661—High-frequency adaptations for passive devices
    • H01L2223/6677—High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Combinations Of Printed Boards (AREA)
  • Variable-Direction Aerials And Aerial Arrays (AREA)
  • Waveguide Aerials (AREA)
JP2019044455A 2018-07-18 2019-03-12 パッケージ基板及びこれを含むチップパッケージ Active JP7318169B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020180083445A KR102565703B1 (ko) 2018-07-18 2018-07-18 패키지 기판 및 이를 포함하는 칩 패키지
KR10-2018-0083445 2018-07-18

Publications (2)

Publication Number Publication Date
JP2020014189A JP2020014189A (ja) 2020-01-23
JP7318169B2 true JP7318169B2 (ja) 2023-08-01

Family

ID=69170092

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2019044455A Active JP7318169B2 (ja) 2018-07-18 2019-03-12 パッケージ基板及びこれを含むチップパッケージ

Country Status (3)

Country Link
JP (1) JP7318169B2 (ko)
KR (1) KR102565703B1 (ko)
TW (1) TW202017120A (ko)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110911872A (zh) * 2019-12-10 2020-03-24 山东光韵智能科技有限公司 一种自韧化电磁导电触头及其制造方法
JP6985477B1 (ja) * 2020-09-25 2021-12-22 アオイ電子株式会社 半導体装置および半導体装置の製造方法
CN115411510A (zh) * 2021-05-28 2022-11-29 鹏鼎控股(深圳)股份有限公司 天线封装体的制作方法以及天线封装体

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006229871A (ja) 2005-02-21 2006-08-31 Mitsubishi Electric Corp アンテナ装置
JP2010016789A (ja) 2008-07-07 2010-01-21 Internatl Business Mach Corp <Ibm> Ｎ個集積開口部結合型パッチ・アンテナを有する無線周波数集積回路チップ・パッケージ、及びその製造する方法
US20100327068A1 (en) 2009-06-30 2010-12-30 International Business Machines Corporation Compact millimeter wave packages with integrated antennas
US20110063174A1 (en) 2009-09-11 2011-03-17 Samsung Electro-Mechanics Co., Ltd. Patch antenna and wireless communications module
JP2011519517A (ja) 2008-04-14 2011-07-07 インターナショナル・ビジネス・マシーンズ・コーポレーション リング・キャビティ及び／又はオフセット・キャビティにおける集積開口部結合型パッチ・アンテナを有する無線周波数（ｒｆ）集積回路（ｉｃ）パッケージ
US20130189935A1 (en) 2012-01-24 2013-07-25 E I Du Pont De Nemours And Company LOW TEMPERATURE CO-FIRED CERAMIC (LTCC) SYSTEM IN A PACKAGE (SiP) CONFIGURATIONS FOR MICROWAVE/MILLIMETER WAVE PACKAGING APPLICATIONS
US20160049723A1 (en) 2014-08-13 2016-02-18 International Business Machines Corporation Wireless communications package with integrated antennas and air cavity
JP2016048728A (ja) 2014-08-27 2016-04-07 株式会社村田製作所 導電性ポスト、及び、導電性ポストを用いた積層基板の製造方法
CN106374208A (zh) 2016-10-09 2017-02-01 华进半导体封装先导技术研发中心有限公司 高带宽有机基板天线结构和制作方法
WO2018116886A1 (ja) 2016-12-22 2018-06-28 京セラ株式会社 アンテナ基板およびその製造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3266491B2 (ja) * 1996-02-29 2002-03-18 京セラ株式会社 高周波用パッケージ
KR101097076B1 (ko) 2003-04-15 2011-12-22 덴끼 가가꾸 고교 가부시키가이샤 금속 베이스 회로 기판과 그 제조 방법
KR102250997B1 (ko) * 2014-05-02 2021-05-12 삼성전자주식회사 반도체 패키지
KR102281452B1 (ko) * 2014-11-20 2021-07-27 삼성전기주식회사 전자부품 내장 인쇄회로기판 및 그 제조방법
JP6591909B2 (ja) * 2015-07-27 2019-10-16 京セラ株式会社 アンテナモジュール

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006229871A (ja) 2005-02-21 2006-08-31 Mitsubishi Electric Corp アンテナ装置
JP2011519517A (ja) 2008-04-14 2011-07-07 インターナショナル・ビジネス・マシーンズ・コーポレーション リング・キャビティ及び／又はオフセット・キャビティにおける集積開口部結合型パッチ・アンテナを有する無線周波数（ｒｆ）集積回路（ｉｃ）パッケージ
JP2010016789A (ja) 2008-07-07 2010-01-21 Internatl Business Mach Corp <Ibm> Ｎ個集積開口部結合型パッチ・アンテナを有する無線周波数集積回路チップ・パッケージ、及びその製造する方法
US20100327068A1 (en) 2009-06-30 2010-12-30 International Business Machines Corporation Compact millimeter wave packages with integrated antennas
US20110063174A1 (en) 2009-09-11 2011-03-17 Samsung Electro-Mechanics Co., Ltd. Patch antenna and wireless communications module
US20130189935A1 (en) 2012-01-24 2013-07-25 E I Du Pont De Nemours And Company LOW TEMPERATURE CO-FIRED CERAMIC (LTCC) SYSTEM IN A PACKAGE (SiP) CONFIGURATIONS FOR MICROWAVE/MILLIMETER WAVE PACKAGING APPLICATIONS
US20160049723A1 (en) 2014-08-13 2016-02-18 International Business Machines Corporation Wireless communications package with integrated antennas and air cavity
JP2016048728A (ja) 2014-08-27 2016-04-07 株式会社村田製作所 導電性ポスト、及び、導電性ポストを用いた積層基板の製造方法
CN106374208A (zh) 2016-10-09 2017-02-01 华进半导体封装先导技术研发中心有限公司 高带宽有机基板天线结构和制作方法
WO2018116886A1 (ja) 2016-12-22 2018-06-28 京セラ株式会社 アンテナ基板およびその製造方法

Also Published As

Publication number Publication date
KR102565703B1 (ko) 2023-08-10
TW202017120A (zh) 2020-05-01
KR20200009279A (ko) 2020-01-30
JP2020014189A (ja) 2020-01-23

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