JP6818712B2 - 半導体装置 - Google Patents
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- JP6818712B2 JP6818712B2 JP2018054798A JP2018054798A JP6818712B2 JP 6818712 B2 JP6818712 B2 JP 6818712B2 JP 2018054798 A JP2018054798 A JP 2018054798A JP 2018054798 A JP2018054798 A JP 2018054798A JP 6818712 B2 JP6818712 B2 JP 6818712B2
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- 239000004065 semiconductor Substances 0.000 title claims description 129
- 239000012535 impurity Substances 0.000 claims description 16
- 239000010410 layer Substances 0.000 description 168
- 238000004519 manufacturing process Methods 0.000 description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 230000005684 electric field Effects 0.000 description 7
- 229910052814 silicon oxide Inorganic materials 0.000 description 7
- 238000005229 chemical vapour deposition Methods 0.000 description 6
- 238000001020 plasma etching Methods 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 239000005368 silicate glass Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
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- H01L29/063—Reduced surface field [RESURF] pn-junction structures
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- H01L29/0692—Surface layout
- H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
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- H01L29/0843—Source or drain regions of field-effect devices
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- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66734—Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the gate electrode, e.g. to form a trench gate electrode
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
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- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
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Description
Claims (5)
- 第1導電形の第1半導体層と、
前記第1半導体層上に設けられた第2導電形の第2半導体層と、
前記第2半導体層上に設けられた第1導電形の第3半導体層と、
前記第3半導体層の上面から前記第1半導体層の中に至る深さを有する複数のトレンチの内部にそれぞれ設けられた複数の制御電極と、
前記複数の制御電極のうちの第1制御電極および第2制御電極であって、前記第1半導体層と前記第2半導体層との界面に沿った方向において隣り合う第1制御電極および第2制御電極の間に設けられ、前記第3半導体層から前記第1半導体層に向かう方向に延びる絶縁領域と、
前記絶縁領域と前記第1半導体層との間、前記絶縁領域と前記第1制御電極との間、および、前記絶縁領域と前記第2制御電極との間に設けられた第2導電形の第4半導体層と、
前記第1制御電極と前記第4半導体層との間に設けられ、前記第1制御電極および前記第4半導体層に接した第1絶縁膜と、
前記第2制御電極と前記第4半導体層との間に設けられ、前記第2制御電極および前記第4半導体層に接した第2絶縁膜と、
前記第3半導体層および前記第4半導体層に接続された電極と、
を備え、
前記複数の制御電極は、それぞれ前記第3半導体層から前記第1半導体層に向かう方向に延在し、前記第1半導体層中の端が前記第1半導体層と前記第2半導体層との界面よりも低いレベルに位置し、
前記絶縁領域の前記第1半導体層中の端は、前記複数の制御電極層の端よりも低いレベルに位置する半導体装置。 - 前記絶縁領域は、誘電体を含む請求項1記載の半導体装置。
- 前記誘電体は、第2導電形の不純物を含む請求項2記載の半導体装置。
- 前記絶縁領域は、空隙を含む請求項1〜3のいずれか1つに記載の半導体装置。
- 前記第4半導体層中に含まれる第2導電形不純物の総量は、前記第1半導体層中に含まれる第1導電形不純物の総量と略同一である請求項1〜4のいずれか1つに記載の半導体装置。
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JP2018054798A JP6818712B2 (ja) | 2018-03-22 | 2018-03-22 | 半導体装置 |
US16/106,360 US10510879B2 (en) | 2018-03-22 | 2018-08-21 | Semiconductor device |
CN201811029927.2A CN110299411B (zh) | 2018-03-22 | 2018-09-05 | 半导体装置 |
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JP7247061B2 (ja) * | 2019-09-05 | 2023-03-28 | 株式会社東芝 | 半導体装置およびその製造方法 |
JP7381335B2 (ja) * | 2019-12-26 | 2023-11-15 | 株式会社東芝 | 半導体装置 |
US11063157B1 (en) | 2019-12-27 | 2021-07-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Trench capacitor profile to decrease substrate warpage |
CN112086506B (zh) * | 2020-10-20 | 2022-02-18 | 苏州东微半导体股份有限公司 | 半导体超结器件的制造方法 |
CN112271134B (zh) * | 2020-10-20 | 2021-10-22 | 苏州东微半导体股份有限公司 | 半导体功率器件的制造方法 |
JP7490597B2 (ja) * | 2021-03-05 | 2024-05-27 | 株式会社東芝 | 半導体装置およびその製造方法 |
JP7474214B2 (ja) * | 2021-03-17 | 2024-04-24 | 株式会社東芝 | 半導体装置 |
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JP5740108B2 (ja) | 2010-07-16 | 2015-06-24 | 株式会社東芝 | 半導体装置 |
JP5802636B2 (ja) * | 2012-09-18 | 2015-10-28 | 株式会社東芝 | 半導体装置およびその製造方法 |
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JP6078390B2 (ja) * | 2013-03-25 | 2017-02-08 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
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US20150035002A1 (en) * | 2013-07-31 | 2015-02-05 | Infineon Technologies Austria Ag | Super Junction Semiconductor Device and Manufacturing Method |
CN106165101B (zh) | 2014-03-31 | 2019-06-18 | 新电元工业株式会社 | 半导体装置 |
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US20190296147A1 (en) | 2019-09-26 |
JP2019169543A (ja) | 2019-10-03 |
CN110299411A (zh) | 2019-10-01 |
US10510879B2 (en) | 2019-12-17 |
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