JP6656836B2 - 実装構造体及びその製造方法 - Google Patents
実装構造体及びその製造方法 Download PDFInfo
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- JP6656836B2 JP6656836B2 JP2015146892A JP2015146892A JP6656836B2 JP 6656836 B2 JP6656836 B2 JP 6656836B2 JP 2015146892 A JP2015146892 A JP 2015146892A JP 2015146892 A JP2015146892 A JP 2015146892A JP 6656836 B2 JP6656836 B2 JP 6656836B2
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- metal terminal
- substrate
- metal
- joint
- face
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
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Description
まず、本実施の形態に係る実装構造体の構造について説明する。図1は、本実施の形態に係る実装構造体を例示する図であり、図1(b)は平面図、図1(a)は図1(b)のA−A線に沿う断面図である。
次に、本実施の形態に係る実装構造体の製造方法について説明する。図2及び図3は、本実施の形態に係る実装構造体の製造工程を例示する図である。なお、図2及び図3は、図1(a)に対応する断面を示している。
10a 第1の基板の一方の面
11 第1の金属端子
12 第2の金属端子
20 第2の基板
20b 第2の基板の他方の面
21 第3の金属端子
22 第4の金属端子
30 接合部
30A 第1の接合部
30B 第2の接合部
40 封止部
Claims (7)
- 第1の金属端子、及び前記第1の金属端子よりも高さが低い第2の金属端子、が第1面に形成された第1の基板と、
第3の金属端子、及び前記第3の金属端子よりも高さが低い第4の金属端子、が第2面に形成された第2の基板と、を有し、
前記第2の基板の前記第2面と前記第1の基板の前記第1面とが対向するように、前記第1の基板上に前記第2の基板を備え、
前記第1の金属端子、前記第2の金属端子、前記第3の金属端子、及び前記第4の金属端子は、何れも銅からなり、
前記第1の金属端子と前記第3の金属端子とは直接接合されており、
前記第2の金属端子と前記第4の金属端子とは、接合部を介して接合されている実装構造体。 - 前記第2の金属端子及び前記第4の金属端子は、前記第1の金属端子及び前記第3の金属端子が配置される領域よりも外周側の領域に夫々複数個配置されている請求項1に記載の実装構造体。
- 前記第1の基板及び前記第2の基板は、夫々矩形であり、
前記第2の金属端子及び前記第4の金属端子の全部又は一部は、前記矩形の対角線上に配置されている請求項2に記載の実装構造体。 - 前記接合部は、融点が200℃以下のはんだである請求項1乃至3の何れか一項に記載の実装構造体。
- 第1の金属端子、及び前記第1の金属端子よりも高さが低い第2の金属端子、が第1面に形成された第1の基板を作製する工程と、
前記第1の金属端子と同種の金属からなる第3の金属端子、及び前記第3の金属端子よりも高さが低い第4の金属端子、が第2面に形成された第2の基板を作製する工程と、
前記第2の金属端子上に第1の接合部を形成し、第4の金属端子上に第2の接合部を形成する工程と、
前記第1の金属端子の端面と前記第3の金属端子の端面とが対向し、前記第1の接合部の端面と前記第2の接合部の端面とが対向するように、前記第1の基板上に前記第2の基板を積層する工程と、
前記第1の接合部の端面と前記第2の接合部の端面とを仮固定する工程と、
前記第1の接合部及び前記第2の接合部を溶融させ、前記第1の金属端子と前記第3の金属端子とをセルフアライメントすると共に、前記第1の金属端子の端面と前記第3の金属端子の端面の酸化膜を除去する工程と、
前記第1の接合部及び前記第2の接合部が溶融した状態で、前記第2の基板を前記第1の基板側に押圧し、前記第1の金属端子の端面と前記第3の金属端子の端面とを直接接合する工程と、
前記第1の接合部及び前記第2の接合部を凝固し、前記第2の金属端子と前記第4の金属端子とを、凝固した接合部を介して接合する工程と、を有し、
前記第2の金属端子及び前記第4の金属端子は、前記第1の金属端子と前記第3の金属端子と同種の金属からなり、
前記セルフアライメントすると共に酸化膜を除去する工程、前記直接接合する工程、及び前記凝固した接合部を介して接合する工程は、還元雰囲気中で行われる実装構造体の製造方法。 - 前記積層する工程よりも前に、前記第1の金属端子の端面及び前記第3の金属端子の端面を研磨又は研削して活性化する工程を有する請求項5に記載の実装構造体の製造方法。
- 前記第1の接合部及び前記第2の接合部は、融点が200℃以下のはんだである請求項5又は6に記載の実装構造体の製造方法。
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US20060249859A1 (en) * | 2005-05-05 | 2006-11-09 | Eiles Travis M | Metrology system and method for stacked wafer alignment |
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