JP6155911B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP6155911B2 JP6155911B2 JP2013140639A JP2013140639A JP6155911B2 JP 6155911 B2 JP6155911 B2 JP 6155911B2 JP 2013140639 A JP2013140639 A JP 2013140639A JP 2013140639 A JP2013140639 A JP 2013140639A JP 6155911 B2 JP6155911 B2 JP 6155911B2
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- 239000004065 semiconductor Substances 0.000 title claims description 74
- 239000000758 substrate Substances 0.000 claims description 30
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 9
- 229920005591 polysilicon Polymers 0.000 claims description 9
- 239000010408 film Substances 0.000 description 72
- 238000009792 diffusion process Methods 0.000 description 16
- 239000003990 capacitor Substances 0.000 description 13
- 230000015572 biosynthetic process Effects 0.000 description 8
- 230000015556 catabolic process Effects 0.000 description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 229910052814 silicon oxide Inorganic materials 0.000 description 7
- 230000000052 comparative effect Effects 0.000 description 6
- 230000005684 electric field Effects 0.000 description 4
- 238000009434 installation Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000002955 isolation Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000009413 insulation Methods 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 230000008719 thickening Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76283—Lateral isolation by refilling of trenches with dielectric material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76289—Lateral isolation by air gap
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Thin Film Transistor (AREA)
- Element Separation (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Description
図1は、本発明の実施の形態1に係る半導体装置10の断面図である。半導体装置10は基板12を備えている。基板12は例えばN型のシリコン材料であり、電気的には接地(基準電位に接続)される。基板12の上には埋め込み絶縁膜14が形成されている。埋め込み絶縁膜14は例えばシリコン酸化膜で形成され、この場の埋め込み絶縁膜はBOX(Buried Oxide)と呼ばれることもある。
図5は、本発明の実施の形態2に係る半導体装置200の断面図である。半導体装置200については、前述の半導体装置10との相違点を中心に説明する。第1SOI層20aと第2SOI層20bの間の絶縁に、絶縁膜202aが複数形成されている。絶縁膜202aは例えばシリコン酸化膜からなる。図5から明らかなとおり、絶縁膜202aは3つ形成されている。
図6は、本発明の実施の形態3に係る半導体装置250の断面図である。半導体装置250については、前述の半導体装置10との相違点を中心に説明する。第1SOI層20aと第2SOI層20bの間の絶縁に、絶縁膜202bと埋め込みポリシリコン252からなる分離構造が複数形成されている。この分離構造は、SOI層にトレンチを設け、トレンチ内壁を酸化させた後、トレンチ内をポリシリコンで埋め込む周知の製造方法で形成される。
図7は、本発明の実施の形態4に係る半導体装置300の断面図である。半導体装置300については、前述の半導体装置10との相違点を中心に説明する。パッド70aと第2SOI層20bの間の表面絶縁層61の中には、埋め込み電極302が形成されている。表面絶縁層61のうち、埋め込み電極302の下方の部分を下部絶縁層61aとする。表面絶縁層61のうち、埋め込み電極302の上方の部分を上部絶縁層61bとする。
図8は、本発明の実施の形態5に係る半導体装置350の断面図である。半導体装置350については、前述の半導体装置300との相違点を中心に説明する。第2SOI層20b上の絶縁膜22に囲まれる部分には追加絶縁層352が形成されている。追加絶縁層352の中には追加埋め込み電極354が形成されている。
Claims (6)
- 基板と、
前記基板の上に形成された埋め込み絶縁膜と、
前記埋め込み絶縁膜の上に形成されたSOI層と、
前記SOI層の表面から前記埋め込み絶縁膜に達するように形成され、前記SOI層を第1SOI層と、前記第1SOI層と絶縁された第2SOI層とに区分する絶縁膜と、
前記第1SOI層に形成された素子と、
一端に前記第2SOI層の直上に位置するパッドを有し、他端は前記第1SOI層に接続された電極と、を備え、
前記第1SOI層の直下における前記埋め込み絶縁膜と前記基板の間に空洞領域を有し、
前記第2SOI層の直下における前記埋め込み絶縁膜の少なくとも一部は前記基板に直接接することを特徴とする半導体装置。 - 前記第1SOI層と前記第2SOI層の間の前記絶縁膜は複数形成されたことを特徴とする請求項1に記載の半導体装置。
- 前記絶縁膜の中に形成された埋め込みポリシリコンを有することを特徴とする請求項1又は2に記載の半導体装置。
- 前記パッドと前記第2SOI層の間に形成された表面絶縁層と、
前記表面絶縁層の中に形成された埋め込み電極と、を備えたことを特徴とする請求項1乃至3のいずれか1項に記載の半導体装置。 - 前記第2SOI層上の前記絶縁膜に囲まれる部分に形成された追加絶縁層と、
前記追加絶縁層の中に形成された追加埋め込み電極と、を備えたことを特徴とする請求項1乃至4のいずれか1項に記載の半導体装置。 - 前記空洞領域は前記基板に形成されたことを特徴とする請求項1〜5のいずれか1項に記載の半導体装置。
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013140639A JP6155911B2 (ja) | 2013-07-04 | 2013-07-04 | 半導体装置 |
US14/253,269 US9048111B2 (en) | 2013-07-04 | 2014-04-15 | Semiconductor device |
TW103113982A TWI520330B (zh) | 2013-07-04 | 2014-04-17 | 半導體裝置 |
DE102014211904.9A DE102014211904B4 (de) | 2013-07-04 | 2014-06-20 | Halbleitervorrichtung |
KR1020140081784A KR101606374B1 (ko) | 2013-07-04 | 2014-07-01 | 반도체장치 |
CN201410317578.XA CN104282743B (zh) | 2013-07-04 | 2014-07-04 | 半导体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013140639A JP6155911B2 (ja) | 2013-07-04 | 2013-07-04 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
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JP2015015341A JP2015015341A (ja) | 2015-01-22 |
JP6155911B2 true JP6155911B2 (ja) | 2017-07-05 |
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JP2013140639A Active JP6155911B2 (ja) | 2013-07-04 | 2013-07-04 | 半導体装置 |
Country Status (6)
Country | Link |
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US (1) | US9048111B2 (ja) |
JP (1) | JP6155911B2 (ja) |
KR (1) | KR101606374B1 (ja) |
CN (1) | CN104282743B (ja) |
DE (1) | DE102014211904B4 (ja) |
TW (1) | TWI520330B (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107680977B (zh) * | 2017-08-29 | 2020-06-09 | 上海集成电路研发中心有限公司 | 一种减小暗电流的背照式像素单元结构及其形成方法 |
CN107706201B (zh) * | 2017-08-29 | 2020-06-30 | 上海微阱电子科技有限公司 | 一种减小暗电流的背照式像素单元结构及其形成方法 |
CN107919372A (zh) * | 2017-10-26 | 2018-04-17 | 上海集成电路研发中心有限公司 | 一种背照式cmos图像传感器像素单元及其制作方法 |
JP7001050B2 (ja) * | 2018-12-28 | 2022-01-19 | 三菱電機株式会社 | 半導体装置 |
Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
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US5049968A (en) | 1988-02-08 | 1991-09-17 | Kabushiki Kaisha Toshiba | Dielectrically isolated substrate and semiconductor device using the same |
JP2788269B2 (ja) * | 1988-02-08 | 1998-08-20 | 株式会社東芝 | 半導体装置およびその製造方法 |
JP2598328B2 (ja) * | 1989-10-17 | 1997-04-09 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
US5644157A (en) | 1992-12-25 | 1997-07-01 | Nippondenso Co., Ltd. | High withstand voltage type semiconductor device having an isolation region |
JP3052975B2 (ja) | 1993-02-02 | 2000-06-19 | 株式会社デンソー | 半導体装置 |
KR960002088B1 (ko) * | 1993-02-17 | 1996-02-10 | 삼성전자주식회사 | 에스오아이(SOI : silicon on insulator) 구조의 반도체 장치 제조방법 |
FR2717308B1 (fr) * | 1994-03-14 | 1996-07-26 | Sgs Thomson Microelectronics | Dispositif de protection contre des surtensions dans des circuits intégrés. |
JPH07307399A (ja) | 1994-05-11 | 1995-11-21 | Nippondenso Co Ltd | 半導体記憶装置及びその製造方法 |
JPH09139422A (ja) | 1995-11-15 | 1997-05-27 | Hitachi Ltd | 半導体集積回路およびその製造方法 |
KR100618698B1 (ko) * | 2004-06-21 | 2006-09-08 | 주식회사 하이닉스반도체 | 반도체 소자 및 그의 제조방법 |
JP4624084B2 (ja) | 2004-11-24 | 2011-02-02 | トヨタ自動車株式会社 | 半導体装置とその製造方法 |
JP4559839B2 (ja) | 2004-12-13 | 2010-10-13 | トヨタ自動車株式会社 | 半導体装置の製造方法 |
JP5017926B2 (ja) | 2005-09-28 | 2012-09-05 | 株式会社デンソー | 半導体装置およびその製造方法 |
JP5044986B2 (ja) * | 2006-05-17 | 2012-10-10 | サンケン電気株式会社 | 半導体発光装置 |
JP5132481B2 (ja) * | 2008-08-27 | 2013-01-30 | 株式会社日立製作所 | 半導体集積回路装置 |
JP5499915B2 (ja) * | 2009-06-10 | 2014-05-21 | 富士電機株式会社 | 高耐圧半導体装置 |
JP2011108800A (ja) * | 2009-11-17 | 2011-06-02 | Honda Motor Co Ltd | 横型igbt及び横型igbtの製造方法 |
JP2012119462A (ja) * | 2010-11-30 | 2012-06-21 | Panasonic Corp | 半導体装置及びその製造方法 |
JP2012142505A (ja) | 2011-01-06 | 2012-07-26 | Hitachi Ltd | 半導体装置およびその製造方法 |
JP5260723B2 (ja) | 2011-04-28 | 2013-08-14 | 株式会社ファインコラボレート研究所 | 情報処理装置、情報処理方法およびプログラム |
JP5762353B2 (ja) | 2012-05-01 | 2015-08-12 | 三菱電機株式会社 | 半導体装置 |
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2013
- 2013-07-04 JP JP2013140639A patent/JP6155911B2/ja active Active
-
2014
- 2014-04-15 US US14/253,269 patent/US9048111B2/en active Active
- 2014-04-17 TW TW103113982A patent/TWI520330B/zh not_active IP Right Cessation
- 2014-06-20 DE DE102014211904.9A patent/DE102014211904B4/de active Active
- 2014-07-01 KR KR1020140081784A patent/KR101606374B1/ko not_active IP Right Cessation
- 2014-07-04 CN CN201410317578.XA patent/CN104282743B/zh active Active
Also Published As
Publication number | Publication date |
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KR101606374B1 (ko) | 2016-03-25 |
TW201511259A (zh) | 2015-03-16 |
US20150008557A1 (en) | 2015-01-08 |
DE102014211904A1 (de) | 2015-01-08 |
US9048111B2 (en) | 2015-06-02 |
KR20150005452A (ko) | 2015-01-14 |
JP2015015341A (ja) | 2015-01-22 |
DE102014211904B4 (de) | 2022-04-28 |
CN104282743B (zh) | 2018-02-02 |
CN104282743A (zh) | 2015-01-14 |
TWI520330B (zh) | 2016-02-01 |
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