JP5917015B2 - 薄膜トランジスタ表示板の製造方法 - Google Patents
薄膜トランジスタ表示板の製造方法 Download PDFInfo
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- JP5917015B2 JP5917015B2 JP2011100695A JP2011100695A JP5917015B2 JP 5917015 B2 JP5917015 B2 JP 5917015B2 JP 2011100695 A JP2011100695 A JP 2011100695A JP 2011100695 A JP2011100695 A JP 2011100695A JP 5917015 B2 JP5917015 B2 JP 5917015B2
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- 239000010409 thin film Substances 0.000 title claims description 54
- 238000004519 manufacturing process Methods 0.000 title claims description 38
- 238000000034 method Methods 0.000 title claims description 38
- 239000010408 film Substances 0.000 claims description 250
- 229910052751 metal Inorganic materials 0.000 claims description 117
- 239000002184 metal Substances 0.000 claims description 117
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 62
- 238000005530 etching Methods 0.000 claims description 35
- 239000004065 semiconductor Substances 0.000 claims description 23
- 230000001681 protective effect Effects 0.000 claims description 19
- 229920002120 photoresistant polymer Polymers 0.000 claims description 17
- 239000000758 substrate Substances 0.000 claims description 14
- 238000001039 wet etching Methods 0.000 claims description 14
- 239000010949 copper Substances 0.000 claims description 13
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 12
- 229910052802 copper Inorganic materials 0.000 claims description 12
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 8
- 239000010936 titanium Substances 0.000 claims description 8
- 229910052719 titanium Inorganic materials 0.000 claims description 8
- 238000001312 dry etching Methods 0.000 claims description 7
- 238000004140 cleaning Methods 0.000 claims description 4
- 239000007789 gas Substances 0.000 description 30
- 239000012535 impurity Substances 0.000 description 28
- 238000012805 post-processing Methods 0.000 description 16
- 239000010410 layer Substances 0.000 description 12
- 238000007781 pre-processing Methods 0.000 description 11
- 238000003860 storage Methods 0.000 description 7
- 239000004973 liquid crystal related substance Substances 0.000 description 6
- 230000007547 defect Effects 0.000 description 4
- 239000012212 insulator Substances 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 230000000903 blocking effect Effects 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000007641 inkjet printing Methods 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 206010034972 Photosensitivity reaction Diseases 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 230000036211 photosensitivity Effects 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32138—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only pre- or post-treatments, e.g. anti-corrosion processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
- H01L29/458—Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
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- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
11、21 配向膜
52、54 感光膜パターン
100 下部表示板
121 ゲート線
124a、124b ゲート電極
150 第1非晶質シリコン膜
151a、151b、154a、154b 半導体
160 第2非晶質シリコン膜
161a、161b、163a、163b、165a、165b オーミックコンタクト部材
164 非晶質シリコンパターン
171a、171b データ線
173a、173b ソース電極
174a 第1金属パターン
174b 第2金属パターン
175a、175b ドレイン電極
171ab、171bb、173ab、175ab、173bb、175bb 上部膜
171aa、171ba、173aa、173ba、175aa、175ba 下部膜
180q 保護膜
185a、185b コンタクトホール
191 画素電極
191a 第1副画素電極
191b 第2副画素電極
200 上部表示板
220 遮光部材
230 カラーフィルタ
270 共通電極
Claims (15)
- 絶縁基板の上にゲート電極を含むゲート線を形成する段階と、
前記ゲート線の上にゲート絶縁膜を形成する段階と、
前記ゲート絶縁膜の上に第1非晶質シリコン膜、第2非晶質シリコン膜、第1金属膜、及び第2金属膜を形成する段階と、
前記第2金属膜の上に第1部分と前記第1部分より厚さの厚い第2部分とを有する感光膜パターンを形成する段階と、
前記感光膜パターンをマスクとして前記第2金属膜及び第1金属膜をエッチングして、第2金属パターン及び第1金属パターンを形成する段階と、
前記第2金属パターンにSF6気体またはSF6とHeの混合気体で前処理する段階と、
前記感光膜パターンをマスクとして前記第2非晶質シリコン膜及び第1非晶質シリコン膜をエッチングして非晶質シリコンパターン及び半導体を形成する段階と、
前記感光膜パターンの第1部分を除去する段階と、
前記第2部分をマスクとして前記第2金属パターンをウェットエッチングしてデータ線配線用上部膜を形成する段階と、
前記第2部分をマスクとして前記第1金属パターン及び非晶質シリコンパターンをエッチングして、データ配線用下部膜及びオーミックコンタクト部材を形成する段階と、
前記第2部分を除去した後、前記データ配線用上部膜の上にコンタクトホールを含む保護膜を形成する段階と、
前記保護膜の上に前記コンタクトホールを通じて前記データ配線用上部膜と接続する画素電極を形成する段階と、
が順に実施される薄膜トランジスタ表示板の製造方法。 - 前記第1金属膜はチタニウムで形成し、
前記第2金属膜は銅で形成する、請求項1に記載の薄膜トランジスタ表示板の製造方法。 - 前記感光膜パターンの第1部分を除去する段階において、
SF6とO2の混合気体を用いる、請求項1〜2のいずれかに記載の薄膜トランジスタ表示板の製造方法。 - 前記混合気体は、SF6:O2が1:20以上である、請求項3に記載の薄膜トランジスタ表示板の製造方法。
- 前記ウェットエッチング時にアンダーカットを形成する、請求項1〜4のいずれかに記載の薄膜トランジスタ表示板の製造方法。
- 前記前処理は10秒間行う、請求項1〜5のいずれかに記載の薄膜トランジスタ表示板の製造方法。
- 前記下部膜及びオーミックコンタクト部材を形成する段階はドライエッチングによって形成する、請求項1〜6のいずれかに記載の薄膜トランジスタ表示板の製造方法。
- 前記データ配線用上部膜と前記データ配線用下部膜は、ソース電極を有するデータ線、及びソース電極と対向するドレイン電極を形成し、
前記第1部分は、前記ソース電極と前記ドレイン電極との間のチャネル部と対応する位置に配置される、請求項1〜7のいずれかに記載の薄膜トランジスタ表示板の製造方法。 - 絶縁基板の上にゲート電極を含むゲート線を形成する段階と、
前記ゲート線の上にゲート絶縁膜を形成する段階と、
前記ゲート絶縁膜の上に第1非晶質シリコン膜、第2非晶質シリコン膜、第1金属膜、及び第2金属膜を形成する段階と、
前記第2金属膜の上に第1部分と前記第1部分より厚さの厚い第2部分とを有する感光膜パターンを形成する段階と、
前記感光膜パターンをマスクとして前記第2金属膜及び第1金属膜をエッチングして、第2金属パターン及び第1金属パターンを形成する段階と、
前記第1部分を除去する段階と、
前記第2部分をマスクとして前記第2非晶質シリコン膜及び第1非晶質シリコン膜をエッチングして、非晶質シリコンパターン及び半導体を形成する段階と、
前記基板をO2とHeの混合気体で洗浄する段階と、
前記第2部分をマスクとして前記第2金属パターンをウェットエッチングしてデータ線配線用上部膜を形成する段階と、
前記第2部分をマスクとして前記第1金属パターン及び非晶質シリコンパターンをエッチングして、データ配線用下部膜及びオーミックコンタクト部材を形成する段階と、
前記第2部分を除去した後、前記データ配線用上部膜上にコンタクトホールを含む保護膜を形成する段階と、
前記保護膜の上に前記コンタクトホールを通じて前記データ配線用上部膜と接続する画素電極を形成する段階と、
が順に実施される薄膜トランジスタ表示板の製造方法。 - 前記第1金属膜はチタニウムで形成し、
前記第2金属膜は銅で形成する、請求項9に記載の薄膜トランジスタ表示板の製造方法。 - 前記第2金属パターン及び前記第1金属パターンを形成する段階後、
前記第2金属パターンをSF6気体またはSF6とHeの混合気体で前処理する段階をさらに含む、請求項9〜10のいずれかに記載の薄膜トランジスタ表示板の製造方法。 - 前記洗浄段階は、O2を500sccm〜15、000sccmの範囲で注入し、Heは1000sccmで注入する、請求項9〜11のいずれかに記載の薄膜トランジスタ表示板の製造方法。
- 前記ウェットエッチング時にアンダーカットを形成する、請求項9〜12のいずれかに記載の薄膜トランジスタ表示板の製造方法。
- 前記下部膜及びオーミックコンタクト部材を形成する段階はドライエッチングによって形成する、請求項9〜13のいずれかに記載の薄膜トランジスタ表示板の製造方法。
- 前記データ配線用上部膜と前記データ配線用下部膜は、ソース電極を有するデータ線、及びソース電極と対向するドレイン電極を形成し、
前記第1部分は、前記ソース電極と前記ドレイン電極との間のチャネル部と対応する位置に配置される、請求項9〜14のいずれかに記載の薄膜トランジスタ表示板の製造方法。
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KR1020100074233A KR101682078B1 (ko) | 2010-07-30 | 2010-07-30 | 박막 트랜지스터 표시판의 제조 방법 |
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CN103745955B (zh) * | 2014-01-03 | 2017-01-25 | 京东方科技集团股份有限公司 | 显示装置、阵列基板及其制造方法 |
US9599865B2 (en) | 2015-01-21 | 2017-03-21 | Apple Inc. | Low-flicker liquid crystal display |
CN107579165B (zh) * | 2017-08-30 | 2024-04-05 | 京东方科技集团股份有限公司 | 一种封装基板及其制作方法、显示面板及显示装置 |
CN108417583B (zh) * | 2018-03-09 | 2021-10-29 | 惠科股份有限公司 | 一种阵列基板的制造方法和阵列基板 |
US10727256B2 (en) * | 2018-10-24 | 2020-07-28 | HKC Corporation Limited | Method for fabricating array substrate, array substrate and display |
CN109860043B (zh) * | 2018-12-13 | 2021-03-16 | 深圳市华星光电半导体显示技术有限公司 | 一种阵列基板制备方法 |
CN111312725B (zh) * | 2020-02-24 | 2023-02-03 | 合肥鑫晟光电科技有限公司 | 一种阵列基板及其制备方法、显示面板 |
CN113782548B (zh) * | 2021-09-09 | 2022-08-23 | Tcl华星光电技术有限公司 | 阵列基板及其制备方法、显示面板 |
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2010
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CN102347274B (zh) | 2015-03-04 |
JP2012033877A (ja) | 2012-02-16 |
US8476123B2 (en) | 2013-07-02 |
KR20120012209A (ko) | 2012-02-09 |
KR101682078B1 (ko) | 2016-12-05 |
US20120028421A1 (en) | 2012-02-02 |
CN102347274A (zh) | 2012-02-08 |
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