JP5796412B2 - 半導体素子の製造方法 - Google Patents
半導体素子の製造方法 Download PDFInfo
- Publication number
- JP5796412B2 JP5796412B2 JP2011184441A JP2011184441A JP5796412B2 JP 5796412 B2 JP5796412 B2 JP 5796412B2 JP 2011184441 A JP2011184441 A JP 2011184441A JP 2011184441 A JP2011184441 A JP 2011184441A JP 5796412 B2 JP5796412 B2 JP 5796412B2
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- JP
- Japan
- Prior art keywords
- wafer
- grinding
- grinding wheel
- thinned portion
- semiconductor element
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- 239000004065 semiconductor Substances 0.000 title claims description 31
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 238000000227 grinding Methods 0.000 claims description 69
- 238000000034 method Methods 0.000 claims description 25
- 230000002093 peripheral effect Effects 0.000 claims description 10
- 238000000206 photolithography Methods 0.000 claims description 3
- 238000009792 diffusion process Methods 0.000 claims description 2
- 238000005530 etching Methods 0.000 claims description 2
- 238000005468 ion implantation Methods 0.000 claims description 2
- 230000000052 comparative effect Effects 0.000 description 8
- 239000002699 waste material Substances 0.000 description 4
- 230000001681 protective effect Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B41/00—Component parts such as frames, beds, carriages, headstocks
- B24B41/06—Work supports, e.g. adjustable steadies
- B24B41/068—Table-like supports for panels, sheets or the like
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B7/00—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor
- B24B7/20—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground
- B24B7/22—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain
- B24B7/228—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain for grinding thin, brittle parts, e.g. semiconductors, wafers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Mechanical Engineering (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Grinding And Polishing Of Tertiary Curved Surfaces And Surfaces With Complex Shapes (AREA)
Description
本発明の実施の形態に係る半導体素子の製造方法について、図を参照しつつ説明する。図1は、研削前のウエハの断面図である。ウエハ10は、例えば、FZ法で作成されたシリコンで形成されている。ウエハ10は、裏面10aと表面10bを有している。表面10bには、例えば、トランジスタや配線構造などの半導体素子構造を形成する。そして、ウエハの裏面10aを上向きにして、ウエハ10の表面10bに保護テープ12を貼り付ける。
Claims (3)
- 回転させた研削砥石により、ウエハ外周部の内側に沿って前記ウエハの主面とのなす角が75°以上90°未満の斜面を、既に形成された斜面と前記研削砥石の間に間隙を設けた状態で形成しつつ、前記斜面に囲まれた部分に前記外周部よりも薄い薄化部を形成するウエハ研削工程と、
前記薄化部に半導体素子を形成する工程と、
を備えたことを特徴とする半導体素子の製造方法。 - 前記半導体素子を形成する工程は、フォトリソグラフィ工程、イオン注入工程、熱拡散工程、成膜工程、又はエッチング工程を有することを特徴とする請求項1に記載の半導体素子の製造方法。
- 前記半導体素子を形成する工程では、前記薄化部の表面に第1の電極を形成し、前記薄化部の裏面に第2の電極を形成することを特徴とする請求項1に記載の半導体素子の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011184441A JP5796412B2 (ja) | 2011-08-26 | 2011-08-26 | 半導体素子の製造方法 |
US13/453,039 US8987122B2 (en) | 2011-08-26 | 2012-04-23 | Method of manufacturing semiconductor device |
DE102012214817.5A DE102012214817B4 (de) | 2011-08-26 | 2012-08-21 | Verfahren zur Herstellung einer Halbleitervorrichtung |
KR1020120091608A KR20130023098A (ko) | 2011-08-26 | 2012-08-22 | 반도체 소자의 제조방법 |
CN201210304578.7A CN102956469B (zh) | 2011-08-26 | 2012-08-24 | 半导体元件的制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011184441A JP5796412B2 (ja) | 2011-08-26 | 2011-08-26 | 半導体素子の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2013045998A JP2013045998A (ja) | 2013-03-04 |
JP5796412B2 true JP5796412B2 (ja) | 2015-10-21 |
Family
ID=47665454
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011184441A Expired - Fee Related JP5796412B2 (ja) | 2011-08-26 | 2011-08-26 | 半導体素子の製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8987122B2 (ja) |
JP (1) | JP5796412B2 (ja) |
KR (1) | KR20130023098A (ja) |
CN (1) | CN102956469B (ja) |
DE (1) | DE102012214817B4 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9954059B1 (en) | 2016-10-07 | 2018-04-24 | Toyota Jidosha Kabushiki Kaisha | Semiconductor wafer and method of manufacturing semiconductor element |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6360750B2 (ja) * | 2014-08-26 | 2018-07-18 | 株式会社ディスコ | ウエーハの加工方法 |
WO2016056124A1 (ja) * | 2014-10-10 | 2016-04-14 | 三菱電機株式会社 | 半導体装置の製造方法 |
JP6831835B2 (ja) * | 2015-08-14 | 2021-02-17 | エム キューブド テクノロジーズ, インコーポレイテッド | 被加工物を仕上げるための、高度に制御可能な処理ツールを有する機械 |
JP6510393B2 (ja) | 2015-12-15 | 2019-05-08 | 三菱電機株式会社 | 半導体装置の製造方法 |
US10096460B2 (en) * | 2016-08-02 | 2018-10-09 | Semiconductor Components Industries, Llc | Semiconductor wafer and method of wafer thinning using grinding phase and separation phase |
JP6791579B2 (ja) * | 2016-09-09 | 2020-11-25 | 株式会社ディスコ | ウェーハ及びウェーハの加工方法 |
JP2022133007A (ja) * | 2021-03-01 | 2022-09-13 | 株式会社ディスコ | 被加工物の研削方法 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3991300B2 (ja) * | 2000-04-28 | 2007-10-17 | 株式会社Sumco | 張り合わせ誘電体分離ウェーハの製造方法 |
JP2004281551A (ja) * | 2003-03-13 | 2004-10-07 | Toshiba Corp | 半導体基板及びその製造方法、半導体装置及びその製造方法、半導体パッケージ |
WO2004096221A1 (en) | 2003-04-30 | 2004-11-11 | Morphochem Aktiengesellschaft für kombinatorische Chemie | Use of oxazolidinone-quinoline hybrid antibiotics for the treatment of anthrax and other infections |
JP2005123425A (ja) * | 2003-10-17 | 2005-05-12 | Toshiba Corp | 半導体基板の製造方法、半導体基板及び半導体装置の製造方法 |
JP2007019379A (ja) * | 2005-07-11 | 2007-01-25 | Disco Abrasive Syst Ltd | ウェーハの加工方法 |
JP4791774B2 (ja) * | 2005-07-25 | 2011-10-12 | 株式会社ディスコ | ウェーハの加工方法及び研削装置 |
JP4826290B2 (ja) | 2006-03-06 | 2011-11-30 | トヨタ自動車株式会社 | 半導体素子の製造方法 |
JP2008028325A (ja) | 2006-07-25 | 2008-02-07 | Renesas Technology Corp | 半導体装置の製造方法 |
JP2008283025A (ja) * | 2007-05-11 | 2008-11-20 | Disco Abrasive Syst Ltd | ウエーハの分割方法 |
US8048775B2 (en) * | 2007-07-20 | 2011-11-01 | Alpha And Omega Semiconductor Incorporated | Process of forming ultra thin wafers having an edge support ring |
JP5466370B2 (ja) | 2008-03-17 | 2014-04-09 | 新電元工業株式会社 | 半導体チップの製造方法 |
JP5012632B2 (ja) | 2008-04-15 | 2012-08-29 | 富士電機株式会社 | 半導体装置の製造方法 |
JP5266869B2 (ja) | 2008-05-19 | 2013-08-21 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
JP2010016188A (ja) | 2008-07-03 | 2010-01-21 | Sanyo Electric Co Ltd | 半導体装置の製造方法および半導体装置 |
JP2011054808A (ja) * | 2009-09-03 | 2011-03-17 | Disco Abrasive Syst Ltd | ウエーハの加工方法及び該加工方法により加工されたウエーハ |
JP2011071289A (ja) * | 2009-09-25 | 2011-04-07 | Disco Abrasive Syst Ltd | ウエーハの加工方法 |
JP2011071287A (ja) * | 2009-09-25 | 2011-04-07 | Disco Abrasive Syst Ltd | ウエーハの加工方法 |
JP2011243906A (ja) * | 2010-05-21 | 2011-12-01 | Disco Abrasive Syst Ltd | ウエーハの加工方法 |
-
2011
- 2011-08-26 JP JP2011184441A patent/JP5796412B2/ja not_active Expired - Fee Related
-
2012
- 2012-04-23 US US13/453,039 patent/US8987122B2/en not_active Expired - Fee Related
- 2012-08-21 DE DE102012214817.5A patent/DE102012214817B4/de active Active
- 2012-08-22 KR KR1020120091608A patent/KR20130023098A/ko not_active Application Discontinuation
- 2012-08-24 CN CN201210304578.7A patent/CN102956469B/zh not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9954059B1 (en) | 2016-10-07 | 2018-04-24 | Toyota Jidosha Kabushiki Kaisha | Semiconductor wafer and method of manufacturing semiconductor element |
Also Published As
Publication number | Publication date |
---|---|
JP2013045998A (ja) | 2013-03-04 |
KR20130023098A (ko) | 2013-03-07 |
DE102012214817A1 (de) | 2013-02-28 |
US8987122B2 (en) | 2015-03-24 |
DE102012214817B4 (de) | 2018-06-28 |
CN102956469B (zh) | 2016-12-21 |
CN102956469A (zh) | 2013-03-06 |
US20130052812A1 (en) | 2013-02-28 |
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