JP5504712B2 - 高速伝送用回路基板の接続構造 - Google Patents
高速伝送用回路基板の接続構造 Download PDFInfo
- Publication number
- JP5504712B2 JP5504712B2 JP2009155954A JP2009155954A JP5504712B2 JP 5504712 B2 JP5504712 B2 JP 5504712B2 JP 2009155954 A JP2009155954 A JP 2009155954A JP 2009155954 A JP2009155954 A JP 2009155954A JP 5504712 B2 JP5504712 B2 JP 5504712B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- speed transmission
- transmission circuit
- wiring
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/142—Arrangements of planar printed circuit boards in the same plane, e.g. auxiliary printed circuit insert mounted in a main printed circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0215—Grounding of printed circuits by connection to external grounding means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
- H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09145—Edge details
- H05K2201/0919—Exposing inner circuit layers or metal planes at the side edge of the PCB or at the walls of large holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09236—Parallel layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/0929—Conductive planes
- H05K2201/09318—Core having one signal plane and one power plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/0929—Conductive planes
- H05K2201/09354—Ground conductor along edge of main surface
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09845—Stepped hole, via, edge, bump or conductor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/049—Wire bonding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
- H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Combinations Of Printed Boards (AREA)
- Structure Of Printed Boards (AREA)
- Waveguides (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
Description
2 第1の高速伝送用回路基板
3 第2の高速伝送用回路基板
4 積層基板
5 第1の信号伝送用配線
6 グランド面
11 第2の信号伝送用配線
14 基板接続用部品
19 導電性膜
Claims (5)
- 表面に第1の信号伝送用配線を形成し内部にグランド面を形成した積層基板からなる第1の高速伝送用回路基板と、
回路用基板と前記回路用基板の表面に形成された第2の信号伝送用配線とからなる第2の高速伝送用回路基板と、
前記第1の高速伝送用回路基板及び前記第2の高速伝送用回路基板が表面に固定される導電性の基板接続用部品と、
前記第1の高速伝送用回路基板の第1の信号伝送用配線と前記第2の高速伝送用回路基板の第2の信号伝送用配線とを電気的に接続するボンディングワイヤとを備え、
前記積層基板の前記グランド面を前記積層基板の端部側面に露出するように形成し、前記積層基板の端部側面に導電性膜を形成し、前記第1の高速伝送用回路基板の前記グランド面と前記基板接続用部品を前記導電性膜により電気的に接続し、
前記第1の高速伝送用回路基板及び前記第2の高速伝送用回路基板は所定の隙間をもって対向するように配置され、前記隙間に導電性部材が充填され、
前記導電性部材は前記第1の高速伝送用回路基板の前記グランド面よりも高い位置となるように充填されることを特徴とする高速伝送用回路基板の接続構造。 - 前記第1の信号伝送用配線の端部は前記積層基板の端部から所定間隔おいて形成され、前記積層基板の表面の前記第1の信号伝送用配線の端部と前記積層基板の端部の間の領域の一部を覆うように前記導電性膜を形成する請求項1に記載の高速伝送用回路基板の接続構造。
- 前記導電性部材は、前記基板接続用部品の前記第2の高速伝送用回路基板が固定される表面よりも高い位置まで充填される請求項1又は2に記載の高速伝送用回路基板の接続構造。
- 前記積層基板の表面の前記第1の信号伝送用配線の両側にグランド用配線が形成され、前記グランド用配線の端部は前記導電性膜に電気的に接続される請求項1〜3のいずれかに記載の高速伝送用回路基板の接続構造。
- 前記基板接続用部品は、段差部分と、前記段差部分を境にして厚みの小さい部分と厚みの大きい部分とを備え、
前記第1の高速伝送用回路基板は前記厚みの小さい部分の表面に固定され、前記第2の高速伝送用回路基板は前記厚みの大きい部分の表面に固定され、
前記段差部分は前記第1の高速伝送用回路基板の表面高さと前記第2の高速伝送用回路基板の表面高さとが一致するような高さを有する請求項1〜4のいずれかに記載の高速伝送用回路基板の接続構造。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009155954A JP5504712B2 (ja) | 2009-06-30 | 2009-06-30 | 高速伝送用回路基板の接続構造 |
US12/801,279 US8395906B2 (en) | 2009-06-30 | 2010-06-01 | High-speed transmission circuit board connection structure |
CN201010218313.6A CN101938882B (zh) | 2009-06-30 | 2010-06-29 | 高速传输用电路板的连接结构 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009155954A JP5504712B2 (ja) | 2009-06-30 | 2009-06-30 | 高速伝送用回路基板の接続構造 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011014643A JP2011014643A (ja) | 2011-01-20 |
JP5504712B2 true JP5504712B2 (ja) | 2014-05-28 |
Family
ID=43380499
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009155954A Expired - Fee Related JP5504712B2 (ja) | 2009-06-30 | 2009-06-30 | 高速伝送用回路基板の接続構造 |
Country Status (3)
Country | Link |
---|---|
US (1) | US8395906B2 (ja) |
JP (1) | JP5504712B2 (ja) |
CN (1) | CN101938882B (ja) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5625813B2 (ja) * | 2010-08-12 | 2014-11-19 | 株式会社村田製作所 | 通信端末装置 |
CN102523678A (zh) * | 2011-11-18 | 2012-06-27 | 华为技术有限公司 | Pcb及电子设备 |
JP6300296B2 (ja) * | 2013-08-27 | 2018-03-28 | 住友電工デバイス・イノベーション株式会社 | 伝送線路 |
US9504157B2 (en) * | 2013-09-03 | 2016-11-22 | Raytheon Company | Hybrid circuit assembly |
CN114449748B (zh) * | 2020-10-30 | 2024-03-15 | 鹏鼎控股(深圳)股份有限公司 | 传输线结构及其制备方法 |
CN112635408B (zh) * | 2020-12-21 | 2022-08-16 | 上海富乐华半导体科技有限公司 | 一种dbc基板上铜箔台阶的制作方法 |
WO2022217549A1 (en) * | 2021-04-15 | 2022-10-20 | Aes Global Holdings Pte Ltd. | Printed circuit board grounding |
US11924964B2 (en) * | 2022-04-07 | 2024-03-05 | Western Digital Technologies, Inc. | Printed circuit board for galvanic effect reduction |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5888401U (ja) * | 1981-12-11 | 1983-06-15 | 株式会社東芝 | マイクロストリツプ線路の接続回路 |
JPH04180401A (ja) * | 1990-11-15 | 1992-06-26 | Hitachi Ltd | 高周波伝送線路 |
JPH0653702A (ja) * | 1992-07-30 | 1994-02-25 | Kokusai Electric Co Ltd | マイクロ波集積回路の実装構造 |
JPH0685154A (ja) * | 1992-09-07 | 1994-03-25 | Hitachi Ltd | 半導体集積回路装置 |
JPH07147351A (ja) * | 1993-11-24 | 1995-06-06 | Oki Electric Ind Co Ltd | 回路基板 |
JPH09321501A (ja) * | 1996-05-30 | 1997-12-12 | Mitsubishi Electric Corp | 多層高周波回路基板 |
JP2001144221A (ja) * | 1999-11-17 | 2001-05-25 | Mitsubishi Electric Corp | 高周波回路 |
JP2002185202A (ja) | 2000-12-08 | 2002-06-28 | Mitsubishi Electric Corp | 高周波回路基板 |
JP2003209401A (ja) * | 2002-01-11 | 2003-07-25 | Hitachi Kokusai Electric Inc | 高周波回路 |
JP2004112178A (ja) | 2002-09-17 | 2004-04-08 | Fujitsu Quantum Devices Ltd | 伝送線路及びそれを有する装置 |
JP2005243970A (ja) | 2004-02-26 | 2005-09-08 | Kyocera Corp | 複合回路基板 |
US7348666B2 (en) * | 2004-06-30 | 2008-03-25 | Endwave Corporation | Chip-to-chip trench circuit structure |
JP4464291B2 (ja) * | 2005-02-21 | 2010-05-19 | 三菱電機株式会社 | 高周波回路 |
JP4283820B2 (ja) * | 2006-05-31 | 2009-06-24 | ユーディナデバイス株式会社 | 電子装置 |
-
2009
- 2009-06-30 JP JP2009155954A patent/JP5504712B2/ja not_active Expired - Fee Related
-
2010
- 2010-06-01 US US12/801,279 patent/US8395906B2/en not_active Expired - Fee Related
- 2010-06-29 CN CN201010218313.6A patent/CN101938882B/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN101938882B (zh) | 2015-06-24 |
US8395906B2 (en) | 2013-03-12 |
CN101938882A (zh) | 2011-01-05 |
JP2011014643A (ja) | 2011-01-20 |
US20100328920A1 (en) | 2010-12-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5504712B2 (ja) | 高速伝送用回路基板の接続構造 | |
JP5881752B2 (ja) | トランジスタアウトラインハウジング及びその製造方法 | |
JP5506737B2 (ja) | 信号伝送回路 | |
JP4923542B2 (ja) | 光素子用ステムとこれを用いた光半導体装置 | |
US7306377B2 (en) | Integrated optical sub-assembly having epoxy chip package | |
JP2009302438A (ja) | 光半導体装置 | |
JP2000150772A (ja) | マルチチップモジュール及びその製造方法 | |
US20130101251A1 (en) | Optical Module and Multilayer Substrate | |
JP2019046922A (ja) | 光モジュール及び光伝送装置 | |
JP4514709B2 (ja) | プリント配線基板、その製造方法、リードフレームパッケージおよび光モジュール | |
US20100172037A1 (en) | Optical module | |
JP2007287767A (ja) | 光サブアセンブリ | |
CN109752804B (zh) | 光模块构造体 | |
JP7059865B2 (ja) | 光送信器 | |
JP2004241915A (ja) | 光送受信モジュール、光送信モジュール及び光受信モジュール | |
JP2014007390A (ja) | 多層配線基板 | |
US9922918B2 (en) | Substrate for stacked module, stacked module, and method for manufacturing stacked module | |
TW201826612A (zh) | 用以連接光纖和電氣導體之連接器 | |
JP2010034386A (ja) | 光半導体装置 | |
JP5302177B2 (ja) | 光導波路基板および光電気混載装置 | |
JP2009071094A (ja) | 部品内蔵基板 | |
JP2012142226A (ja) | 伝送コネクタ用の中継基板 | |
JP6262551B2 (ja) | 光モジュール | |
JP7300625B2 (ja) | 半導体装置の実装構造、光モジュール、及び半導体装置の実装構造の製造方法 | |
JP7113325B2 (ja) | 光モジュール構造体 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20110826 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20120809 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120904 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20121105 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20130702 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20140218 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20140303 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5504712 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |