JP5058466B2 - ビア構造体の形成方法及びこのようなビア構造体を合併させた相変化記憶素子の製造方法 - Google Patents
ビア構造体の形成方法及びこのようなビア構造体を合併させた相変化記憶素子の製造方法 Download PDFInfo
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- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 1
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Description
10:サセプター
100:半導体基板
102:層間絶縁膜
104:下部電極コンタクトプラグ
106:下部電極
108:モールディング絶縁膜
108’:予備ビアホール
110:スペーサ絶縁膜
110’:スペーサ
112:ビアホール
114:相変化物質膜
114’:相変化物質膜パターン
116:イオンビーム
118:ビアプラグ
120:上部電極
Claims (16)
- (a)予備ビアホールを有する絶縁膜を形成する段階と、
(b)前記予備ビアホールの側面にスペーサを形成して縦横比、縦方向のビア軸、側面及び基底面を有するビアホールを形成する段階と、
(c)前記絶縁膜の上部面、前記ビアホールの側面及び基底面上に第1充填膜を形成する段階と、(d)前記第1充填膜の上部を除去して、前記ビアホール内の第1充填膜の下部を残留させ、前記第1充填膜の下部は最初の基底面及び側面の下部領域を覆う予備プラグを形成して変更された縦横比を有する変更されたビアホールを形成する段階と、
(e)前記絶縁膜の上部面、側面の上部及び予備プラグ上に連続充填膜を形成する段階と、
(f)前記連続充填膜の上部を除去して、変更されたビアホール内に連続充填膜の下部を残留させ、前記連続充填膜の下部は予備プラグの延長部を形成して修正されたビアホールの側面の中間領域を覆う段階と、
(g)前記連続充填膜を(e)形成段階と(f)除去段階を繰り返して多数の充填膜部位にビアホールを埋め込めてプラグ構造を形成する段階と、を有し、
前記第1充填膜の上部をエッチングし、前記ビアホール内の第1充填膜の下部を残留させることは、IBE(Ion Beam Etching)を用いて前記第1充填膜の上部をエッチングすることを含み、第1入射角を有する前記イオンビームは縦方向の開口軸からオフセットされ、
前記連続充填膜の上部をエッチングし、前記ビアホール内に前記連続充填膜の下部を残留させることは、イオンビームエッチング(IBE)を用いて前記連続充填膜の上部をエッチングすることを含み、第2入射角を有する前記イオンビームは縦方向の開口軸からオフセットされ、
前記第1入射角は前記イオンビームが前記ビアホールの基底面に直接の入射が遮断される範囲で選択され、
前記第2入射角は前記イオンビームが前記予備プラグの上部面に直接の入射が遮断される範囲で選択されることを特徴とするプラグ構造の形成方法。 - 前記第1入射角は前記イオンビームが前記予備プラグを形成する前記第1充填膜の下部との直接の入射が遮断される範囲で選択され、
前記第2入射角は前記イオンビームが前記予備プラグの延長部を形成する前記連続充填膜の下部との直接の入射が遮断される範囲で選択されることを特徴とする請求項1に記載のプラグ構造の形成方法。 - 前記第1充填膜は導電物質であり、前記連続充填膜は導電物質であることを特徴とする請求項1に記載のプラグ構造の形成方法。
- 前記第1充填膜は相変化物質であり、前記連続充填膜は相変化物質であることを特徴とする請求項3に記載のプラグ構造の形成方法。
- 前記第1充填膜は、Ge1−(x+y)SbxTey(x>0、y>0及びx+y<1)によって代表される第1GST合金であり、
前記連続充填膜は、Ge1−(a+b)SbaTeb(a>0、b>0及びa+b<1)によって代表される第2GST合金であることを特徴とする請求項4に記載のプラグ構造の形成方法。 - 前記第1GST合金及び第2GST合金は実質的に同一組成を有することを特徴とする請求項5に記載のプラグ構造の形成方法。
- 前記第1入射角はイオンビームが予備プラグを形成する第1充填膜の下部に直接的に入射するそれ以下の第1最小値を有し、
前記第2入射角はイオンビームが予備プラグの延長部を形成する前記連続充填膜の下部に直接的に入射するそれ以下の第2最小値を有し、
前記第1最小値は第2最小値よりも小さいことを特徴とする請求項2に記載のプラグ構造の形成方法。 - 前記第1入射角はイオンビームが予備プラグを形成する第1充填膜の下部に直接的に入射するそれ以下の第1最小値を有して、第1最小値はビアホールの縦横比として作用し、
前記第2入射角はイオンビームが予備プラグの延長部を形成する前記連続充填膜の下部に直接的に入射するそれ以下の第2最小値を有して、前記第2最小値は変更された縦横比として作用し、
前記縦横比が大きくなれば前記入射角が有する最小値はさらに小さくなることを特徴とする請求項2に記載のプラグ構造の形成方法。 - 前記第1入射角は、30゜ないし85゜であることを特徴とする請求項2に記載のプラグ構造の形成方法。
- 前記第1充填膜上部を除去して前記絶縁膜の上部面を露出させ、
前記連続充填膜の上部を除去して前記絶縁膜の上部面を露出させることを特徴とする請求項1に記載のプラグ構造の形成方法。 - 前記第1充填膜上部を除去して前記絶縁膜の上部面上の前記第1充填膜を所定厚さで残し、
前記連続充填膜の上部を除去して前記絶縁膜の上部面上の前記連続充填膜を所定厚さで残すことを特徴とする請求項1に記載のプラグ構造の形成方法。 - (a)予備ビアホールを有する絶縁膜を形成する段階と、
(b)前記予備ビアホールの側面にスペーサを形成して縦横比、縦方向の開口軸、側面及び基底面を有するビアホールを形成する段階と、
(c)前記絶縁膜の上部面、前記ビアホールの側面及び基底面上に第1相変化充填膜を形成する段階と、
(d)前記第1相変化充填膜の上部を除去して、前記ビアホール内に第1相変化充填膜の下部を残留させ、前記第1充填膜の下部は最初基底面及び側面の下部領域を覆う予備プラグを形成して変更された縦横比を有する変更されたビアホールを形成する段階と、
(e)前記絶縁膜上部面、側面の上部及び予備プラグ上に連続相変化充填膜を形成する段階と、
(f)前記連続相変化充填膜の上部を除去して、変更されたビアホール内に前記連続相変化充填膜の下部を残留させ、前記連続相変化充填膜の下部は予備プラグの延長部を形成し側面の中間領域を覆う段階と、
(g)前記連続相変化充填膜を(e)形成工程及び(f)除去工程を繰り返して多数の相変化充填膜部位に前記ビアホールを埋め込めて相変化プラグ構造を形成する段階と、を有し、 前記第1相変化充填膜の上部を除去して前記ビアホール内に前記第1相変化充填膜の下部を残留させることは、IBE(Ion Beam Etching)を用いて前記第1相変化充填膜の上部をエッチングすることを含み、第1入射角を有する前記イオンビームは縦方向の開口軸からオフセットされ、前記連続相変化充填膜の上部をエッチングし、前記ビアホール内に前記連続相変化充填膜の下部を残留させることは、イオンビームエッチング(IBE)を用いて前記連続相変化充填膜の上部をエッチングすることを含み、第2入射角を有する前記イオンビームは縦方向の開口軸からオフセットされ、前記第1入射角は前記イオンビームが前記ビアホールの基底面に直接的な入射が遮断される範囲で選択され、前記第2入射角は前記イオンビームが前記予備プラグの上部面に直接的な入射が遮断される範囲で選択されることを特徴とする相変化記憶素子の製造方法。 - (a)前記絶縁膜を形成する以前に、
(a−1)半導体基板の上に層間絶縁膜を形成し、
(a−2)前記層間絶縁膜の上に下部電極を形成することをさらに含み、
前記ビアホールは、前記下部電極の領域を露出させることを特徴とする請求項12に記載の相変化記憶素子の製造方法。 - 前記第1入射角は前記イオンビームが前記予備プラグを形成する前記第1充填膜の下部との直接的な入射が遮断される範囲で選択され、
前記第2入射角は前記イオンビームが前記予備プラグの延長部を形成する前記連続相変化充填膜の下部との直接的な入射が遮断される範囲で選択されることを特徴とする請求項12に記載の相変化記憶素子の製造方法。 - 前記第1相変化充填膜は、Ge1−(x+y)SbxTey(x>0、y>0及びx+y<1)によって代表される第1GST合金であり、
前記連続相変化充填膜は、Ge1−(a+b)SbaTeb(a>0、b>0及びa+b<1)によって代表される第2GST合金であることを特徴とする請求項12に記載の相変化記憶素子の製造方法。 - 前記相変化プラグ構造と電気的に接触し、前記相変化プラグ構造と隣接した絶縁膜の上部面領域とのオーバーラップされる上部電極を形成することをさらに含むことを特徴とする請求項12に記載の相変化記憶素子の製造方法。
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