JP4806250B2 - 多種動作電圧を有する集積回路分離用半導体構造 - Google Patents
多種動作電圧を有する集積回路分離用半導体構造 Download PDFInfo
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- JP4806250B2 JP4806250B2 JP2005326948A JP2005326948A JP4806250B2 JP 4806250 B2 JP4806250 B2 JP 4806250B2 JP 2005326948 A JP2005326948 A JP 2005326948A JP 2005326948 A JP2005326948 A JP 2005326948A JP 4806250 B2 JP4806250 B2 JP 4806250B2
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- 239000004065 semiconductor Substances 0.000 title claims description 40
- 238000002955 isolation Methods 0.000 title description 47
- 239000012535 impurity Substances 0.000 claims description 33
- 239000000758 substrate Substances 0.000 claims description 30
- 238000000926 separation method Methods 0.000 claims description 27
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 1
- 229910052710 silicon Inorganic materials 0.000 claims 1
- 239000010703 silicon Substances 0.000 claims 1
- 238000000034 method Methods 0.000 description 5
- 238000005259 measurement Methods 0.000 description 4
- 230000004075 alteration Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823481—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Element Separation (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Description
202 N型埋込層(埋込層)
210 N型分離リング(第一のリング)
232 P型分離リング(第二のリング)
204 第一の回路
206 第二の回路
208 半導体基板
214,222,300 P型ウェル(ウェル領域)
218,226 N型ウェル(ウェル領域)
230 イオン増強分離層
Claims (7)
- 異なった電圧レベルで動作する第一の回路と第二の回路を分離する半導体構造において、
半導体基板上の前記第一の回路と前記第二の回路を囲み、不純物領域からなる第一のリングと、
前記半導体基板のバックサイド・バイアスから前記第一の回路と前記第二の回路を分離する前記第一のリングと連結し、前記半導体基板上の前記第一の回路と前記第二の回路との底部に連続的に伸びる埋込層と、
前記埋込層の不純物とは異なった極性を有する不純物でドープされ、前記埋込層と、前記第一の回路と前記第二の回路のデバイスが上部に形成されるウェル領域との間に介在するイオン増強分離層とから構成され、
前記ウェル領域には、前記第一のリングの不純物とは異なった極性を有する不純物からなるウェルが、前記第一のリングに隣接する位置に配置されている
ことを特徴とする半導体構造。 - 前記半導体基板上で前記第一のリングを囲み、不純物領域からなる第二のリングをさらに備え、前記第二のリングが、前記第一のリングの不純物とは異なる極性の不純物でドープされたものであることを特徴とする請求項1記載の半導体構造。
- 前記半導体基板が、前記第二のリングの不純物と同一の極性を有する不純物でドープされたものであることを特徴とする請求項2記載の半導体構造。
- 前記イオン増強分離層が、第二のリングの不純物濃度と同一の不純物濃度を有するものであることを特徴とする請求項2記載の半導体構造。
- 前記イオン増強分離層が、P型エピタキシャルシリコン層であることを特徴とする請求項4記載の半導体構造。
- 前記埋込層が、前記第一のリングと同一の極性を有する不純物でドープされたものであることを特徴とする請求項1記載の半導体構造。
- 異なった電圧レベルで動作する第一の回路と第二の回路を分離する半導体構造において、
半導体基板上で前記第一の回路と前記第二の回路を囲み、不純物領域からなる第一のリングと、
前記第一のリングの不純物とは異なる極性の不純物でドープされ、前記半導体基板上で前記第一のリングを囲み、不純物領域からなる第二のリングと、
前記半導体基板のバックサイド・バイアスから前記第一の回路と前記第二の回路を分離するための前記第一のリングと連結し、前記半導体基板における前記第一の回路と前記第二の回路の底部に連続的に伸びる埋込層と、
前記埋込層の不純物とは異なる極性を有する不純物でドープされ、前記埋込層と、前記第一の回路と前記第二の回路が上部に形成されるウェル領域との間に介在するイオン増強分離層とから構成され、
前記ウェル領域には、前記第一のリングの不純物とは異なった極性を有する不純物からなるウェルが、前記第一のリングに隣接する位置に配置されている
ことを特徴とする半導体構造。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US62748804P | 2004-11-12 | 2004-11-12 | |
US60/627,488 | 2004-11-12 |
Publications (3)
Publication Number | Publication Date |
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JP2006140496A JP2006140496A (ja) | 2006-06-01 |
JP2006140496A5 JP2006140496A5 (ja) | 2011-08-11 |
JP4806250B2 true JP4806250B2 (ja) | 2011-11-02 |
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JP2005326948A Active JP4806250B2 (ja) | 2004-11-12 | 2005-11-11 | 多種動作電圧を有する集積回路分離用半導体構造 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7498653B2 (ja) |
JP (1) | JP4806250B2 (ja) |
KR (1) | KR100797896B1 (ja) |
TW (1) | TWI294159B (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI426567B (zh) * | 2010-03-03 | 2014-02-11 | Himax Tech Ltd | 製造半導體裝置的方法 |
JP5594407B2 (ja) * | 2013-07-24 | 2014-09-24 | 富士電機株式会社 | 半導体装置 |
JP6326858B2 (ja) * | 2014-02-24 | 2018-05-23 | セイコーエプソン株式会社 | 半導体装置およびその製造方法 |
JP6364898B2 (ja) * | 2014-04-07 | 2018-08-01 | セイコーエプソン株式会社 | 半導体装置 |
TWI527241B (zh) * | 2014-06-11 | 2016-03-21 | 新唐科技股份有限公司 | 半導體裝置 |
US10276657B2 (en) | 2017-09-13 | 2019-04-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Isolation structure for active devices |
Family Cites Families (12)
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FR2655197B1 (fr) * | 1989-11-28 | 1995-03-17 | Sgs Thomson Microelectronics | Circuit integre comprenant des memoires et son procede de fabrication. |
JP3252432B2 (ja) * | 1992-03-19 | 2002-02-04 | 松下電器産業株式会社 | 半導体装置およびその製造方法 |
US5602051A (en) * | 1995-10-06 | 1997-02-11 | International Business Machines Corporation | Method of making stacked electrical device having regions of electrical isolation and electrical connection on a given stack level |
JPH09199680A (ja) * | 1996-01-17 | 1997-07-31 | Nec Corp | 半導体装置およびその製造方法 |
JPH1070243A (ja) * | 1996-05-30 | 1998-03-10 | Toshiba Corp | 半導体集積回路装置およびその検査方法およびその検査装置 |
US6255156B1 (en) * | 1997-02-07 | 2001-07-03 | Micron Technology, Inc. | Method for forming porous silicon dioxide insulators and related structures |
JPH11251447A (ja) * | 1998-02-27 | 1999-09-17 | Nippon Foundry Inc | 半導体装置及びその製造方法 |
US6093623A (en) * | 1998-08-04 | 2000-07-25 | Micron Technology, Inc. | Methods for making silicon-on-insulator structures |
JP2002093195A (ja) * | 2000-09-18 | 2002-03-29 | Mitsubishi Electric Corp | 半導体記憶装置および半導体記憶装置のテスト方法 |
JP3950294B2 (ja) * | 2000-11-16 | 2007-07-25 | シャープ株式会社 | 半導体装置 |
KR20020044001A (ko) * | 2000-12-05 | 2002-06-14 | 윤종용 | 반도체 장치의 미세 패턴들간의 갭을 채우는 절연층형성방법 |
JP2004253499A (ja) * | 2003-02-19 | 2004-09-09 | Hitachi Ltd | 半導体装置 |
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- 2005-11-11 KR KR1020050108026A patent/KR100797896B1/ko active IP Right Grant
- 2005-11-11 TW TW094139587A patent/TWI294159B/zh active
- 2005-11-11 JP JP2005326948A patent/JP4806250B2/ja active Active
- 2005-11-12 US US11/273,228 patent/US7498653B2/en active Active
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US7498653B2 (en) | 2009-03-03 |
US20070235831A1 (en) | 2007-10-11 |
TWI294159B (en) | 2008-03-01 |
KR20060052630A (ko) | 2006-05-19 |
TW200620538A (en) | 2006-06-16 |
JP2006140496A (ja) | 2006-06-01 |
KR100797896B1 (ko) | 2008-01-24 |
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