JP4531773B2 - Dmaデバイス用リアルタイムデバッグサポート及びその方法 - Google Patents
Dmaデバイス用リアルタイムデバッグサポート及びその方法 Download PDFInfo
- Publication number
- JP4531773B2 JP4531773B2 JP2006551090A JP2006551090A JP4531773B2 JP 4531773 B2 JP4531773 B2 JP 4531773B2 JP 2006551090 A JP2006551090 A JP 2006551090A JP 2006551090 A JP2006551090 A JP 2006551090A JP 4531773 B2 JP4531773 B2 JP 4531773B2
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- Prior art keywords
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- debug
- information
- transfer
- memory access
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3466—Performance evaluation by tracing or monitoring
- G06F11/349—Performance evaluation by tracing or monitoring for interfaces, buses
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3466—Performance evaluation by tracing or monitoring
- G06F11/3485—Performance evaluation by tracing or monitoring for I/O devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
- G06F11/3636—Software debugging by tracing the execution of the program
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Computer Hardware Design (AREA)
- Debugging And Monitoring (AREA)
- Bus Control (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Description
図中の構成要素は、当業者にとって、簡潔明瞭を期して示されており、必ずしも実寸に基づいて図示されていないことは明らかである。例えば、本発明の実施形態の理解をより深めるため、図中の構成要素の一部の寸法が他の構成要素よりも誇張されている。
Claims (5)
- 通信バス(12)と、
前記通信バスに接続され、複数の情報チャンネルを制御するダイレクトメモリアクセス(DMA)装置(16)であって、各情報チャンネルがチャンネル転送を介してシステム内のソースから送り先に情報を転送するダイレクトメモリアクセス装置(16)と、
前記ダイレクトメモリアクセス装置(16)に接続されるデバッグ制御回路網(70)であって、そのデバッグ制御回路網は、チャンネル毎にプログラム化されることにより、前記ダイレクトメモリアクセス装置の操作パラメータに関するデバッグメッセージを選択的に提供するデバッグ制御回路網(70)と
を備えるシステム(10)。 - 請求項1記載のシステムにおいて、
前記ダイレクトメモリアクセス装置(16)の操作パラメータは、転送境界が生じたか否かと定期的状態情報とのうちの少なくとも一つに関する情報を含むシステム。 - 請求項2記載のシステムにおいて、
前記デバッグ制御回路網(70)は、更に、前記ダイレクトメモリアクセス装置(16)がチャンネル転送リクエストを受信した後にチャンネル転送を開始する前記ダイレクトメモリアクセス装置(16)のシステムディレイに関する待機時間情報を含む少なくとも一つのデバッグメッセージを提供するシステム。 - システムのリアルタイムデバッグサポート方法であって、
通信バス(12)を提供するステップと、
ダイレクトメモリアクセス(DMA)装置(16)を前記通信バス(12)に接続するステップであって、前記ダイレクトメモリアクセス装置(16)が複数の情報チャンネルを制御し、各情報チャンネルがチャンネル転送を介してシステム内のソースから送り先に情報を転送するステップと、
デバッグ制御回路網(70)を前記ダイレクトメモリアクセス装置(16)に接続するステップであって、そのデバッグ制御回路網は、チャンネル毎にプログラム化されることにより、前記ダイレクトメモリアクセス装置(16)の操作パラメータに関するデバッグメッセージを選択的に提供するステップと
を備える方法。 - 請求項4記載の方法は、更に、
転送境界が生じたか否かと定期的状態情報とのうちの少なくとも一つに関する情報として前記ダイレクトメモリアクセス装置(16)の操作パラメータを実行するステップを備える方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/764,110 US6920586B1 (en) | 2004-01-23 | 2004-01-23 | Real-time debug support for a DMA device and method thereof |
PCT/US2004/043491 WO2005073855A1 (en) | 2004-01-23 | 2004-12-21 | Real-time debug support for a dma device and method thereof |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2007522550A JP2007522550A (ja) | 2007-08-09 |
JP2007522550A5 JP2007522550A5 (ja) | 2007-12-20 |
JP4531773B2 true JP4531773B2 (ja) | 2010-08-25 |
Family
ID=34740159
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006551090A Expired - Fee Related JP4531773B2 (ja) | 2004-01-23 | 2004-12-21 | Dmaデバイス用リアルタイムデバッグサポート及びその方法 |
Country Status (6)
Country | Link |
---|---|
US (2) | US6920586B1 (ja) |
JP (1) | JP4531773B2 (ja) |
KR (1) | KR101045475B1 (ja) |
CN (1) | CN100440154C (ja) |
TW (1) | TWI354885B (ja) |
WO (1) | WO2005073855A1 (ja) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6920586B1 (en) * | 2004-01-23 | 2005-07-19 | Freescale Semiconductor, Inc. | Real-time debug support for a DMA device and method thereof |
EP1899827B1 (en) * | 2005-06-30 | 2010-09-08 | Freescale Semiconductor, Inc. | Device and method for executing a dma task |
DE602005027003D1 (de) * | 2005-06-30 | 2011-04-28 | Freescale Semiconductor Inc | Einrichtung und verfahren zur steuerung einer ausführung einer dma-task |
EP1899825B1 (en) * | 2005-06-30 | 2009-07-22 | Freescale Semiconductor, Inc. | Device and method for controlling multiple dma tasks |
CN101218570B (zh) * | 2005-06-30 | 2010-05-26 | 飞思卡尔半导体公司 | 在直接存储器存取任务请求之间进行仲裁的装置和方法 |
US7757028B2 (en) * | 2005-12-22 | 2010-07-13 | Intuitive Surgical Operations, Inc. | Multi-priority messaging |
US8054752B2 (en) | 2005-12-22 | 2011-11-08 | Intuitive Surgical Operations, Inc. | Synchronous data communication |
US7756036B2 (en) * | 2005-12-22 | 2010-07-13 | Intuitive Surgical Operations, Inc. | Synchronous data communication |
US7865704B2 (en) | 2006-03-29 | 2011-01-04 | Freescale Semiconductor, Inc. | Selective instruction breakpoint generation based on a count of instruction source events |
US8160084B2 (en) * | 2006-09-22 | 2012-04-17 | Nokia Corporation | Method for time-stamping messages |
US7958401B2 (en) * | 2008-07-25 | 2011-06-07 | Freescale Semiconductor, Inc. | Debug trace messaging with one or more characteristic indicators |
US8024620B2 (en) * | 2008-07-25 | 2011-09-20 | Freescale Semiconductor, Inc. | Dynamic address-type selection control in a data processing system |
US8402258B2 (en) | 2008-07-25 | 2013-03-19 | Freescale Semiconductor, Inc. | Debug message generation using a selected address type |
US8250250B2 (en) * | 2009-10-28 | 2012-08-21 | Apple Inc. | Using central direct memory access (CDMA) controller to test integrated circuit |
US8638792B2 (en) * | 2010-01-22 | 2014-01-28 | Synopsys, Inc. | Packet switch based logic replication |
US8397195B2 (en) * | 2010-01-22 | 2013-03-12 | Synopsys, Inc. | Method and system for packet switch based logic replication |
JP5528939B2 (ja) * | 2010-07-29 | 2014-06-25 | ルネサスエレクトロニクス株式会社 | マイクロコンピュータ |
US8713370B2 (en) * | 2011-08-11 | 2014-04-29 | Apple Inc. | Non-intrusive processor tracing |
US9256399B2 (en) * | 2013-06-27 | 2016-02-09 | Atmel Corporation | Breaking program execution on events |
US9830245B2 (en) | 2013-06-27 | 2017-11-28 | Atmel Corporation | Tracing events in an autonomous event system |
US9645870B2 (en) | 2013-06-27 | 2017-05-09 | Atmel Corporation | System for debugging DMA system data transfer |
US9552279B2 (en) * | 2013-08-16 | 2017-01-24 | Nxp Usa, Inc. | Data bus network interface module and method therefor |
WO2015075505A1 (en) * | 2013-11-22 | 2015-05-28 | Freescale Semiconductor, Inc. | Apparatus and method for external access to core resources of a processor, semiconductor systems development tool comprising the apparatus, and computer program product and non-transitory computer-readable storage medium associated with the method |
US9419621B1 (en) | 2015-09-18 | 2016-08-16 | Freescale Semiconductor, Inc. | System on chip and method of operating a system on chip |
US11231987B1 (en) * | 2019-06-28 | 2022-01-25 | Amazon Technologies, Inc. | Debugging of memory operations |
US11099966B2 (en) * | 2020-01-09 | 2021-08-24 | International Business Machines Corporation | Efficient generation of instrumentation data for direct memory access operations |
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JPH0758475B2 (ja) * | 1989-05-24 | 1995-06-21 | 株式会社日立製作所 | 端末装置のデータ収集システム |
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KR960016648B1 (ko) * | 1993-12-29 | 1996-12-19 | 현대전자산업 주식회사 | 커먼 컨트롤 중복 스위치 방법 |
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-
2004
- 2004-01-23 US US10/764,110 patent/US6920586B1/en not_active Expired - Fee Related
- 2004-12-21 JP JP2006551090A patent/JP4531773B2/ja not_active Expired - Fee Related
- 2004-12-21 CN CNB2004800407262A patent/CN100440154C/zh not_active Expired - Fee Related
- 2004-12-21 WO PCT/US2004/043491 patent/WO2005073855A1/en active Application Filing
- 2004-12-21 KR KR1020067014758A patent/KR101045475B1/ko not_active IP Right Cessation
-
2005
- 2005-01-04 TW TW094100177A patent/TWI354885B/zh not_active IP Right Cessation
- 2005-04-06 US US11/099,889 patent/US7287194B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN1906589A (zh) | 2007-01-31 |
US6920586B1 (en) | 2005-07-19 |
TW200602852A (en) | 2006-01-16 |
KR20060126734A (ko) | 2006-12-08 |
CN100440154C (zh) | 2008-12-03 |
KR101045475B1 (ko) | 2011-06-30 |
US7287194B2 (en) | 2007-10-23 |
JP2007522550A (ja) | 2007-08-09 |
US20050193256A1 (en) | 2005-09-01 |
WO2005073855A1 (en) | 2005-08-11 |
TWI354885B (en) | 2011-12-21 |
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