JP2019087670A - 炭化シリコン半導体装置及びその製造方法 - Google Patents
炭化シリコン半導体装置及びその製造方法 Download PDFInfo
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Abstract
Description
本発明の実施形態に係る半導体装置としてトレンチゲートを有するMOSトランジスタを用いて説明する。本発明の実施形態に係る半導体装置は、図1に示すように、活性領域(1,2,3,4,5)、絶縁層膜(層間絶縁膜)8、表面電極層14、及び裏面電極層10を備える。活性領域(1,2,3,4,5)は、第1導電型(n+型)のドレイン領域(第1主電極領域)1と、ドレイン領域1の上のキャリア走行領域(2,3)と、キャリア走行領域(2,3)上のソース領域(第2主電極領域)4を有する。キャリア走行領域(2,3)は、第1導電型(n−型)のドリフト領域(第1半導体層)2と、第2導電型(p型)のベース層(第2半導体層)3を備える。ソース領域4は、キャリア走行領域(2,3)の上部に設けられ、キャリア走行領域(2,3)よりも高不純物密度の半導体領域である。本発明の実施形態では図1に示す構造の上部構造に着目しているので、ソース領域(第2主電極領域)4が「主電極領域」として定義される。主電極領域4に隣接して第2導電型(p+型)のベースコンタクト領域5が配置されている。主電極領域4の上面には、表面電極層14が設けられる。ドレイン領域1は、キャリア走行領域(2,3)よりも高不純物密度の半導体領域である。ドレイン領域1の下面には、裏面電極層10が設けられる。
次に、図2〜図7に示す工程断面図を用いて、本発明の実施形態に係る半導体装置の製造方法を、トレンチゲート型MOSFETの場合を一例に説明する。なお、以下に述べるトレンチゲート型MOSFETの製造方法は一例であり、特許請求の範囲に記載した趣旨の範囲であれば、この変形例を含めて、これ以外の種々の製造方法により実現可能であることは勿論である。
上記のように、本発明の実施形態を記載したが、この開示の一部をなす論述及び図面は本発明を限定するものであると理解すべきではない。この開示から当業者には様々な代替実施形態、実施例及び運用技術が明らかとなろう。
2…ドリフト領域(第1半導体層)
3…ベース領域(第2半導体層)
4…ソース領域(第2主電極領域)
5…ベースコンタクト領域
6…ゲート絶縁膜
7…ゲート電極
8…絶縁膜層(層間絶縁膜)
9…トレンチ
10…裏面電極層(ドレイン電極層)
11…ソースコンタクト層
12…バリアメタル層
13…上部バリアメタル層
14…表面電極層(ソース電極層)
Claims (6)
- 第1導電型のドリフト領域と、
前記ドリフト領域上に配置された第2導電型のベース領域と、
前記ベース領域の上部に選択的に埋め込まれ、前記ドリフト領域よりも高不純物密度で第1導電型の主電極領域と、
前記主電極領域の深さより浅いレベルまで、前記主電極領域の上面側にラウンド部を有し、前記ラウンド部から前記ベース領域を貫通して底部が前記ドリフト領域まで達するトレンチと、
前記トレンチの内側に設けられた絶縁ゲート型電極構造と、
を備え、前記ラウンド部の曲率半径の最小値が、前記深さより大きいことを特徴とする炭化シリコン半導体装置。 - 前記トレンチ内における、前記ラウンド部が定義される曲面の終端位置は、前記ベース領域から0.1μm以上離間していることを特徴とする請求項1に記載の炭化シリコン半導体装置。
- 第1導電型のドリフト領域の上面側に第2導電型のベース領域を形成する工程と、
前記ベース領域の上部に、前記ドリフト領域よりも高不純物密度で第1導電型の主電極領域を選択的に埋め込む工程と、
前記主電極領域の上面から前記ベース領域を貫通して底部が前記ドリフト領域まで達するトレンチを形成する工程と、
水素ガス雰囲気で熱処理を行い、前記主電極領域の上面に開口する前記トレンチの開口部の角部を丸めて、前記主電極領域の深さより浅いレベルまで、前記開口部にラウンド部を形成する工程と、
前記トレンチの内壁の熱酸化処理を行い、該熱酸化処理で形成された熱酸化膜を除去する工程と、
前記トレンチの内側に絶縁ゲート構造を形成する工程と、
を含み、前記ラウンド部の曲率半径の最小値が、前記主電極領域の深さより大きいことを特徴とする炭化シリコン半導体装置の製造方法。 - 前記トレンチ内における、前記ラウンド部が定義される曲面の終端位置は、前記ベース領域から0.1μm以上離間するように形成されることを特徴とする請求項3に記載の炭化シリコン半導体装置の製造方法。
- 前記トレンチの内壁の熱酸化処理は、1回だけ実施されることを特徴とする請求項3又は4に記載の炭化シリコン半導体装置の製造方法。
- 前記熱酸化膜を除去する工程により、2nm〜20nmの厚さで前記トレンチの内壁の層を除去することを特徴とする請求項5に記載の炭化シリコン半導体装置の製造方法。
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