JP2017147300A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 143
- 239000000758 substrate Substances 0.000 claims abstract description 68
- 239000011229 interlayer Substances 0.000 claims description 9
- 230000000052 comparative effect Effects 0.000 description 16
- 239000010410 layer Substances 0.000 description 16
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 9
- 229920005591 polysilicon Polymers 0.000 description 9
- 238000009751 slip forming Methods 0.000 description 8
- 239000000463 material Substances 0.000 description 7
- 239000012535 impurity Substances 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 230000005684 electric field Effects 0.000 description 4
- 238000002347 injection Methods 0.000 description 4
- 239000007924 injection Substances 0.000 description 4
- 230000001737 promoting effect Effects 0.000 description 4
- 238000009825 accumulation Methods 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005121 nitriding Methods 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
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Abstract
Description
[先行技術文献]
[特許文献]
特許文献1 特開2015−181178号公報
特許文献2 特開2005−327806号公報
特許文献3 特開2010−135676号公報
図1は、実施例1に係る半導体装置100の平面図の一例を示す。本例の半導体装置100は、IGBT(Insulated Gate Bipolar Transistor)等のトランジスタを含むトランジスタ部70を有する半導体チップである。また、半導体装置100は、FWD(Free Wheel Diode)等のダイオードを含むダイオード部を有するRC−IGBT(Reverse Conducting−IGBT)であってもよい。図1においてはチップ端部周辺のチップ表面を示しており、他の領域を省略している。
図3は、比較例1に係る半導体装置500の平面図の一例を示す。図4は、比較例1に係る半導体装置500のb−b'断面の一例を示す。
図5は、比較例2に係る半導体装置500の平面図の一例を示す。図6は、比較例2に係る半導体装置500のc−c'断面の一例を示す。
図7は、実施例2に係る半導体装置100の平面図の一例を示す。図8は、実施例2に係る半導体装置100のd−d'断面の一例を示す図である。
Claims (8)
- 半導体基板と、
前記半導体基板に形成された複数のゲートトレンチ部と、
前記半導体基板に形成された複数のエミッタトレンチ部であって、前記複数のゲートトレンチ部のうち隣り合うゲートトレンチ部の間の各々に1以上のエミッタトレンチ部が設けられた、複数のエミッタトレンチ部と
を備え、
前記複数のゲートトレンチ部のうち少なくとも2つのゲートトレンチ部が接続された1組のゲートトレンチ部と、前記複数のエミッタトレンチ部のうち少なくとも2つのエミッタトレンチ部が接続された1組のエミッタトレンチ部との少なくとも一方を有する
半導体装置。 - 前記複数のゲートトレンチ部は、前記複数のゲートトレンチ部の配列方向に均等に形成されている
請求項1に記載の半導体装置。 - 前記1組のゲートトレンチ部は、前記複数のゲートトレンチ部のうち2つのゲートトレンチ部の端部が互いに接続されたループ型構造を有し、
前記1組のエミッタトレンチ部は、前記複数のエミッタトレンチ部のうち2つのエミッタトレンチ部の端部が互いに接続されたループ型構造を有し、
前記1組のエミッタトレンチ部は、平面視で、前記1組のゲートトレンチ部の前記ループ型構造の内側に形成されている
請求項1又は2に記載の半導体装置。 - 前記1組のエミッタトレンチ部は、一の前記1組のゲートトレンチ部と他の前記1組のゲートトレンチ部との間に形成されている
請求項3に記載の半導体装置。 - 前記半導体基板に形成された第1導電型のドリフト領域と、
前記半導体基板であって、前記ドリフト領域の下方に形成された第2導電型のベース領域と
を更に備え、
前記ドリフト領域は、前記ベース領域と接して形成されている
請求項3又は4に記載の半導体装置。 - 前記半導体基板のおもて面において、前記ドリフト領域よりも高濃度である第1導電型のエミッタ領域と、
前記半導体基板のおもて面において、前記ベース領域よりも高濃度である第2導電型のコンタクト領域と
を更に備え、
前記エミッタ領域および前記コンタクト領域は、隣り合う前記ゲートトレンチ部と前記エミッタトレンチ部との間において、前記ゲートトレンチ部と前記エミッタトレンチ部の延伸方向に交互に形成されている
請求項5に記載の半導体装置。 - 前記半導体基板は、前記1組のエミッタトレンチ部の前記ループ型構造の内側において、前記エミッタ領域および前記コンタクト領域を有さない
請求項6に記載の半導体装置。 - 前記1組のエミッタトレンチ部の前記ループ型構造の内側において、前記半導体基板のおもて面を覆う層間絶縁膜を更に備える
請求項3から7のいずれか一項に記載の半導体装置。
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JP2016027051A JP6668804B2 (ja) | 2016-02-16 | 2016-02-16 | 半導体装置 |
US15/390,553 US9825159B2 (en) | 2016-02-16 | 2016-12-26 | Semiconductor device |
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Cited By (3)
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WO2021019882A1 (ja) * | 2019-07-31 | 2021-02-04 | 富士電機株式会社 | 半導体装置 |
US11107910B2 (en) | 2018-02-14 | 2021-08-31 | Fuji Electric Co., Ltd. | Semiconductor device |
US11380784B2 (en) | 2018-02-14 | 2022-07-05 | Fuji Electric Co., Ltd. | Semiconductor device |
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DE102016117264B4 (de) | 2016-09-14 | 2020-10-08 | Infineon Technologies Ag | Leistungshalbleiterbauelement mit Steuerbarkeit von dU/dt |
WO2019017104A1 (ja) * | 2017-07-18 | 2019-01-24 | 富士電機株式会社 | 半導体装置 |
WO2019116748A1 (ja) * | 2017-12-14 | 2019-06-20 | 富士電機株式会社 | 半導体装置およびその製造方法 |
WO2019176327A1 (ja) * | 2018-03-15 | 2019-09-19 | 富士電機株式会社 | 半導体装置 |
JP7279356B2 (ja) * | 2018-12-19 | 2023-05-23 | 富士電機株式会社 | 半導体装置 |
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JP2017135245A (ja) * | 2016-01-27 | 2017-08-03 | 株式会社東芝 | 半導体装置 |
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US9825159B2 (en) | 2017-11-21 |
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