JP2014192432A - 配線基板 - Google Patents
配線基板 Download PDFInfo
- Publication number
- JP2014192432A JP2014192432A JP2013068185A JP2013068185A JP2014192432A JP 2014192432 A JP2014192432 A JP 2014192432A JP 2013068185 A JP2013068185 A JP 2013068185A JP 2013068185 A JP2013068185 A JP 2013068185A JP 2014192432 A JP2014192432 A JP 2014192432A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- region
- connection pad
- arrangement density
- element connection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 78
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 15
- 230000002093 peripheral effect Effects 0.000 claims description 6
- 229910000679 solder Inorganic materials 0.000 abstract description 25
- 238000009413 insulation Methods 0.000 abstract 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 8
- 239000004020 conductor Substances 0.000 description 7
- 239000010949 copper Substances 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 6
- 238000007747 plating Methods 0.000 description 6
- 229920005989 resin Polymers 0.000 description 6
- 239000011347 resin Substances 0.000 description 6
- 230000008602 contraction Effects 0.000 description 5
- 239000011889 copper foil Substances 0.000 description 2
- 239000012777 electrically insulating material Substances 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- JYEUMXHLPRZUAT-UHFFFAOYSA-N 1,2,3-triazine Chemical compound C1=CN=NN=C1 JYEUMXHLPRZUAT-UHFFFAOYSA-N 0.000 description 1
- XQUPVDVFXZDTLT-UHFFFAOYSA-N 1-[4-[[4-(2,5-dioxopyrrol-1-yl)phenyl]methyl]phenyl]pyrrole-2,5-dione Chemical compound O=C1C=CC(=O)N1C(C=C1)=CC=C1CC1=CC=C(N2C(C=CC2=O)=O)C=C1 XQUPVDVFXZDTLT-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 229920003192 poly(bis maleimide) Polymers 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09609—Via grid, i.e. two-dimensional array of vias or holes in a single plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
【解決手段】多数のスルーホール5を有するコア基板1の上下面に、ビルドアップ絶縁層2とビルドアップ配線層3とを交互に積層して成り、上面中央部に多数の半導体素子接続パッド7が格子状の並びに配列された半導体素子接続パッド形成領域Aを有するとともに、コア基板1における半導体素子接続パッド形成領域Aに対向する第1領域Xに第1スルーホール群が第1の配列密度で配列されているとともに、コア基板1の外周部で第1領域Xから離間した第2領域Yに第2のスルーホール群が前記第1の配列密度より低い第2の配列密度で配列されて成る配線基板であって、第1領域Xと第2領域Yとの間の第3領域Zに第3のスルーホール群が第2配列密度よりも高い第3の配列密度で配列されている。
【選択図】図1
Description
図1は、本発明における配線基板の実施形態の一例を示す概略断面図であり、図2は図1の切断線I−Iにおける水平断面図である。
2 ビルドアップ絶縁層
3 ビルドアップ配線層
5 スルーホール
7 半導体素子接続パッド
A 半導体素子接続パッド形成領域
X 第1の領域
Y 第2の領域
Z 第3の領域
Claims (1)
- 多数のスルーホールを有するコア基板の上下面に、ビルドアップ絶縁層とビルドアップ配線層とを交互に積層して成り、上面中央部に前記ビルドアップ配線層から成る多数の半導体素子接続パッドが格子状の並びに配列された半導体素子接続パッド形成領域を有するとともに、前記コア基板における前記半導体素子接続パッド形成領域に対向する第1領域に第1スルーホール群が第1の配列密度で配列されているとともに、前記コア基板の外周部で前記第1領域から離間した第2領域に第2のスルーホール群が前記第1の配列密度より低い第2の配列密度で配列されて成る配線基板であって、前記第1領域と前記第2領域との間の第3領域に第3のスルーホール群が前記第2配列密度よりも高い第3の配列密度で配列されていることを特徴とする配線基板。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013068185A JP6013960B2 (ja) | 2013-03-28 | 2013-03-28 | 配線基板 |
TW103110255A TWI573229B (zh) | 2013-03-28 | 2014-03-19 | 配線基板 |
US14/222,077 US9277657B2 (en) | 2013-03-28 | 2014-03-21 | Wiring board |
KR1020140036172A KR20140118908A (ko) | 2013-03-28 | 2014-03-27 | 배선 기판 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013068185A JP6013960B2 (ja) | 2013-03-28 | 2013-03-28 | 配線基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2014192432A true JP2014192432A (ja) | 2014-10-06 |
JP6013960B2 JP6013960B2 (ja) | 2016-10-25 |
Family
ID=51619705
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2013068185A Active JP6013960B2 (ja) | 2013-03-28 | 2013-03-28 | 配線基板 |
Country Status (4)
Country | Link |
---|---|
US (1) | US9277657B2 (ja) |
JP (1) | JP6013960B2 (ja) |
KR (1) | KR20140118908A (ja) |
TW (1) | TWI573229B (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20170110514A (ko) * | 2016-03-23 | 2017-10-11 | 쿄세라 코포레이션 | 배선 기판 |
JP2018061063A (ja) * | 2018-01-05 | 2018-04-12 | 大日本印刷株式会社 | 貫通電極基板及びその製造方法 |
JP2018152597A (ja) * | 2017-01-13 | 2018-09-27 | 大日本印刷株式会社 | 貫通電極基板及びその製造方法 |
US10755996B2 (en) | 2016-02-05 | 2020-08-25 | Dai Nippon Printing Co., Ltd. | Through electrode substrate and manufacturing method thereof |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6332680B2 (ja) | 2014-06-13 | 2018-05-30 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
TWI526129B (zh) * | 2014-11-05 | 2016-03-11 | Elite Material Co Ltd | Multilayer printed circuit boards with dimensional stability |
KR102486558B1 (ko) | 2015-06-24 | 2023-01-10 | 삼성전자주식회사 | 회로 기판 및 이를 구비한 반도체 패키지 |
JP2017017238A (ja) * | 2015-07-03 | 2017-01-19 | 株式会社ジェイデバイス | 半導体装置及びその製造方法 |
JP2019513303A (ja) * | 2016-03-22 | 2019-05-23 | ジェンサーム インコーポレイテッドGentherm Incorporated | 不均一な熱伝達特性による分散型サーモエレクトリクス |
JP7017995B2 (ja) * | 2018-07-26 | 2022-02-09 | 京セラ株式会社 | 配線基板 |
KR102262073B1 (ko) * | 2018-07-26 | 2021-06-08 | 교세라 가부시키가이샤 | 배선 기판 |
CN115397110B (zh) * | 2022-08-02 | 2023-06-09 | 中山芯承半导体有限公司 | 一种带台阶槽及埋入式线路的基板制作方法 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01100947A (ja) * | 1987-10-14 | 1989-04-19 | Oki Electric Ind Co Ltd | スルーホール構造 |
JP2002324952A (ja) * | 2001-04-24 | 2002-11-08 | Denso Corp | プリント基板 |
JP2005311253A (ja) * | 2004-04-26 | 2005-11-04 | Kyocera Corp | 配線基板 |
JP2007180076A (ja) * | 2005-12-27 | 2007-07-12 | Ibiden Co Ltd | 多層プリント配線板 |
JP2007207781A (ja) * | 2006-01-30 | 2007-08-16 | Fujitsu Ltd | 多層構造のプリント配線基板およびプリント配線基板の製造方法 |
JP2010010521A (ja) * | 2008-06-30 | 2010-01-14 | Kyocer Slc Technologies Corp | 配線基板およびその製造方法 |
JP2011159734A (ja) * | 2010-01-29 | 2011-08-18 | Kyocer Slc Technologies Corp | 配線基板 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001007155A (ja) | 1999-06-21 | 2001-01-12 | Sharp Corp | フリップチップ接続構造体 |
DE60027141T2 (de) * | 1999-10-26 | 2006-12-28 | Ibiden Co., Ltd., Ogaki | Gedruckte mehrschichtleiterplatte und herstellungsverfahren für gedruckte mehrschichtleiterplatte |
US6582979B2 (en) * | 2000-11-15 | 2003-06-24 | Skyworks Solutions, Inc. | Structure and method for fabrication of a leadless chip carrier with embedded antenna |
US6611055B1 (en) * | 2000-11-15 | 2003-08-26 | Skyworks Solutions, Inc. | Leadless flip chip carrier design and structure |
EP1615485A4 (en) * | 2003-04-07 | 2009-04-22 | Ibiden Co Ltd | MULTILAYER CONDUCTOR PLATE |
EP1677349A4 (en) * | 2004-02-24 | 2010-12-01 | Ibiden Co Ltd | SUBSTRATE FOR MOUNTING A SEMICONDUCTOR |
JP4509972B2 (ja) * | 2005-09-01 | 2010-07-21 | 日本特殊陶業株式会社 | 配線基板、埋め込み用セラミックチップ |
KR101248738B1 (ko) * | 2005-12-07 | 2013-03-28 | 엔지케이 스파크 플러그 캄파니 리미티드 | 유전체 구조체, 유전체 구조체의 제조방법 및 유전체구조체를 포함한 배선기판 |
TWI416673B (zh) * | 2007-03-30 | 2013-11-21 | Sumitomo Bakelite Co | 覆晶半導體封裝用之接續構造、增層材料、密封樹脂組成物及電路基板 |
JP5138277B2 (ja) * | 2007-05-31 | 2013-02-06 | 京セラSlcテクノロジー株式会社 | 配線基板およびその製造方法 |
JP2012069926A (ja) * | 2010-08-21 | 2012-04-05 | Ibiden Co Ltd | プリント配線板及びプリント配線板の製造方法 |
JP5855905B2 (ja) * | 2010-12-16 | 2016-02-09 | 日本特殊陶業株式会社 | 多層配線基板及びその製造方法 |
JP5536682B2 (ja) * | 2011-01-18 | 2014-07-02 | 日本特殊陶業株式会社 | 部品内蔵配線基板 |
JP5833398B2 (ja) * | 2011-06-27 | 2015-12-16 | 新光電気工業株式会社 | 配線基板及びその製造方法、半導体装置 |
-
2013
- 2013-03-28 JP JP2013068185A patent/JP6013960B2/ja active Active
-
2014
- 2014-03-19 TW TW103110255A patent/TWI573229B/zh active
- 2014-03-21 US US14/222,077 patent/US9277657B2/en active Active
- 2014-03-27 KR KR1020140036172A patent/KR20140118908A/ko not_active Application Discontinuation
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01100947A (ja) * | 1987-10-14 | 1989-04-19 | Oki Electric Ind Co Ltd | スルーホール構造 |
JP2002324952A (ja) * | 2001-04-24 | 2002-11-08 | Denso Corp | プリント基板 |
JP2005311253A (ja) * | 2004-04-26 | 2005-11-04 | Kyocera Corp | 配線基板 |
JP2007180076A (ja) * | 2005-12-27 | 2007-07-12 | Ibiden Co Ltd | 多層プリント配線板 |
JP2007207781A (ja) * | 2006-01-30 | 2007-08-16 | Fujitsu Ltd | 多層構造のプリント配線基板およびプリント配線基板の製造方法 |
JP2010010521A (ja) * | 2008-06-30 | 2010-01-14 | Kyocer Slc Technologies Corp | 配線基板およびその製造方法 |
JP2011159734A (ja) * | 2010-01-29 | 2011-08-18 | Kyocer Slc Technologies Corp | 配線基板 |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10755996B2 (en) | 2016-02-05 | 2020-08-25 | Dai Nippon Printing Co., Ltd. | Through electrode substrate and manufacturing method thereof |
KR20170110514A (ko) * | 2016-03-23 | 2017-10-11 | 쿄세라 코포레이션 | 배선 기판 |
KR101959240B1 (ko) | 2016-03-23 | 2019-07-04 | 쿄세라 코포레이션 | 배선 기판 |
JP2018152597A (ja) * | 2017-01-13 | 2018-09-27 | 大日本印刷株式会社 | 貫通電極基板及びその製造方法 |
JP7163069B2 (ja) | 2017-01-13 | 2022-10-31 | 大日本印刷株式会社 | 貫通電極基板及びその製造方法 |
JP2018061063A (ja) * | 2018-01-05 | 2018-04-12 | 大日本印刷株式会社 | 貫通電極基板及びその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
TW201448131A (zh) | 2014-12-16 |
US9277657B2 (en) | 2016-03-01 |
US20140291005A1 (en) | 2014-10-02 |
KR20140118908A (ko) | 2014-10-08 |
TWI573229B (zh) | 2017-03-01 |
JP6013960B2 (ja) | 2016-10-25 |
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