JP2008277365A - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- JP2008277365A JP2008277365A JP2007116351A JP2007116351A JP2008277365A JP 2008277365 A JP2008277365 A JP 2008277365A JP 2007116351 A JP2007116351 A JP 2007116351A JP 2007116351 A JP2007116351 A JP 2007116351A JP 2008277365 A JP2008277365 A JP 2008277365A
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Abstract
【解決手段】N+型のシリコン基板1およびN型のせり上がり層29にてドレイン領域が形成され、その上にN−型のドリフト領域21が形成されている。ドリフト領域21の一部にドレインコンタクトトレンチ30を形成し、その中にドレイン電極15を埋め込み、ドレインコンタクトトレンチ30とドレイン領域との間にドリフト領域21よりも高い不純物濃度を有するドレインコンタクト領域25、26を形成することで、オン抵抗を小さくできる。
【選択図】図2
Description
2 外部ソース端子
3 外部ドレイン端子
4 外部ゲート端子
5 ゲート配線
7 ベース領域
8 ソース領域
9 ベースコンタクト領域
11 ゲート電極
12 ゲート絶縁膜
13 層間絶縁膜
14 ソース電極
15 ドレイン電極
16 ゲートトレンチ
17 コンタクトホール
21 ドリフト領域
25 第1のドレインコンタクト領域
26 第2のドレインコンタクト領域
29 せり上がり層
30 ドレインコンタクトトレンチ
Claims (15)
- 第1導電型のドレイン領域と、
前記ドレイン領域の上に形成された前記ドレイン領域よりも低い不純物濃度の第1導電型のドリフト領域と、
前記ドリフト領域の上に形成された第2導電型のベース領域と、
前記ベース領域に形成された第1導電型のソース領域と、
前記ソース領域から前記ドリフト領域に達するように形成されたゲートトレンチと、
前記ゲートトレンチの中に形成されたゲート絶縁膜およびゲート電極と、
前記ベース領域および前記ソース領域に接続されたソース電極と、
前記ドリフト領域の一部に設けられたドレインコンタクトトレンチと、
前記ドレインコンタクトトレンチと前記ドレイン領域の間に介在し、前記ドリフト領域よりも高い不純物濃度の第1導電型のドレインコンタクト領域と、
前記ドレインコンタクトトレンチの中に形成され、前記ドレインコンタクト領域に接続されたドレイン電極とを有する半導体装置。 - 前記ドレインコンタクトトレンチは、前記ゲートトレンチとほぼ同程度の深さを有する請求項1記載の半導体装置。
- 前記ドレインコンタクトトレンチは、前記ゲートトレンチとほぼ同程度の深さを有する第1のドレインコンタクトトレンチと、前記第1のドレインコンタクトトレンチのよりも深く形成された第2のドレインコンタクトトレンチを有する請求項1記載の半導体装置。
- 前記ベース領域、前記ソース領域、前記ゲート電極および前記ドレインコンタクトトレンチの表面に形成された層間絶縁膜と、
前記層間絶縁膜の一部が除去され、側面の一部に前記ソース領域を露出し、前記ベース領域に達するように設けられたコンタクトトレンチをさらに有し、
前記コンタクトトレンチと前記第2のドレインコンタクトトレンチの前記層間絶縁膜の表面からの深さはほぼ同程度である請求項3記載の半導体装置。 - 前記ゲート電極に接続されたゲート引き出し配線と、
前記ゲート電極および前記ゲート引き出し配線よりも外側に設けられた環状の導電層をさらに有し、
前記環状の導電層は前記ドレイン電極に接続されている請求項1乃至4のいずれか一に記載の半導体装置。 - 前記環状の導電層は、前記ゲート引き出し配線と同じ材料で形成されている請求項5記載の半導体装置。
- 前記層間絶縁膜は、前記環状の導電層の表面にも形成され、
前記環状の導電層は、前記第2のドレインコンタクトトレンチとほぼ同程度の深さを有するトレンチを介して前記ドレイン電極に接続されている請求項5または6記載の半導体装置。 - 前記ゲート電極および前記ゲート引き出し配線よりも外側に設けられ、前記ベース領域とほぼ同じ不純物プロファイルを有する第2導電型領域が環状に形成されている請求項1乃至7のいずれか一に記載の半導体装置。
- 前記環状の導電層と前記第2導電型領域との間に前記ゲート絶縁膜とほぼ同じ厚さの絶縁膜が形成されており、前記環状の導電層と前記第2導電型領域と前記絶縁膜とでコンデンサを形成している請求項8記載の半導体装置。
- 前記第2導電型領域が前記ドレイン電極に接続されている請求項8記載の半導体装置。
- 前記ソース電極に接続された外部ソース端子と、
前記ゲート引き出し配線に電気的に接続された外部ゲート端子と、
前記ドレイン電極に接続された外部ドレイン端子とをさらに有し、
前記外部ソース端子、前記外部ゲート端子および前記外部ドレイン端子が前記半導体基板の一主面に形成されている請求項1乃至10のいずれか一に記載の半導体装置。 - 第1導電型のドレイン領域の上に、前記ドレイン領域よりも低い不純物濃度の第1導電型のドリフト領域を形成する工程と、
前記ドリフト領域の上に、第2導電型のベース領域と第1導電型のソース領域を形成する工程と、
前記ソース領域および前記ベース領域を一部除去し、前記ドリフト領域に達するゲートトレンチを形成すると同時に、ドレインコンタクトトレンチを形成する工程と、
前記ゲートトレンチの中に、ゲート絶縁膜およびゲート電極を形成する工程と、
前記ドレインコンタクトトレンチと前記ドレイン領域との間に、前記ドリフト領域よりも高い不純物濃度の第1導電型のドレインコンタクト領域を形成する工程と、
前記ドレインコンタクトトレンチの中に、前記ドレインコンタクト領域に接続されたドレイン電極を形成する工程とを有する半導体装置の製造方法。 - 前記ゲート絶縁膜およびゲート電極を形成する工程の後に、層間絶縁膜を形成する工程と、前記層間絶縁膜の一部が除去され、側面の一部に前記ソース領域を露出し、前記ベース領域に達するようにコンタクトトレンチを形成する工程をさらに有し、
前記コンタクトトレンチを形成する工程は、前記ゲートトレンチと同時に形成されたドレインコンタクトトレンチを第1のドレインコンタクトトレンチと称したとき、さらに、前記第1のドレインコンタクトトレンチの中に、第2のドレインコンタクトトレンチを前記コンタクトトレンチと同時に形成する請求項12記載の半導体装置の製造方法。 - 前記ゲート絶縁膜およびゲート電極を形成する工程は、前記ゲート絶縁膜と同時に形成された絶縁膜の上に、前記ゲート電極に接続されたゲート引き出し配線と、前記ゲート電極および前記ゲート引き出し配線よりも外側に設けられた環状の導電層とを、前記ゲート電極と同じ材料で形成する工程をさらに有し、
前記ドレイン電極を形成する工程は、さらに、前記ドレイン電極が前記環状の導電層にも接続される請求項12または13記載の半導体装置の製造方法。 - 前記ベース領域を形成すると同時に、前記ゲート電極および前記ゲート引き出し配線よりも外側に第2導電型領域が形成され、
前記ドレイン電極を形成する工程は、さらに、前記ドレイン電極が前記第2導電型領域にも接続される請求項12または13記載の半導体装置の製造方法。
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US20110081756A1 (en) | 2011-04-07 |
JP5132977B2 (ja) | 2013-01-30 |
US20080265314A1 (en) | 2008-10-30 |
US7893489B2 (en) | 2011-02-22 |
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