JP2006135174A - 基板及びその製造方法 - Google Patents
基板及びその製造方法 Download PDFInfo
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- JP2006135174A JP2006135174A JP2004323939A JP2004323939A JP2006135174A JP 2006135174 A JP2006135174 A JP 2006135174A JP 2004323939 A JP2004323939 A JP 2004323939A JP 2004323939 A JP2004323939 A JP 2004323939A JP 2006135174 A JP2006135174 A JP 2006135174A
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- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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Abstract
【解決手段】 貫通部55と、貫通部の一方の端部に設けられ、貫通部の直径R1よりも幅広の形状とされた配線接続部56と、貫通部の他方の端部に設けられ、貫通部の直径R1よりも幅広の形状とされた接続パッド57とにより貫通ビア54を構成し、配線接続部56に外部接続端子69を有した配線68を接続する。
【選択図】 図2
Description
(第1実施例)
始めに、図2を参照して、本発明の第1実施例の基板50の構成について説明する。図2は、本発明の第1実施例の基板の断面図である。基板50は、大略すると基材51と、絶縁層53と、貫通ビア54と、絶縁層65と、配線68と、第1の拡散防止膜61、第2の拡散防止膜71と、ソルダーレジスト75とを有した構成とされている。基板50は、インターポーザである。図2において、基板50の下面側には、例えば、半導体微細加工技術を用いたMEMS(Micro Electro Mechanical Systems)や半導体素子等が実装され、基板50の上面側(配線68が形成されている側)には、例えば、マザーボード等の基板が接続される。
(第2実施例)
次に、図30乃至37を参照して、基板50の他の製造方法について説明する。図30乃至37は、基板の他の製造工程を示した図である。なお、図30乃至37において、図6乃至図10に示した構成と同一構成部分には同一の符号を付す。
11 シリコン基材
12,52 貫通孔
13 絶縁層
13a,13b,51a,51b,101a 面
15,54 貫通ビア
15a,15b 端部
17,21,68 配線
18,22 外部接続端子
19,24,75 ソルダーレジスト
22 接続パッド
25 半導体素子
51 基材
53,65 絶縁層
55 貫通部
56 配線接続部
57 接続パッド
61 第1の拡散防止膜
62,72 Ni層
63,73 Au層
65a 上面
65b 側面
66 シード層
67,104 導電金属膜
69 外部接続端子
71 第2の拡散防止膜
76,102,103,106,112,119 開口部
91 支持板
92 接着剤
93 金属箔
94,121 第1のレジスト層
101 第2のレジスト層
97,123 鍔状空間
105,111,114,118 ドライフィルムレジスト
116 耐熱テープ
A 基板形成領域
B 領域
M1〜M4 厚さ
R1 直径
R2 開口径
W1〜W3 幅
Claims (13)
- 貫通孔が形成された基材と、
該基材の貫通孔に配設された貫通ビアと、
該貫通ビアと接続される配線とを備えた基板において、
前記貫通ビアは、前記貫通孔に配置された貫通部と、該貫通部の一方の端部に設けられ、前記配線が接続されると共に、前記基材から突出した第1の突出部と、前記貫通部の他方の端部に設けられ、前記基材から突出した第2の突出部とを有し、
前記第1及び第2の突出部は、前記貫通部の寸法よりも幅広の形状とされていることを特徴とする基板。 - 前記配線は、外部接続端子を有しており、
前記外部接続端子及び第2の突出部には、拡散防止膜を設けたことを特徴とする請求項1に記載の基板。 - 貫通孔が形成された基材と、
該基材の貫通孔に配設された貫通ビアと、
該貫通ビアと接続される配線とを備えた基板において、
前記貫通ビアは、前記貫通孔に配置された貫通部と、該貫通部の両端部に設けられ、前記配線が接続される突出部とを有し、
前記突出部は、前記貫通部の寸法よりも幅広の形状とされていることを特徴とする基板。 - 前記配線は、外部接続端子を有しており、
前記外部接続端子には、拡散防止膜を設けたことを特徴とする請求項3に記載の基板。 - 貫通孔が形成された基材と、該基材の貫通孔に配設された貫通ビアと、該貫通ビアの端部と接続される配線とを備え、
前記貫通ビアは、前記貫通孔に配置された貫通部と、該貫通部の一方の端部に設けられ、前記配線が接続されると共に、前記基材から突出した第1の突出部と、前記貫通部の他方の端部に設けられ、前記基材から突出した第2の突出部とを有し、
前記第1及び第2の突出部が前記貫通部の寸法よりも幅広の形状とされた基板の製造方法であって、
前記貫通ビアを形成する貫通ビア形成工程と、
前記第1の突出部と接続されるよう前記配線を形成する配線形成工程とを含むことを特徴とする基板の製造方法。 - 前記貫通ビア形成工程は、
支持体に接着剤により金属箔を貼り付ける金属箔配設工程と、
前記金属箔上に、第1のレジスト層を形成する第1のレジスト層形成工程と、
前記第1のレジスト層上に、前記貫通孔が形成された基材を配置する基材配置工程と、
前記貫通孔に露出された第1のレジスト層を現像液により除去して、前記金属箔を露出すると共に、前記貫通孔の寸法よりも幅広形状となる鍔状空間を形成する鍔状空間形成工程と、
前記基材上に、前記貫通孔を露出すると共に、前記貫通孔の寸法よりも幅広形状となる第1の開口部を有した第2のレジスト層を形成する第2のレジスト層形成工程と、
前記鍔状空間、貫通孔、及び第1の開口部を充填するよう電解めっき法により導電金属膜を形成する導電金属膜形成工程とを有したことを特徴とする請求項5に記載の基板の製造方法。 - 前記鍔状空間形成工程後に、前記第1のレジスト層を第1の熱処理により硬化させる第1のレジスト層硬化工程を設けたことを特徴とする請求項6に記載の基板の製造方法。
- 前記第2のレジスト層形成工程後、電解めっき法により、前記鍔状空間に露出された前記金属箔に第1の拡散防止膜を形成する第1の拡散防止膜形成工程を設けたことを特徴とする請求項6または7に記載の基板の製造方法。
- 前記配線形成工程は、
第2のレジスト層を除去する第2のレジスト層除去工程と、
前記基材上に、前記第1の突出部を露出する第2の開口部を有した絶縁層を形成する絶縁層形成工程と、
前記配線が形成される絶縁層に、シード層を形成するシード層形成工程とを有しており、
前記絶縁層には、パラジウムを含有させた樹脂を用いることを特徴とする請求項5乃至8のいずれか1項に記載の基板の製造方法。 - 前記配線は、外部接続端子を有しており、
前記配線形成工程後、前記外部接続端子に、電解めっき法により第2の拡散防止膜を形成する第2の拡散防止膜形成工程を設けたことを特徴とする請求項5乃至9のいずれか1項に記載の基板の製造方法。 - 前記第2の拡散防止膜形成工程後に、
少なくとも前記配線及び第2の拡散防止膜を覆うよう耐熱性を有した保護部材を配設する保護部材配設工程と、
該保護部材配設工程後、第2の熱処理により、前記基材から前記接着剤及び支持板を離脱させる支持板離脱工程とを設けたことを特徴とする請求項10に記載の基板の製造方法。 - 支持板離脱工程後に、前記金属箔をエッチングにより除去する金属箔除去工程と、
前記第1のレジスト層を除去する第1のレジスト層除去工程と、
該第1のレジスト層除去工程後に、前記保護部材を除去する保護部材除去工程とを設けたことを特徴とする請求項11に記載の基板の製造方法。 - 前記第1の拡散防止膜形成工程は、前記金属箔配設工程の直後に行うことを特徴する請求項8乃至12のいずれか1項に記載の基板の製造方法。
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JP2004323939A JP3987521B2 (ja) | 2004-11-08 | 2004-11-08 | 基板の製造方法 |
EP05256299A EP1656006B1 (en) | 2004-11-08 | 2005-10-10 | A substrate having high electrical connection reliability of a penetrating via connected to wirings and a method for manufacturing the same |
DE602005004586T DE602005004586T2 (de) | 2004-11-08 | 2005-10-10 | Substrat mit hoher Zuverlässigkeit der elektrischen Verbindung einer mit Verdrahtungen verbundenen Durchkontaktierung und Verfahren zur Herstellung desselben |
US11/247,813 US20060096781A1 (en) | 2004-11-08 | 2005-10-11 | Substrate having high electrical connection reliability of a penetrating via connected to wirings and a method for manufacturing the same |
TW094135505A TWI402956B (zh) | 2004-11-08 | 2005-10-12 | 基材之製造方法 |
KR1020050098430A KR20060054104A (ko) | 2004-11-08 | 2005-10-19 | 배선에 접속된 높은 전기적인 접속 신뢰도의 관통 비아를갖는 기판 및 그 제조 방법 |
CNB2005101161393A CN100517678C (zh) | 2004-11-08 | 2005-10-24 | 具有连接到布线的贯穿通道的衬底及其制造方法 |
US12/061,768 US7772118B2 (en) | 2004-11-08 | 2008-04-03 | Substrate having high electrical connection reliability of a penetrating via connected to wirings and a method for manufacturing the same |
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JP2004323939A JP3987521B2 (ja) | 2004-11-08 | 2004-11-08 | 基板の製造方法 |
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US (2) | US20060096781A1 (ja) |
EP (1) | EP1656006B1 (ja) |
JP (1) | JP3987521B2 (ja) |
KR (1) | KR20060054104A (ja) |
CN (1) | CN100517678C (ja) |
DE (1) | DE602005004586T2 (ja) |
TW (1) | TWI402956B (ja) |
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- 2005-10-10 EP EP05256299A patent/EP1656006B1/en not_active Expired - Fee Related
- 2005-10-11 US US11/247,813 patent/US20060096781A1/en not_active Abandoned
- 2005-10-12 TW TW094135505A patent/TWI402956B/zh active
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US20060096781A1 (en) | 2006-05-11 |
DE602005004586T2 (de) | 2009-03-19 |
TWI402956B (zh) | 2013-07-21 |
TW200635021A (en) | 2006-10-01 |
KR20060054104A (ko) | 2006-05-22 |
EP1656006A1 (en) | 2006-05-10 |
CN100517678C (zh) | 2009-07-22 |
US20080261396A1 (en) | 2008-10-23 |
CN1783472A (zh) | 2006-06-07 |
DE602005004586D1 (de) | 2008-03-20 |
EP1656006B1 (en) | 2008-01-30 |
JP3987521B2 (ja) | 2007-10-10 |
US7772118B2 (en) | 2010-08-10 |
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