JP2005302869A - 電子部品実装体の製造方法、電子部品実装体、及び電気光学装置 - Google Patents
電子部品実装体の製造方法、電子部品実装体、及び電気光学装置 Download PDFInfo
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- JP2005302869A JP2005302869A JP2004114117A JP2004114117A JP2005302869A JP 2005302869 A JP2005302869 A JP 2005302869A JP 2004114117 A JP2004114117 A JP 2004114117A JP 2004114117 A JP2004114117 A JP 2004114117A JP 2005302869 A JP2005302869 A JP 2005302869A
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Abstract
【解決手段】 本発明の電子部品実装体の製造方法は、外部実装端子としてのバンプ11を備えたICチップ10を、熱可塑性樹脂からなる基材13に実装する方法であって、前記ICチップ10を基材13に対し加熱押圧することにより前記バンプ11を前記基材13に埋入し、前記バンプ11の一部を前記ICチップ10と反対側の基材面に露出させるバンプ埋設工程と、前記バンプ11の一部が露出された基材面に導電材料を配することにより前記バンプ11と導電接続された導電体を形成する導電体形成工程とを含む製造方法である。
【選択図】 図1
Description
すなわち、上記ICチップは基板上に固定されるのみならず、係る基板上に形成された配線と接続される必要があるが、ICチップを基板に押しつけて加熱すると、熱膨張率の大きい熱可塑性樹脂の寸法変化によって端子の位置精度が狂いやすい。そのためにICチップのバンプと基板上の導電パッド(配線)との位置合わせが難しくなる。また、基板に挿入されたバンプの先端と導電パッドとの間に樹脂残渣が生じると、バンプと導電パッドとが完全に接続されない場合がある。このように、従来技術においては、電子部品実装体の製造に際して、製品歩留まり及び実装効率を向上させるためにさらなる改善が必要である。
この製造方法によれば、バンプの突出高さ又は基材の厚さにばらつきが生じている場合にも、基材表面を除去してバンプを確実に基材面に露出させることができる。また、加熱加圧状態でバンプが押し込まれることによりバンプ先端側の基材面に凹凸が生じることがあるが、このように基材表面を部分的に除去することでその凹凸も平坦化されるため、バンプと導電体との接続構造の信頼性を高め、また係る基材を介した他の回路基板等への実装も高い信頼性をもって行えるようになる。
導電体は、電解メッキ法、無電解メッキ法のいずれにより形成してもよいが、上記金属下地膜を具備している場合には、係る金属下地膜を電極として用いた電解メッキ法により形成すると、導電体の形成効率を高めることができる。
この製造方法によれば、所定平面形状を具備した導電体を容易に形成できる。また係るマスク材を上記金属下地膜上に形成すれば、この金属下地膜を電極とした電解メッキにより容易にパターニングされた導電体を形成できる。
この製造方法は、フォトレジストの露光工程において位置合わせ基準とされるバンプを予め保護部材によりマスキングしておき、フォトレジストを塗布した後にその保護部材を剥離してバンプを露出させるので、フォトレジストの下層側にあるバンプに対して位置合わせを行う場合に比して位置合わせの作業を容易かつ高精度に行えるようになる。従って本製造方法によれば、高精度に前記マスク材を形成でき、もって高精度に導電体を形成することができる。
この製造方法によれば、駆動回路等が高い信頼性をもって実装された電気光学装置を容易に製造することができる。
この構成によれば、高精度に、かつ高い信頼性をもってバンプと導電体とが導電接続された電子部品実装体を提供することができる。
以下の説明で参照する各図面は、本発明の各実施の形態の構成を模式的に示すものであり、その形状や寸法比は適宜変更して表示している。
本発明に係る電子部品実装体の製造方法は、外部実装端子としてのバンプを備えた前記電子部品を、熱可塑性樹脂からなる基材に実装し、基材表面の導電体と前記電子部品とを接続することで電子部品実装体を得る方法であり、その特徴とするところは、前記電子部品のバンプを加熱しつつ前記基材に押圧して埋入し、当該バンプの一部を前記基材の反対側面に露出させるバンプ埋設工程と、前記バンプの一部が露出された基材面に導電材料を配することにより前記バンプと導電接続された導電体を形成する導電体形成工程とを有している点にある。
まず、図1の断面工程図を参照して本発明の実施形態について説明する。以下では、本発明に係る電子部品実装体の製造方法のうち、バンプ埋設工程の第1実施形態について詳細に説明する。
本実施形態では、まず、図1(a)に示すように、外部接続端子を成す複数(図示では7個)のバンプ11を具備したICチップ(電子部品)10と、熱可塑性樹脂からなる基材13とを用意する。このICチップ10は、例えばシリコン単結晶や化合物半導体単結晶等の半導体基板や、複数のセラミックス層の間に導体層を挟んで積層したセラミックス基板などにより構成され、そのバンプ11形成面側が、電子回路構造を有した能動面とされている。ICチップ10の厚さは、半導体基板であれば100〜800μm程度であり、セラミックス基板であれば1〜5mm程度である。
次に、バンプ埋設工程の第2実施形態につき図2を参照して説明する。本実施形態において用いるICチップ(電子部品)10及び基材13は図1に示したものとほぼ同様である。本実施形態は、前記実施形態に対して加熱押圧の条件とバンプの基材面からの露出方法が異なる。
本実施形態では、前記実施形態に対して加熱押圧条件のうち、加熱温度を所定量低くし、押圧時間を所定量短くすることにより、加熱押圧後に基板がバンプを覆うように加熱押圧する。
次に、上記バンプ埋設工程の第3実施形態につき図1を参照して説明する。本実施形態において用いるICチップ(電子部品)10及び基材13は図1に示したものと同様である。本実施形態は、先の第1の実施形態で説明したバンプ埋設工程に、さらに化学研磨あるいはドライエッチングによって基材表面を部分的に除去する工程を追加した点において第1実施形態と異なっている。
次に、図3及び図4を参照して、本発明に係る電子部品実装体の製造方法のうち、導電体形成工程の第1実施形態について説明する。なお、図3(a)〜(f)、図4(a)〜(c)は連続した工程を示す断面構成図である。
以下の導電体形成工程では、図1又は図2に示した工程により得られるICチップ10と基材13とが一体に接合された部材を用いるが、本実施形態ではICチップ10の一面側に配列されたバンプ11のうち、図示両端に配されたバンプ11b,11bが後述の導電体と接続されないダミーバンプであるとして説明する。なお、このダミーバンプ11bについても基材13の表面にその先端部が露出されており、基材面との間に段差11cを有している。
続いて、図3(d)に示すように、フォトレジスト15をマスク露光して、フォトレジスト15中に露光部15xを形成する。この露光部15xはバンプ11上の領域を含む領域に形成される。
次に、図4(c)に示すように、導電体16の表面に電解メッキ法等により保護絶縁膜以外の領域に表面保護層17を形成する。基材13上に既設の金属下地膜14及び導電体16を電極として電解メッキを行えば、導電体16の表面に選択的に表面保護層17を所望の膜厚にて形成できる。この表面保護層17は、Au等の安定な金属材料により0.01μm〜0.5μm程度の厚さに形成される。またこの表面保護層17を良好な導電性を有する材料により形成すれば、導電体16とともに構成する配線等の抵抗を低減できる。
なお、この保護絶縁膜25は必要に応じて設けられるものである。例えば保護絶縁膜25を設けない形態としては、基材13を利用して電子部品実装体10Pを他の回路基板等と接合する場合が挙げられる。この場合、導電体16が設けられた側の基材13の表面部分を軟化若しくは溶融させ、他の回路基板に固着させることでこの電子部品実装体10Pを容易に他の回路基板に接合することができ、電子部品を極めて効率よく実装することができる。
次に、図5及び図6を参照して、導電体形成工程の第2の実施形態について説明する。なお、図5(a)〜(f)、図6(a)〜(e)は連続した工程を示す断面構成図である。
本実施形態の導電体形成工程においても、上記実施形態と同様のICチップ10と基材13とが一体に接合された部材を用いる。従ってICチップ10両端に配されたバンプ11b,11bは、露光時の基準バンプとして用いられるダミーバンプである。
次に、図5(d)に示すように、ダミーバンプ11b上の保護部材18を剥離する。すると、保護部材18上に積層されていた金属下地膜14及びフォトレジスト19の一部は保護部材18とともに除去され、ダミーバンプ11b,11bが露出される。
次いで、図6(a)に示すように、電解メッキ法によりCu等の金属材料からなる導電体20を形成する。電解メッキ法を用いるのは金属下地膜14を電極として成膜することで開口部19aに対応する形状の導電体20を容易に形成できるからである。
次に、図6(d)に示すように、電解メッキ法により導電体20の表面に表面保護層21を形成する。この表面保護層21の構成は先の実施形態の表面保護層17と同様である。そして、図6(e)に示すように導電体16及びダミーバンプ11を含む基材13上の領域に保護絶縁膜25を形成することで、本発明に係る電子部品実装体10Pを得る。
先の特許文献1に記載の技術では、基材に既設の導電パターンに対してバンプを位置合わせしてICチップの実装を行うようになっていたため、バンプや導電パターンが狭ピッチ化された場合にそれらの位置合わせの困難性が著しく増加するという問題があったが、本製造方法によれば、基材13の表面に露出されたバンプ11に対して高い位置精度をもって導電体16を配置できるので、バンプ11の配列ピッチが狭い場合にも十分な精度をもって導電体16を配置できる。
次に、図7から図11を参照して、本発明に係る電気光学装置の実施の形態について説明する。
図7は、本発明に係る電気光学装置の第1の構成例を示す斜視構成図であり、図8は、図7のB−B’線に沿う部分断面構成図である。
図7に示す電気光学装置100は、先の実施形態の製造方法により得られる電子部品実装体10Pを具備したものである。ここで、電子部品実装体10Pは、その電子構造領域に電気光学装置を駆動するための駆動信号を生成する回路を内包するもの(すなわち、液晶駆動用ICチップの実装体)であることが望ましい。
なお、この配線111cは、上記画素電極111a及び透明電極112aに導電接続され、それぞれ基板111の基板張出部(基板112の外形よりも周囲に張り出した部分)に引き出されたものである。
次に、図9を参照して本発明に係る電気光学装置の第2構成例について説明する。図9は、本構成例の電気光学装置の部分断面構成図であり、電気光学装置の全体構成に対しては、図7のB−B’線に沿う断面構造に相当する図である。
電気光学装置(液晶表示装置)200は、電気光学パネル210と、これに実装された回路基板220とを有する。電気光学パネル210は、上記第1構成例の電気光学パネル110とほぼ同様の構造を有し、基板211,212、画素電極211a,透明電極212a、配向膜211b,212b、配線211c、シール材213、液晶(電気光学物質)214、及び異方性導電膜217は第1構成例で説明したものと同様の構成部材であるため、説明を省略する。ただし、本構成例では、回路基板220が導電接続される入力配線211dが配線211cとは別途形成されている。
また本発明に係る電子部品実装体10Pは、電気光学パネル210の基板211上に直接実装することが可能であるため、異方性導電膜を用いることなく実装することができ、実装コストを低減することができるとともに、効率的に実装を行うことができる。
次に、図10を参照して本発明に係る電気光学装置の第3構成例について説明する。図10は、本構成例の電気光学装置の部分断面構成図であり、電気光学装置の全体構成に対しては、図7のB−B’線に沿う断面構造に相当する図である。
電気光学装置(液晶表示装置)300は、電気光学パネル310と、これに実装された回路基板320とを有する。電気光学パネル310は、上記第1構成例の電気光学パネル110とほぼ同様の構造を有し、基板311,312、透明電極311a,画素電極312a、配向膜311b,312b、配線311c、シール材313、液晶(電気光学物質)314、及び異方性導電膜317は第1構成例で説明したものと同様の構成部材であるため、説明を省略する。
次に、図11を参照して本発明に係る電気光学装置の第4構成例について説明する。図11は、本構成例の電気光学装置の部分断面構成図であり、電気光学装置の全体構成に対しては、図7のB−B’線に沿う断面構造に相当する図である。
本例の電気光学装置(液晶表示装置)400は、電気光学パネル410と、これに実装された回路基板420とを有する。電気光学パネル410は、上記第2構成例の電気光学パネル210とほぼ同様の構造を有し、基板411,412、透明電極411a,画素電極412a、配向膜411b,412b、配線411c、シール材413、液晶(電気光学物質)414、及び異方性導電膜417は第2構成例で説明したものと同様の構成部材であるため、説明を省略する。
また、回路基板420においても、絶縁基材421、配線パターン421a、接続端子部421b、保護膜422、接続パッド部423,424,425,426、及び、電子部品427,428,429は第2構成例で説明したものと同様の構成部材であるので、説明を省略する。
次に、図12及び図13を参照して、本発明に係る電子機器の実施形態について説明する。この実施形態では、上記電気光学装置(液晶装置200)を表示手段として備えた電子機器について説明する。
図12は、本実施形態の電子機器における液晶装置200に対する制御系(表示制御系)の全体構成を示す概略構成図である。ここに示す電子機器は、表示情報出力源291と、表示情報処理回路292と、電源回路293と、タイミングジェネレータ294と、光源制御回路295とを含む表示制御回路290を有する。また、上記と同様の液晶装置200には、上述の構成を有する液晶パネル210を駆動する駆動回路210Dか設けられている。この駆動回路210Dは、上記のように液晶パネル210に直接実装されている電子部品実装体10Pの半導体ICチップで構成されている。ただし、駆動回路210Dは、上記のような態様の他に、パネル表面上に形成された回路パターン、或いは、液晶パネルに導電接続された回路基板に実装された半導体ICチップ若しくは回路パターンなどによっても構成することができる。
次に、図13は、本発明に係る電子機器の一実施形態である携帯電話の外観を示す。この電子機器1300は、表示部1301、操作部1302、受話部1303、及び送話部1304を有しており、表示部1301は、上記した液晶装置200により構成され、従って液晶パネル210と接続された回路基板220を具備している。そして、表示部1301の表面において、回路基板220上のICチップにより駆動制御される液晶パネル210を視認できるように構成されている。
Claims (17)
- 外部実装端子としてのバンプを備えた電子部品を、熱可塑性樹脂からなる基材に実装した電子部品実装体の製造方法であって、
前記電子部品を基材に対し加熱押圧することにより前記バンプを前記基材に埋入し、前記バンプの一部を前記電子部品と反対側の基材面に露出させるバンプ埋設工程と、
前記バンプの一部が露出された基材面に導電材料を配することにより前記バンプと導電接続された導電体を形成する導電体形成工程と
を含むことを特徴とする電子部品実装体の製造方法。 - 前記基材として、その厚さが、前記電子部品のバンプの、前記電子部品の表面からの突出高さと同等又は10μm以下厚いものを用いることを特徴とする請求項1に記載の電子部品実装体の製造方法。
- 前記基材として、その厚さが、前記電子部品のバンプの、前記電子部品の表面からの突出高さと同等又は5μm以下厚いものを用いることを特徴とする請求項1に記載の電子部品実装体の製造方法。
- 前記バンプ埋設工程において、
前記バンプを前記基材に埋入した後、前記電子部品と反対側の基材表面を部分的に除去することにより、前記バンプの一部を前記電子部品と反対側の基材面に露出させることを特徴とする請求項1から3のいずれか1項に記載の電子部品実装体の製造方法。 - 前記基材表面を部分的に除去する工程が、化学研磨工程又はドライエッチング工程であることを特徴とする請求項4に記載の電子部品実装体の製造方法。
- 前記導電体形成工程において、前記導電体を金属メッキ法により形成することを特徴とする請求項1から5のいずれか1項に記載の電子部品実装体の製造方法。
- 前記導電体形成工程に先立って、前記基材を貫通して露出したバンプの一部を含む基材面領域に金属下地膜を形成する工程を有することを特徴とする請求項1から6のいずれか1項に記載の電子部品実装体の製造方法。
- 前記金属下地膜上に、電解メッキ法により前記導電体を形成することを特徴とする請求項7に記載の電子部品実装体の製造方法。
- 前記導電体を、無電解メッキ法により形成することを特徴とする請求項6又は7に記載の電子部品実装体の製造方法。
- 前記導電体形成工程において、
前記バンプの一部が露出された基材面にマスク材をパターン形成する工程と、
前記マスク材をマスクとして用い、前記基材上に前記導電体を選択的に配する工程と
を含むことを特徴とする請求項1から9のいずれか1項に記載の電子部品実装体の製造方法。 - 前記マスク材をパターン形成する工程が、前記基材上にフォトレジストを配する工程と、該フォトレジストを露光、現像する工程とを含んでおり、
前記フォトレジストの露光を、前記基材を貫通して露出したバンプの一部を基準として行うことを特徴とする請求項10に記載の電子部品実装体の製造方法。 - 前記フォトレジストの露光を行うに際して、前記電子部品に設けられた基準バンプを基準として位置合わせを行うことを特徴とする請求項11に記載の電子部品実装体の製造方法。
- 前記マスク材をパターン形成する工程が、前記基材上にフォトレジストを配する工程と、該フォトレジストを露光、現像する工程とを含んでおり、
前記フォトレジストの露光を行うための基準マークを、前記基材を貫通して露出したバンプを基準にして設けることを特徴とする請求項10に記載の電子部品実装体の製造方法。 - 前記バンプ埋設工程において、前記基材を貫通して露出するバンプの高さを1μm以上とすることを特徴とする請求項1から13のいずれか1項に記載の電子部品実装体の製造方法。
- 前記フォトレジストを配するに先立って、前記基材を貫通して露出したバンプの一部を覆う保護部材を形成する工程を有するとともに、前記保護部材を含む前記基材上に前記フォトレジストを形成した後に、前記保護部材を除去する工程を有しており、
前記保護部材を除去することで露出された前記バンプを基準として、前記フォトレジストの露光を行うことを特徴とする請求項12又は13に記載の電子部品実装体の製造方法。 - 一面側に導電体を有する基材に、外部実装端子としてのバンプを備えた電子部品が実装されてなる電子部品実装体であって、
前記電子部品のバンプが、前記基材を貫通して反対側へ露出されており、
前記基材表面に露出されたバンプと前記導電体とが、金属下地膜を介して導電接続されていることを特徴とする電子部品実装体。 - 請求項16に記載の電子部品実装体が、直接又は他の回路基板を介して実装されていることを特徴とする電気光学装置。
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US8902603B2 (en) * | 2004-02-06 | 2014-12-02 | Carmen Rapisarda | Solder and lead free electronic circuit and method of manufacturing same |
KR100722624B1 (ko) * | 2005-09-12 | 2007-05-28 | 삼성전기주식회사 | 칩 내장형 인쇄회로기판의 제조방법 |
KR100797698B1 (ko) * | 2005-09-27 | 2008-01-23 | 삼성전기주식회사 | 고밀도 인쇄회로기판 제조방법 |
JP4603522B2 (ja) * | 2006-09-25 | 2010-12-22 | エプソンイメージングデバイス株式会社 | 実装構造体、電気光学装置及び電子機器 |
CN102097334B (zh) * | 2009-12-14 | 2013-10-16 | 日本特殊陶业株式会社 | 布线基板的制造方法及针脚排列装置 |
US9148957B2 (en) * | 2011-03-04 | 2015-09-29 | Sharp Kabushiki Kaisha | Electronic circuit substrate, display device, and wiring substrate |
KR101954985B1 (ko) * | 2012-09-17 | 2019-03-08 | 삼성디스플레이 주식회사 | 디스플레이 장치 |
CN108398818B (zh) * | 2017-02-06 | 2021-04-27 | 精工爱普生株式会社 | 电光装置以及电子设备 |
DE212020000719U1 (de) * | 2020-03-06 | 2022-04-26 | Murata Manufacturing Co., Ltd. | Elektronische Vorrichtung |
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JP3474936B2 (ja) | 1994-10-07 | 2003-12-08 | 株式会社東芝 | 実装用印刷配線板およびその製造方法 |
JP2000150701A (ja) | 1998-11-05 | 2000-05-30 | Shinko Electric Ind Co Ltd | 半導体装置並びにこれに用いる接続用基板及びその製造方法 |
US6762249B1 (en) * | 1999-08-25 | 2004-07-13 | Hitachi Chemical Company, Ltd. | Wiring-connecting material and process for producing circuit board with the same |
JP3891743B2 (ja) | 1999-09-20 | 2007-03-14 | 松下電器産業株式会社 | 半導体部品実装済部品の製造方法、半導体部品実装済完成品の製造方法、及び半導体部品実装済完成品 |
JP4174174B2 (ja) * | 2000-09-19 | 2008-10-29 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法並びに半導体装置実装構造体 |
JP2003124259A (ja) | 2001-10-15 | 2003-04-25 | Seiko Epson Corp | 電子部品の実装構造、電子部品モジュール、および電子部品の実装方法 |
JP3960076B2 (ja) * | 2002-02-27 | 2007-08-15 | 松下電器産業株式会社 | 電子部品実装方法 |
JP3717899B2 (ja) * | 2002-04-01 | 2005-11-16 | Necエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
JP2003324126A (ja) | 2002-05-02 | 2003-11-14 | Seiko Epson Corp | 電子部品の実装構造、電子部品モジュール、および電子部品の実装方法 |
JP2005101506A (ja) | 2003-08-21 | 2005-04-14 | Seiko Epson Corp | 電子部品実装体の製造方法、電気光学装置の製造方法、電子部品実装体、電気光学装置 |
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JP3835460B2 (ja) | 2006-10-18 |
KR100707587B1 (ko) | 2007-04-13 |
TWI281720B (en) | 2007-05-21 |
KR20060045552A (ko) | 2006-05-17 |
CN100450330C (zh) | 2009-01-07 |
US7422974B2 (en) | 2008-09-09 |
US20050224561A1 (en) | 2005-10-13 |
CN1681377A (zh) | 2005-10-12 |
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